Abstract: A method for configuring a controller in a master control chip can include operations such as: a controller is configured according to a sampling rate, a bit width occupied by data transmission of at least one peripheral and the number of the at least one peripheral plugged into an interface corresponding to the controller; and data transmitted by the at least one peripheral plugged into the interface is received through the configured controller. A configuration parameter of the controller is reconfigured, and then the peripheral may be connected to the interface at timing generated by the controller and the data transmitted by the at least one peripheral is acquired, thereby increasing the types of peripherals supported by the master control chip, and increasing the number of peripherals that can be plugged into the master control chip.

Abstract: Compact timestamps and related methods, systems and devices are described. An encoder is configured to generate compact timestamps of the disclosure by sampling states of linear feedback shift registers (LFSRs). A decoder may be configured to determine timing information responsive to the compact timestamps.

Abstract: Provided are embodiments for performing a cognitive state of charge recalibration, where the embodiments include determining a device usage schedule for a device, and determining a threshold time for performing a recalibration function of a battery of the device. In addition, the embodiments include identifying an available period in the device usage schedule based on the threshold time to perform the recalibration function, and updating device calibration setting based on results of the recalibration function.

Abstract: The present disclosure advantageously provides a method and system for transferring data over at least one interconnect. A request node, coupled to an interconnect, receives a first write burst from a first device over a first connection, divides the first write burst into an ordered sequence of smaller write requests based on the size of the first write burst, and sends the ordered sequence of write requests to a home node coupled to the interconnect. The home node generates an ordered sequence of write transactions based on the ordered sequence of write requests, and sends the ordered sequence of write transactions to a write combiner coupled to the home node. The write combiner combines the ordered sequence of write transactions into a second write burst that is the same size as the first write burst, and sends the second write burst to a second device over a second connection.

Abstract: Described herein are embodiments that adaptively reduce the number of interrupts that occur between a device controller and a computer system. Device commands are submitted to the controller by an operating system on behalf of an application. The device performs the received commands and indicates command completions to the controller. A counter counts completions, and if the count exceeds a threshold number, the controller generates an interrupt to the computer system. If the count is greater than zero and the timeout interval has expired, then the controller generates an interrupt to the computer system. In some embodiments, the application attaches flags to one of the commands indicating that an interrupt relating to completion of the flagged command should be generated as soon as possible or that an interrupt relating to completion of all commands prior to and including the flagged command should be generated as soon as possible.

Abstract: An electronic device includes a key circuit, a first universal serial bus (USB) circuit coupled to the key circuit, where the key circuit outputs different signals when different keys on the key circuit are pressed. The first USB circuit is configured for USB communication, and a first power delivery (PD) circuit is coupled to the key circuit and configured to convert a signal output by the key circuit into a PD signal and transmit the PD signal to a second electronic device to enable the second electronic device to process the key operation when the first USB circuit is in a power-off state and a key operation is performed on the key circuit.

Abstract: Communication devices and methods and corresponding systems are discussed. Transmission is based on symbols, where each symbol comprises a same number of time units. A position of transition between a first signal value and a second signal value within the symbol indicates a value of the symbol.

Abstract: Apparatuses, methods, systems, and program products are disclosed for resetting a peripheral device. An apparatus includes a disconnect module that detaches each of one or more device contexts from a peripheral device in response to a reset request for the peripheral device. Each of the one or more device contexts describes a connection between the peripheral device and a process. An apparatus includes an access module that prevents the one or more device contexts for one or more processes from accessing the peripheral device. An apparatus includes a reset module that resets the peripheral device in response to the one or more device contexts being detached from the peripheral device.

Abstract: A start-and-stop detecting apparatus for an I3C bus is provided. The start-and-stop detecting apparatus is connected with a serial data line and a serial clock line. The start-and-stop detecting apparatus includes a first start detecting circuit, a second start detecting circuit and a first OR gate. The first start detecting circuit receives a data signal, a clock signal and a reset signal, and generates a first control signal and a first output signal. The second start detecting circuit receives the data signal, the clock signal, the reset signal and the first control signal, and generates a second output signal. A first input terminal of the first OR gate receives the first output signal. A second input terminal of the first OR gate receives the second output signal. An output terminal of the first OR gate generates a start signal.

Abstract: An appliance, as provided herein, may include a cabinet, a control board, an intermediate dongle, and an electrical feature. The control board may be mounted within the cabinet to selectively direct one or more operation of the appliance. The intermediate dongle may be spaced apart from the control board within the cabinet. The intermediate dongle may include a connector body and a memory device housed within the connector body. The intermediate dongle may be in electrical communication with the control board. The electrical feature may be connected to the intermediate dongle within the cabinet of the appliance. The electrical feature may be in electrical communication with the control board through the intermediate dongle.

Abstract: Systems and methods for runtime update of battery coefficients are described. In an illustrative, non-limiting embodiments, an Information Handling System (IHS), may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: receive a battery configuration policy from a remote server; and transmit at least a portion of the policy to a battery management unit (BMU) at runtime, where the policy comprises one or more battery coefficients.

Abstract: A memory device includes a memory controller to transmit or receive input/output (“I/O”) data via an I/O signal, as well as transmit command data, address data, or parameter data via another signal in parallel with transmitting or receiving the I/O data. The memory device also includes a memory module communicably coupled to the memory controller. The memory module receives the command data, address data, or parameter data from the memory controller to perform an operation.

Abstract: Methods, systems, and devices for managing a power system are described. A power management system may include multiple interconnected power supply and control units that plug directly into a standard residential power outlet. A power management system may include multiple interconnected power supply and control units that plug directly into a standard residential power outlet. Together, the interconnected power supply and control units may provide a distributed power backup system in the form of a home energy nano-grid. The power management system may provide backup power, power sharing, and device inter-connectivity while enabling efficient scalability and the robustness of a distributed system. The power management system may also include a power usage monitoring unit, which may gather data and use it to improve the efficiency of power usage throughout the home.

Abstract: A multiplexor for an I3C) network includes a switch, a routing map, and an interrupt detector. The switch selectably couples I3C slave interfaces to I3C master interfaces. The routing map includes map entries associating each I3C slave interface with an I3C master interfaces based upon an I3C address of the I3C slave interface, such that, for each map entry, an IBI received from the associated I3C slave interface is mapped to the associated I3C master interface. The interrupt detector detects an IBI from an I3C slave interface, determines that a map entry associated with the I3C slave interface maps the I3C slave interface with a particular I3C master interface based upon the IBI, and directs the switch to couple the I3C slave interface to the I3C master interface based upon the map entry.

Abstract: An information handling system includes an input/output (I/O) device and an input/output memory management unit (I/OMMU). The I/OMMU is configured to translate virtual addresses from the I/O device to physical addresses in a memory. The I/O device is configured to send a first virtual address to the I/OMMU, to receive an error indication from the I/OMMU, and to send an interrupt in response to the error indication, wherein the error indication indicates that the I/OMMU failed to translate the particular first address into a first physical address.

Abstract: Methods, apparatus, and systems for facilitating effective power management through dynamic reconfiguration of interrupts. Interrupt vectors are mapped to various processor cores in a multi-core processor, and interrupt workloads on the processor cores are monitored. When an interrupt workload for a given processor core is detected to fall below a threshold, the interrupt vectors are dynamically reconfigured by remapping interrupt vectors that are currently mapped to the processor core to at least one other processor core, such that there are no interrupt vectors mapped to the processor core after reconfiguration. The core is then enabled to be put in a deeper idle state. Similar operations can be applied to additional processor cores, effecting a collapsing of interrupt vectors onto fewer processor cores.

Abstract: A method for counting a service duration of time measurement on a clock signal including periodic transitions and for determining an actual duration (tmr) of measurement as a function of the service duration, the signal having undergone spectrum spreading according to a periodic variation algorithm causing a frequency modulation of the clock transitions of the signal and creating a difference between actual duration (tmr) and service duration. There are counted during successive time increments at least service times for starting (t_d_s) and stopping (t_a_s) and, on the basis of these times, there are determined actual times for starting and for stopping (t_d, t_a) serving for the calculation of the actual duration of measurement (tmr) as a function of the parameters of the variation algorithm. A method of continuous compensation of the error between actual and service durations is also disclosed.

Abstract: A system, computer-readable media and computer-implemented method for automated network adapter activation in connection with fibre channel uplink mapping. The system includes a non-virtualized storage area network switch having a plurality of fibre channel ports. Each of the fibre channel ports is coupled to a corresponding cable to at least partly define a fibre channel uplink. The system also includes a plurality of client devices. Each client device has a network adapter.

Abstract: A flexible expandable automation device includes: a main control unit; and at least two I/O-units connected to the main control unit and to each other via an I/O-bus. The I/O-bus works according to a daisy-chain technique. The I/O-bus has a bus signal line and a daisy-chain-control-line. Each I/O-unit has a daisy-chain-control-IN-port for receiving a daisy-chain-control-signal as a daisy-chain-control-IN-signal and a daisy-chain-control-OUT port for delivering the daisy-chain-control-signal as a daisy-chain-control-OUT-signal to a next adjacent I/O-unit. Each I/O-unit has an I/O-module carrier and a pluggable and unpluggable I/O-module. The daisy-chain-control-IN-port and the daisy-chain-control-OUT-port are part of the I/O-module carrier. Each I/O-module-carrier has a hot-swap-control unit that, in case of an unplugged I/O-module creating an interrupted daisy chain, automatically bridges the interrupted daisy chain.

Abstract: Technologies for improving enumeration of universal serial bus (USB) devices over a media agnostic USB (MAUSB) connection are disclosed. In the illustrative embodiment, an MAUSB device may send USB configuration data to a host compute device. The host compute device may then perform a virtual enumeration of the USB devices based on the USB configuration data without necessarily communicating with the USB devices. The MAUSB device may perform an enumeration of the USB devices on behalf of the host compute devices without necessarily communicating with the host compute device. The USB devices may not be aware or have any indication that the USB device is not communicating with the host compute device during the enumeration process. Such an approach may improve the latency of USB enumeration over an MAUSB connection.