Abstract: A nitride film etchant used in the manufacture semiconductor devices, and an etching method using the etchant, are provided. A wafer having a nitride film formed thereon is introduced into a bathing tube containing an etchant which is a water solution containing phosphoric acid (H3PO4) of a concentration of 50-70% by weight and hydrofluoric acid (HF), and the nitride film is etched by the etchant. When the concentration of HF is 0.005 to 0.05% by weight, the etch rate of the nitride film is increased, and the selectivity between the nitride film and an oxide film is kept very high. Also, an etchant containing HF of a concentration of 0.05% by weight is provided as a water solution mixed with H3PO4 and HF. Addition of HF of 0.05% by weight or less increases the etch rate of the nitride film, and a high selectivity of the nitride film with respect to an oxide film is maintained.

Abstract: A method of manufacturing a semiconductor device having features with a dimension of ½the minimum pitch wherein the minimum pitch is determined by the parameters of the manufacturing process being used to manufacture the semiconductor device. A target layer of material to be etched with dimensions of ½the minimum pitch is first etched with masks having a dimension of the minimum pitch and the target layer of material is then etched with the masks offset by ½the minimum pitch.

Abstract: There is provided a method of forming an interlayer insulating film having a dual-damascene structure, a contact hole and a deep trench mask using an organic silicon film. The shape of polysilane or the like is processed so that polysilane is used as an interlayer insulating film having a dual-damascene structure to control the shape and depth and prevent borderless etching which must be solved when a trench is formed. Polysilane and an insulating film are formed into a laminated structure so as to be integrated with each other after a dry etching step has been completed to easily form a contact hole having a high aspect ratio. The surface of polysilane is selectively formed into an insulating film so as to be used as a mask for use in a dry etching step. Polysilane for use as an anti-reflective film or an etching mask is changed to an oxide film or a nitride film so that films are easily removed.

Abstract: A method for wet etching a gallium nitride compound-based semiconductor is disclosed. The method uses an aqueous solution containing an oxidizing agent such as peroxydisulfate ions. The sample and solution are irradiated with visible or ultraviolet light in order to promote the etching.

Abstract: A method for forming hybrid low-k film stack is disclosed, in which an organic spin-on low-k material and CVD low-k material are combined to avoid thermal stress effect. This invention also provides a method for applying hybrid low-k film stack to dual damascene process.

Abstract: A process increases the etch control on the thin gate oxidation near the edges of a poly-silicon or amorphous silicon gate stack. Formation of micro-trenches, while achieving nearly vertical profiles, is substantially minimized. In a method for manufacturing a semiconductor device gate stack a breakthrough etch removes residual oxide and anti-reflection coating until the layer of amorphous silicon is exposed. A bulk etch removes the amorphous silicon until about 40% remains. The remaining amorphous silicon layer is etched with a high selectivity etch until oxide is exposed. Any residual poly or amorphous silicon is etched with a very high-selectivity ratio over etch until clear.

Abstract: In a method of fabricating a microstructure for microfluidics applications, a first layer of etchable material is formed on a suitable substrate. A mechanically stable support layer is formed over the etchable material. A mask is applied over the support to expose at least one opening in the mask. An anistropic etch is then performed through the opening to create a bore extending through the support layer to said layer of etchable material. After performing an isotropic etch through the bore to form a microchannel in the etchable material extending under the support layer, a further layer is deposited over the support layer until overhanging portions meet and thereby close the microchannel formed under the opening.

Abstract: There is disclosed a process for manufacturing a semiconductor device. When a metal film is formed by plasma CVD in a contact hole which penetrates an interlayer insulating film and reaches an electrode of the device, a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus is introduced. Then a metal halide gas is introduced in the deposition chamber simultaneously with or before plasma generation.

Abstract: A nitride etch process particularly useful when integrated with a silicon trench etch needing a sloping silicon surface adjacent to the interface between the silicon and an oxide layer intermediate the silicon and nitride. The nitride etch process is a plasma process having an etching gas mixture of sulfur hexafluoride (SF6) and trifluoromethane (CHF3) although nitrogen or oxygen may be added for additional controls. The trifluoromethane is believed to create a polymer passivation on the sidewalls of the hole being etched which, when the etch reaches the oxide-silicon interface, protects the interface and underlying silicon. The nitride etch may proceed through the oxide or a separate fluorocarbon-based oxide etching step may be performed before a bromine-based etch of the silicon starts.

Abstract: An inventive method for optically detecting a trench depth in a wafer is disclosed. The method includes detecting a first maxima in the intensity of a multi-wavelength light source, a portion of the light being reflected from the top trench surface of a wafer. A second maxima is then detected in the intensity of the multi-wavelength light source, a portion of which being reflected from the bottom trench surface of a wafer. The method further includes determining a maxima peak difference between the first maxima and the second maxima, wherein the trench depth corresponds to the maxima peak separation. The invention provides a robust, cost effective method for trench depth detection.

Abstract: A method and apparatus is disclosed for polishing a semiconductor wafer. A polishing pad including a first surface and a semiconductor wafer including a second surface are aligned to each other. To allow alignment of an axis of rotation of the surfaces, at least one of the first and second surfaces includes an adjustable axis of rotation. After the axis of rotation of the first and second surfaces is aligned, the adjustable axis of rotation is set, preferably with a magneto-rheological fluid or similarly acting material, to maintain a fixed position. Thereafter, the polishing pad is utilized to polish the semiconductor wafer.

Abstract: A contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors. The contactor has a contact portion which is oriented in a vertical direction to form a contact point, an intermediate portion which is inserted in a through hole provided on the contact substrate, and a base portion having a base end which functions as a contact pad and a spring portion provided between the base end and the intermediate portion for producing a resilient contact force when the contactor is pressed against the contact target.

Abstract: A method of producing a contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors. The contactor has a contact portion which is oriented in a vertical direction to form a contact point, an intermediate portion which is inserted in a through hole provided on the contact substrate, and a base portion having a base end which functions as a contact pad and a spring portion provided between the base end and the intermediate portion for producing a resilient contact force when the contactor is pressed against the contact target.

Abstract: The present invention provides a semiconductor manufacturing method, a plasma processing method and a plasma processing apparatus for generating a plasma in a processing chamber and carrying out processing on material to be processed by using the plasma, comprising a floating-foreign-particle measuring apparatus including: a light radiating optical system for radiating a light having a desired wavelength and completing intensity modulation at a desired frequency to the processing chamber; a scattered-light detecting optical system for separating a component with the desired wavelength from scattered lights obtained from the processing chamber as a result of radiation of the light by the light radiating optical system, for optically receiving the component and for converting the component into a first signal; and a foreign-particle-signal extracting unit which separates a second signal representing foreign particle floating in the plasma or in an area in proximity to the plasma from a third signal obtained by

Abstract: An apparatus and method of providing a large semiconductor crystal at a low cost are provided. The apparatus of producing a semiconductor crystal includes a reactor tube having an open end at least one end side, formed of any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, and aluminum oxide, or of a composite material with any one material selected from the group consisting of silicon carbide, silicon nitride, aluminum nitride, boron nitride, aluminum oxide, magnesium oxide, mullite, and carbon as a base, and having an oxidation-proof or airtight film formed on the surface of the base, a kanthal heater arranged around the reactor tube in the atmosphere, a flange attached at the open end to seal the reactor tube, and a crucible mounted in the reactor tube to store material of a semiconductor crystal. The material stored in the crucible is heated and melted to form material melt. The material melt is solidified to grow a semiconductor crystal.

Abstract: A method for processing a substrate disposed in a substrate process chamber having a source power includes transferring the substrate into the substrate process chamber. A trench is etched on the substrate by exposing the substrate to a plasma formed from a first etchant gas by applying RF energy from the source power system and biasing the plasma toward the substrate. Byproducts adhering to inner surfaces of the substrate process chamber are removed by igniting a plasma formed from a second etchant gas including a halogen source in the substrate process chamber without applying bias power or applying minimal bias power. Thereafter, the substrate is removed from the chamber. At least 100 more substrates are processed with the etching-a-trench step and removing-etch-byproducts step before performing a dry clean or wet clean operation on the chamber.

Abstract: A method of working a piezoelectric substance, which comprises the steps of, forming, on one surface of a piezoelectric block, an etching mask having an aperture which defines a boundary region between a first piezoelectric segment to be removed, and a second piezoelectric segment to be left remained, forming, on the opposite surface of the piezoelectric block, a sacrificial layer which corresponds to the first piezoelectric segment to be removed and the boundary region, etching the piezoelectric block in the boundary region to reach the sacrificial layer, and eliminating the sacrificial layer to remove the first piezoelectric segment.

Abstract: Semiconductor processing methods of forming conductive projections and methods of increasing alignment tolerances are described. In one implementation, a conductive projection is formed over a substrate surface area and includes an upper surface and a side surface joined therewith to define a corner region. The corner region of the conductive projection is subsequently beveled to increase an alignment tolerance relative thereto. In another implementation, a conductive plug is formed over a substrate node location between a pair of conductive lines and has an uppermost surface. Material of the conductive plug is unevenly removed to define a second uppermost surface, at least a portion of which is disposed elevationally higher than a conductive line. In one aspect, conductive plug material can be removed by facet etching the conductive plug.

Abstract: The object of the present invention is to provide an aqueous dispersion for chemical mechanical polishing which can be polished working film for semiconductor devices and which is useful for STI. The aqueous dispersion for chemical mechanical polishing of the invention is characterized by comprising an inorganic abrasive such as silica, ceria and the like, and organic particles composed of a resin having anionic group such as carboxyl group into the molecular chains. The removal rate for silicon oxide film is at least 5 times, particularly 10 times the removal rate for silicon nitride film. The aqueous dispersion may also contain an anionic surfactant such as potassium dodecylbenzene sulfonate and the like. And a base may also be included in the aqueous dispersion for adjustment og the pH to further enhance the dispersability, removal rate and selectivity.

Abstract: A method for forming a conductive interconnect comprises forming a process layer over a structure layer and forming a mask over the process layer, the mask having an etch profile therein. An anisotropic etching process is performed to erode the mask and to form an etched region in the process layer, the etched region having a profile correlating to the etch profile. A conductive material is formed in the etched region in the process layer and any excess conductive material is removed from above an upper surface of the process layer.