Abstract: A solid state imager is provided that comprises an imaging array of gated photodiodes. The imager comprises a plurality of photosensor pixels arranged in a pixel array, and each of the photosensor pixels includes a photodiode having a sidewall, the sidewall having a gate dielectric layer disposed thereon, and a field plate disposed around the photodiode body. The field plate comprises amorphous silicon disposed on the gate dielectric layer and extends substantially completely around the sidewall of said photodiode. The field plate is electrically coupled to the common electrode of the imaging array so that the field plate creates an electric field around the photodiode body in correspondence with the potential of said common electrode. A method of fabricating the gated photodiode array is also provided.

Abstract: A semiconductor device having an align key, which is simultaneously formed by implanting ions before defining an active region, for a precise alignment with a preformed well on a semiconductor substrate when forming a photoresist pattern for defining the active region, and a method for manufacturing the same are provided The semiconductor device includes the align key formed of a first recess having a first depth from a surface of a semiconductor substrate in a scribe line region of the semiconductor substrate, and a second step portion formed by a second recess having a second depth, which is less than or equal to the first depth, from the surface of the semiconductor substrate in a well region of the semiconductor substrate.

Abstract: An integrated circuit structure with a first layer that has a first conductive area and a second conductive area that is electrically isolated from the first area, and a second layer that has a third conductive area and a fourth conductive area that is electrically isolated from the third area. An edge of the first conductive area has an extended region that protrudes into the second conductive area. An edge of the fourth conductive area has an extended region that protrudes into the third conductive area. The first area is electrically coupled to the fourth area, and the second area is electrically coupled to the third area.

Abstract: Device for photodetection with a vertical metal semiconductor microresonator and procedure for the manufacture of this device. According to the invention, in order to detect an incident light, at least one element is formed over an insulating layer (2) that does not absorb this light, including a semiconductor material (6) and at least two electrodes (4) holding the element, with the element and electrode unit being suitable for absorbing this light and designed to incease the light intensity with respect to the incident light, in particular by making a surface plasmon mode resonate between the unit interfaces with the layer and the propagation medium for the incident light, with the resonance of this mode taking place in teh interface between the element and atleast one of the electrodes, with this mode being excited by the component of the magnetic field of the light, parallel to the electrodes. Application for optical telecommunications.

Abstract: A first dopant impurity producing a conductivity type for formation of an intrinsic base diffusion layer and a dopant impurity producing the opposite conductivity type are implanted into a semiconductor substrate. An exposed surface of the semiconductor substrate is irradiated with a plasma, so that many crystalline defects are produced. Next, a polysilicon film is formed under conditions that cause the grain size to increase. In a portion of the polysilicon film located near the exposed surface of the semiconductor substrate, the grain size becomes relatively small, influenced by the crystalline defects in the substrate surface. In a portion of the polysilicon film located on the silicon oxide film, the grain size becomes relatively large, uninfluenced by the crystalline defects. Thus, degradation of electrical characteristics is suppressed, and variation in resistance of the resistance element is alleviated.

Abstract: A solid-state imaging apparatus of the present invention includes a structure formed of an insulating resin and having a through-aperture, a wiring pattern formed on the surface of the structure, a solid-state image pickup element connected to the wiring pattern and fitted to the structure to cover the through-aperture, and a light transmitting member fitted to the structure to be opposite to the solid-state image pickup element and to cover the through-aperture, and which further comprises, in the light transmitting member fitting area where the light transmitting member is fitted to the structure, a through-groove that communicates with the through-aperture.

Abstract: A semiconductor device includes an insulating film provided on a semiconductor substrate and a semiconductor layer provided on the insulating film. An element separating insulating film separates element area. A first gate insulating film is provided on the semiconductor layer in the element area. A gate electrode is provided on the first gate insulating film. Source/drain diffusion layers are formed in the semiconductor layer sandwiching a channel area under the gate electrode therebetween. A potential applying section inducing a leak current which controls the potential of the semiconductor layer comprises a second gate insulating film provided on the semiconductor layer in the element area and a conductive film provided on the second gate insulating film and connected to the gate electrode. The potential applying section is configured so that a leak current through the second gate insulating film is larger than a leak current through the first gate insulating film.

Abstract: A gate structure for a semiconductor transistor is disclosed. In an exemplary embodiment, the gate structure includes a lower polysilicon region doped at a first dopant concentration and an upper polysilicon region doped at a second concentration, with the second concentration being different than the first concentration. A conductive barrier layer is disposed between the lower and the upper polysilicon regions, wherein the conductive barrier layer prevents diffusion of impurities between the lower and the upper polysilicon regions.

Abstract: The present invention relates to a test structure and a method for forming a test structure over a semiconductor substrate. The test structure comprises a plurality of patterned electrically conductive metal layers within a scribe line. The plurality of metal layers further comprises one or more lower metal layers comprising a plurality of split pads longitudinally spaced along the length of the scribe line, wherein a channel traversing the length of the scribe line is define. One or more top metal layers comprising a plurality of solid pads generally residing over the split pads defines a plurality of columns of pads. One or more conduits generally residing within the channel are associated with one or more lower metal layers and connect two or more split pads associated with the respective one or more lower metal layers, wherein a bow-tie lead is defined.

Abstract: Transistors including a buried channel layer intermediate to a source and a drain and a surface layer intermediate to the buried layer and a gate are operated so as to cause current between the source and the drain to flow predominately through the buried channel layer by applying a back-bias voltage to the transistor. The back-bias voltage modulates a free charge carrier density distribution in the buried layer and in the surface layer.

Abstract: A solid state imaging device includes a MOS image sensor of a threshold voltage modulation system employed in a video camera, an electronic camera, an image input camera, a scanner, a facsimile, or the like. The solid state imaging device includes a photo diode formed in a second semiconductor layer of opposite conductivity type in a first semiconductor layer of one conductivity type, and a light signal detecting insulated gate field effect transistor formed in a fourth semiconductor layer of the opposite conductivity type in a third semiconductor layer of one conductivity type adjacent to the photo diode. A carrier pocket is provided in the fourth semiconductor layer and a portion of the first semiconductor layer under the second semiconductor layer is thicker than that portion of the third semiconductor layer under the fourth semiconductor layer.

Abstract: A metal insulator semiconductor field effect transistor (MISFET) is disclosed comprising a source layer being made with a material having a source band-gap (EG2) and a source mid-gap value (EGM2), the source layer having a source Fermi-Level (EF2). A drain layer has a drain Fermi-Level (EF4). A channel layer is provided between the source layer and the drain layer, the channel layer being made with a material having a channel band-gap (EG3) and a channel mid-gap value (EGM3), the channel layer having a channel Fermi-Level (EF3). A source contact layer is connected to the source layer opposite the channel layer, the source contact layer having a source contact Fermi-Level (EF1). A gate electrode has a gate electrode Fermi-Level (EF6). The source band-gap is substantially narrower (EG2) than the channel band-gap (EG3).

Abstract: In a channel region between the source/drain diffusion layers, impurities of the same conductivity type as the well are doped in an area apart from the diffusion regions. By using as a mask the gate formed in advance, tilted ion implantation in opposite directions is performed to form the diffusion layers and heavily impurity doped region of the same conductivity type as the well in a self-alignment manner relative to the gate.

Abstract: In at least one embodiment, the invention is a temperature sensor having a temperature sensitive material positioned within a shell. The shell has a first section and a second section, which are attached together by a non-adhesive bond. The non-adhesive bond being an atomic bond, such as a diffusion bond. The temperature sensitive material is capable of emitting a radiation signal which varies in its magnitude and character as the material's temperature changes. The shell allows transmission of the radiation signal through the shell to an external processor. Analysis of the emitted radiation signal by the processor can provide a temperature measurement. The temperature sensitive material is a phosphorescent, such as a phosphor. The shell may be made of a material which can be diffusion bonded, such materials include a silicon comprising material, a glass, a plastic, a sapphire and a quartz.

Abstract: The invention relates to a process for making a lateral PNP bipolar electronic device integrated monolithically on a semiconductor substrate together with other bipolar devices of the NPN type, said device being incorporated to an electrically insulated multilayer structure. The device includes a semiconductor substrate doped with impurities of the P type; a first buried layer doped with impurities of the N type to form a base region; and a second layer, overlying the first and having conductivity of the N type, to form an active area with opposite collector and emitter regions being formed in said active area and separated by a base channel region. The width of the base channel region is defined essentially by a contact opening formed above an oxide layer deposited over the base channel region. Advantageously, the contact opening is formed by shifting an emitter mask.

Abstract: A semiconductor anti-interference band distributed on peripheries of partial of regional circuits in an integrated circuit is assembled by an unequal number of PNP structures; two metal bands are disposed on the surface layer of the integrated circuit, wherein one band connects with GND and the other connects with Vcc; to add positive voltage at Vcc increases the charge at P+ tip thereby generating a parasitic capacitance on a poly layer between two P+ tips and limiting a noisy signal within the distributed area; furthermore, the P+ tip and an N well connect to produce a positive voltage zone in a large area to forcefully prevent a noisy signal current from passing through and make it discharge at a ground end with lower voltage so as to achieve the electromagnetic anti-interference function of the integrated circuit.

Abstract: In a MOS type solid-state image sensor having an image pickup area formed at a semiconductor substrate and comprising a two-dimensional array of row and column unit cells including a photoelectric conversion section and signal scanning circuit, a first p well area is provided in a surface portion of an n type silicon substrate and a second p well area is selectively provided in the surface portion of the first p well area and is higher in p type impurity concentration than the first p well area. In the image pickup area, the photoelectric conversion section is formed in the first p well area and the signal scanning circuit section is formed in the second p well area.

Abstract: A combination of materials is used to form the photodiodes of a vertical color imager cell. The materials used to form the photodiodes have different band gaps that allow the photon absorption rates of the photodiodes to be adjusted. By adjusting the photon absorption rates, the sensitivities of the photodiodes and thereby the characteristics of the imager can be adjusted.

Abstract: A semiconductor device is provided having a high voltage driver IC reducing malfunction or device destruction. A high voltage IC chip includes a trench structure that surrounds each of two semiconductor regions at different electrical potentials. Specifically, a first semiconductor region forms a ground-potential-based circuit, and a high voltage junction terminating structure around a second semiconductor region forms a floating-potential-based circuit. A trench structure is formed after digging a trench by implanting a high concentration p+ region on a trench wall, or alternatively, by filling the trench with a p+ doped polysilicon or with a dielectric.

Abstract: A solid imaging device comprises a substrate including a semiconductor layer, a middle layer and a support layer, multiple pixels that each have a photoelectric conversion unit that includes a diffusion layer formed on the surface of the semiconductor layer, and insulating areas that are located such that they reach from the surface of the semiconductor layer to the middle layer and work together with the middle layer to electrically separate the pixels from each other.