Patents Examined by Ha Tran Nguyen
-
Patent number: 7245140Abstract: A semiconductor device includes an ODT (on die termination) pin coupled to a tester that applies a tester termination control signal thereon. The semiconductor device also includes a measure path that transmits the tester termination control signal from the ODT pin to an ODT circuit during measurement of a parameter of the semiconductor device. The ODT pin and the measure path advantageously allow for control of the ODT circuit by the tester for more accurate parameter characterization.Type: GrantFiled: November 12, 2004Date of Patent: July 17, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jung Sunwoo, Jung-Bae Lee
-
Patent number: 7245119Abstract: A fixture for functional testing of an assembled wireless device, the wireless device having a data port and a removable casing concealing a battery cavity having battery contacts, the fixture comprising: a base having an opening formed therein for receiving a retainer, the retainer being rotatably mounted in the opening for rotating from a first position to a second position, the retainer for receiving the wireless device with the removable casing removed while in the first position; a connector mounted in the retainer for engaging the data port of the wireless device when the wireless device is received by the retainer in the first position; and, a battery emulator insert rotatably mounted on the base, the battery emulator insert having power contacts for engaging the battery contacts in the battery cavity of the wireless device when the retainer is rotated to the second position.Type: GrantFiled: March 7, 2005Date of Patent: July 17, 2007Assignee: Research in Motion LimitedInventors: Arkady Ivannikov, Alexander Koch, Marek Reksnis
-
Patent number: 7242211Abstract: A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing test access to these individual cores via a test structure called a wrapper. The wrapper resides at the boundary of the core and provides a way to test the core and the interconnections between cores. The test architecture enables each of the plural wrappers in the IC, including wrappers in cores embedded within other cores, with separate enable signals.Type: GrantFiled: April 1, 2005Date of Patent: July 10, 2007Assignee: Texas Instruments IncorporatedInventor: Lee D. Whetsel
-
Patent number: 7242210Abstract: An inspection apparatus includes an interface connector, an inspection mechanism, and a monitor. The interface connector connects the inspection apparatus with an external device. The inspection mechanism inspects an inspection board using primary data sent by the external device by the interface connector, and informs the external device by the interface connector about an inspection result obtained based on secondary data corresponding to the primary data. The monitor is connected with the interface connector on a primary signal line and monitors the primary and secondary data executed concurrently with an inspecting operation of the inspection mechanism, acquires the primary and secondary data, and transmits the primary and secondary data directly to the external device by the interface connector executed concurrently with an informing operation of the inspection mechanism.Type: GrantFiled: October 12, 2004Date of Patent: July 10, 2007Assignee: Ricoh Company, Ltd.Inventor: Ikuo Koizumi
-
Patent number: 7242176Abstract: Systems and methods for evaluating electromagnetic interference that may be employed, for among other things, to evaluate electronic system immunity to radiated electromagnetic fields and/or to identify particular electronic system areas that are susceptible to electromagnetic radiation.Type: GrantFiled: December 20, 2004Date of Patent: July 10, 2007Assignee: Dell Products, L.P.Inventor: Gary S. Thomason
-
Patent number: 7242212Abstract: A liquid crystal display (LCD) panel test apparatus includes a testing table on which an LCD panel is positioned for testing. A photographing unit disposed over the testing table photographs the LCD panel, enabling an evaluation of the alignment state of the LCD panel. A jig pin in the testing table provides an attachment/detachment path for placing a polarizing plate over the LCD panel so as to avoid contact between the polarization plate and the camera.Type: GrantFiled: December 29, 2005Date of Patent: July 10, 2007Assignee: LG. Philips LCD Co., Ltd.Inventor: Jae-Min Jung
-
Patent number: 7242204Abstract: The present invention provides a substrate aligning system which prevents particles or the like from attaching to a substrate such as a wafer used in the semiconductor manufacturing process, and adjusts the orientation of the substrate accurately within a short period of time. According to a substrate aligning system (A) as a preferred embodiment of the present invention, a plurality of rollers (220) push the peripheral portion of a wafer (W) from different directions to align the center of the wafer. While the center of the wafer is kept aligned by the rollers (220), the contacting portion (211) of a contacting member (210) contacts a chip (Wa) of the wafer (W). The contacting member (210) is then moved arcuately to rotate the wafer (W), thus adjusting the orientation of the wafer.Type: GrantFiled: May 23, 2006Date of Patent: July 10, 2007Assignee: Hirata CorporationInventors: Tetsunori Otaguro, Seiji Matsuda
-
Patent number: 7242208Abstract: A testing system or method compares read data from one or more dies in a semiconductor wafer with the original data written onto the one or more dies. The testing system includes one or more write registers connected to one or more dies on the semiconductor wafer. One or more comparators are connected to the dies and the write registers. The comparator generates a result in response to the original data and the read data.Type: GrantFiled: March 22, 2006Date of Patent: July 10, 2007Assignee: Infineon Technologies AGInventors: David SuitWai Ma, Tao Wang, James J. Dietz, Bing Ren
-
Patent number: 7242179Abstract: A digital circuit operating frequency characterizer provides a combination of frequency and duty cycle characterization. The digital circuit operating frequency characterizer includes a programmable frequency generator, a programmable edge variator, a test engine, and a control circuit. The programmable frequency generator provides one or more output signals, and the programmable edge variator is coupled to one or more outputs of the programmable frequency generator for adjusting duty cycle. The test engine uses the outputs from the programmable edge variator and/or programmable frequency generator to apply a defined test signal sequence to a circuit under test and produce a status output after evaluating the outputs received from the circuit under test. The control circuit is connected to the control inputs of the programmable frequency generator, programmable edge variator, and the status output of the test engine.Type: GrantFiled: December 27, 2004Date of Patent: July 10, 2007Assignee: STMicroelectronics Pvt. Ltd.Inventors: Ruchir Saraswat, Balwant Singh, Hina Mushir
-
Patent number: 7242207Abstract: Handler for testing a semiconductor device including a carrier unit for detachably holding, and carrying a plurality of devices, a test board having a plurality of test sockets for respectively coming into contact with the devices held at the carrier unit for testing the devices, a press unit for respectively pressing, and bringing the devices on the carrier unit into contact with the test sockets on the test board when the carrier unit is aligned with the test board, a spray unit for directly, and selectively spraying a high or low temperature gas to surfaces of the devices in contact with the test sockets from a position in a neighborhood of the devices of the carrier unit, to heat or cool the devices to a preset temperature, a gas supply unit for selectively supplying the high or low temperature gas to the spray unit, and a control unit for controlling the gas supply to the spray unit from the gas supply unit, thereby directly spraying high or low temperature gas to a surface of the device without an encloType: GrantFiled: November 4, 2005Date of Patent: July 10, 2007Assignee: Mirae CorporationInventor: Chan Ho Park
-
Patent number: 7239164Abstract: A stack type semiconductor apparatus package includes: (i) a first circuit substrate, (ii) a semiconductor apparatus package mounted on the first circuit substrate, (iii) a semiconductor apparatus, and (iv) a sealing resin for covering them. The first circuit substrate has a surface on which first connecting pads and second connecting pads are provided. The first connecting pads are connected to first external input/output terminals of the semiconductor apparatus package, and the second connecting pads are connected to electrodes of the first semiconductor apparatus, respectively. On a rear surface of the first circuit substrate, there are provided second external input/output terminals connected to the first connecting pads and the second connecting pads. The semiconductor apparatus package includes: a second circuit substrate, and a second semiconductor apparatus mounted on the second circuit substrate.Type: GrantFiled: August 1, 2005Date of Patent: July 3, 2007Assignee: Sharp Kabushiki KaishaInventor: Kazuo Tamaki
-
Patent number: 7239158Abstract: A holder supported by an arm comprises a metallic reinforcing member and a plastic holder hole forming member filled in an opening formed in the reinforcing member. Holder holes are formed in the holder hole forming member, and a coil spring and electroconductive needle members are installed in each holder hole to thereby provide a contact probe having two moveable ends. Because the holder is essentially made of the metallic member, the mechanical strength of the holder can be improved over that formed strictly from plastic material. Therefore, the contact probe holder would not suffer from dimensional changes of the holder owing to aging compounded by temperature changes for testing (tests under high temperature conditions) and residual stress so that the change in the pitch of the holder holes can be avoided, and a high level of precision can be ensured. Therefore, the contact probe allows tests to be conducted in a stable manner over an extended period of time.Type: GrantFiled: April 16, 2003Date of Patent: July 3, 2007Assignee: NHK Spring Co., Ltd.Inventors: Toshio Kazama, Mitsuhiro Nagaya, Hiroyasu Sotoma
-
Patent number: 7239163Abstract: A die-level process monitor (DLPM) provides a means for independently determining whether an IC malfunction is a result of the design or the manufacturing processing and further for gathering data on specific process parameters. The DLPM senses parameter variations that result from manufacturing process drift and outputs a measure of the process parameter. The DLPM will typically sense the mismatch of process parameters between two or more test devices as a measure of process variation between a like pair of production devices. The DLPM may be used as a diagnostic tool to determine why an IC failed to perform within specification or to gather statistics on measured process parameters for a given foundry or process.Type: GrantFiled: June 17, 2005Date of Patent: July 3, 2007Assignee: Ridgetop Group, Inc.Inventors: Jeremy John Ralston-Good, Philipp S. Spuhler, Bert M. Vermeire, Douglas Leonard Goodman
-
Patent number: 7239168Abstract: A method and apparatus for measuring current by a single sensor for two motor phases driven by first and second set of switches to drive respective first and second phases of a motor under control of PWM signals. A first step 100 includes reading a duty cycle of each winding drive current. A next step configures 104, 110, 114, 116, 118 the PWM signals to provide at least one timing window wherein at least of one of the windings of the motor is being driven while the other winding is not being driven, and to provide a relative timing offset of approximately one-half cycle between the pulse width modulation signals driving a first winding and a second winding of the motor. A next step 90 includes gating the switches with the configured PWM signals. A next step 95 includes sampling the current of the at least one of the windings with a single sensor.Type: GrantFiled: February 16, 2006Date of Patent: July 3, 2007Assignee: Temic Automotive of North America, Inc.Inventors: Ronan de Larminat, Alexander Kurnia, Guang Liu
-
Patent number: 7239124Abstract: A current measurement method for measuring a current that flows in a transmission line of an electric circuit including steps of installing a magnetooptical device in a magnetic field which is generated based upon current that flows in the transmission line, making a polarized light on the magnetooptical device, and acquiring a current based upon the variation of the polarization of reflected light from the magnetooptical device on which the polarized light is incident.Type: GrantFiled: August 5, 2004Date of Patent: July 3, 2007Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventor: Hiroshi Ikekame
-
Patent number: 7239157Abstract: Optical triggering system and method for synchronizing a test of an integrated circuit chip with its operation. An optical triggering system includes a testing mechanism, such as a PICA testing mechanism, for testing an integrated circuit chip. An optical trigger mechanism generates an optical trigger signal for synchronizing a test of the integrated circuit chip with its operation. The optical trigger mechanism provides an optical trigger signal having reduced jitter and a higher frequency rate than an electrical trigger signal resulting in a more accurate test of the integrated circuit chip.Type: GrantFiled: April 5, 2005Date of Patent: July 3, 2007Assignee: International Business Machines CorporationInventors: Franco Stellari, Peilin Song
-
Patent number: 7235993Abstract: A method for testing an integrated circuit (IC) that includes a step of mechanically turning on off an electrical connection to a test pin disposed on an electronic test head. The method further includes a step of rotating a driving rod to engage a switching wheel or other similar means for turning on-off of an electrical connection.Type: GrantFiled: July 8, 2004Date of Patent: June 26, 2007Inventor: Fong Luk
-
Patent number: 7235991Abstract: In an example embodiment, an insert having an independently movable latch mechanism for loading a semiconductor package may include an insert body having a pocket, latch units installed at opposite sides of the pocket, and a press plate elastically installed above the insert body. The latch units prevent a loaded semiconductor package from escaping out of the pocket. The press plate may operate the latch unit by movement relative to an upper surface of the insert body. Each latch may be movably connected to the insert body such that a first end of the latch is rotatable around a fixed shaft pin. A second end of the latch may be movable into and out of the pocket. The latch may have a front surface slanted downwards towards the center of the pocket and have a guide hole near the back surface, opposite the front surface.Type: GrantFiled: March 29, 2006Date of Patent: June 26, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-Woog Kim, Seok-Ho Jin, Seok-Young Yoon, Se-Un Lee, Hyeck-Jin Jeong
-
Patent number: 7235990Abstract: A probe station allows for effective EMI shielding of the passage of the probe through the wall of the housing of such probe station. The probe is freely movable in the X, Y and Z directions. The probe station comprises a housing having at least one aperture through which a probe can extend, a chuck for supporting a test device, the chuck being arranged inside the housing, at least one probe support for supporting a probe, the probe support being arranged relative to the housing such that a first portion of the probe extends into the housing through one of said apertures, at least one positioning mechanism enabling at least one of said probe and said chuck to move relative to the other, and is characterized in that at least one electrically conductive, elastic bellows is attached to the edge of an aperture which provides a variable passage for the probe.Type: GrantFiled: December 12, 2005Date of Patent: June 26, 2007Assignee: SUSS MicroTec Test Systems GmbHInventors: Stefan Kreissig, Joerg Kiesewetter
-
Patent number: 7235992Abstract: A semiconductor facility. The semiconductor facility comprises a printed circuit board (PCB), a heat source, and an adjusting device. The PCB comprises a first surface and a second surface. The heat source provides heat for a first fluid around the PCB to steadily heat up the PCB. The temperature of the first surface is adjusted to be lower than that of the second surface by the adjusting device such that the PCB is rapidly deformed to a stable state.Type: GrantFiled: June 7, 2005Date of Patent: June 26, 2007Assignee: Powerchip Semiconductor Corp.Inventors: Yu-Hsin Liu, Te-Hsing Chiang, Yu-Shu Chen