Abstract: A three-dimensional (3D) semiconductor memory device including: first and second semiconductor layers horizontally spaced apart from each other; a buried insulating layer between the first and second semiconductor layers; a first cell array structure disposed on the first semiconductor layer, and a second cell array structure disposed on the second semiconductor layer; and an isolation structure disposed on the buried insulating layer between the first and second cell array structures, wherein the first cell array structure includes: an electrode structure including electrodes, which are stacked in a direction perpendicular to a top surface of the first semiconductor layer; and a first source structure disposed between the first semiconductor layer and the electrode structure, the first source structure is extended onto the buried insulating layer, and the isolation structure is between the first source structure of the first cell array structure and a second source structure of the second cell array structur

Abstract: A method for forming a semiconductor device is disclosed. A substrate having a semiconductor substrate, an insulator layer on the semiconductor substrate, and a silicon device layer on the insulator layer is provided. At least one capacitor cavity with corrugated sidewall surface is formed within the insulator layer between the semiconductor substrate and the silicon device layer. At least one buried capacitor is formed in the at least one capacitor cavity. The at least one buried capacitor comprises inner and outer electrodes with a capacitor dielectric layer therebetween. At least one transistor is formed on the substrate. The at least one transistor comprises a source region, a drain region, a channel region between the source region and the drain region, and a gate over the channel region. The source region is electrically connected to the inner electrode of the at least one buried capacitor.

Abstract: Described are light emitting apparatus with self-aligned elements and techniques for manufacturing such light emitting apparatus. In certain embodiments, a method for manufacturing a light emitting apparatus involves forming a plurality of semiconductor layers including a first semiconductor layer, a second semiconductor layer, and a light emission layer between the first semiconductor layer and the second semiconductor layer. The method further involves forming an electrical contact and a spacer. The electrical contact is formed on a surface of the first semiconductor layer. The spacer is formed on the surface of the first semiconductor layer, around the electrical contact. After forming the spacer, the plurality of semiconductor layers is etched to form a mesa with sidewalls that extend from an outer edge of the spacer. The spacer operates as an etch mask that causes the electrical contact to be substantially centered between opposing sidewalls of the mesa.

Abstract: A DRAM and its manufacturing method are provided. The DRAM includes a buried word line, a first dielectric layer, a bit line, and a bit line contact structure. The buried word line is formed in a word line trench of the substrate, and extends along a first direction. The first dielectric layer is formed in the word line trench, located on the buried word line, and has a top surface lower than the top surface of the substrate. The bit line contact structure is formed on the substrate, and has a bottom surface higher than the top surface of the first dielectric layer. The bit line is formed on the substrate and extends along a second direction perpendicular to the first direction.

Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

Abstract: An organic light-emitting display apparatus including a first substrate including a display area and a peripheral area; a second substrate opposing the first substrate; an insulating layer disposed on the first substrate and including one or more openings; and a sealing member interconnecting the first substrate and the second substrate to each other and interposed between the first and second substrates. The one or more openings are disposed between a first conductive layer disposed on the display area and a second conductive layer disposed on the peripheral area. The one or more openings are at least partially or entirely filled with the sealing member.

Abstract: The present disclosure relates to a fabricating method of a semiconductor memory device including the following steps. Firstly, a substrate is provided, and a plurality of gate structures is formed in the substrate, with each of the gate structures being parallel with each other and extending along a first direction. Next, a plurality of isolation fins is formed on the substrate, wherein each of the isolation fins is parallel with each other and extends along the first direction, over each of the gate structures respectively. After forming the isolation fins, at least one bit line is formed on the substrate, extending along a second direction being perpendicular to the first direction, wherein the at least one bit line comprises a plurality of pins extending along a direction being perpendicular to the substrate, and each of the pins is alternately arranged with each of the isolation fins along the second direction.

Abstract: A device is disclosed. The device includes a first semiconductor fin, a first source-drain epitaxial region adjacent a first portion of the first semiconductor fin, a second source-drain epitaxial region adjacent a second portion of the first semiconductor fin, a first gate conductor above the first semiconductor fin, a gate spacer covering the sides of the gate conductor, a second semiconductor fin below the first semiconductor fin, a second gate conductor on a first side of the second semiconductor fin and a third gate conductor on a second side of the second semiconductor fin, a third source-drain epitaxial region adjacent a first portion of the second semiconductor fin, and a fourth source-drain epitaxial region adjacent a second portion of the second semiconductor fin. The device also includes a dielectric isolation structure below the first semiconductor fin and above the second semiconductor fin that separates the first semiconductor fin and the second semiconductor fin.

Abstract: A reliable light-emitting element with low driving voltage is provided. The light-emitting element includes an electron-injection layer between a cathode and a light-emitting layer. The electron-injection layer is a mixed film of a transition metal and an organic compound having an unshared electron pair. An atom of the transition metal and the organic compound form SOMO.

Abstract: A display panel having improved product reliability includes a substrate including an opening area, a synchronization display area surrounding the opening area, and a display area arranged on a periphery of the synchronization display area, a plurality of signal lines arranged over the substrate, a first sub-pixel including a first pixel electrode arranged in the display area and a first intermediate layer which is arranged on the first pixel electrode and emits light having a first wavelength, a first synchronization sub-pixel including a first synchronization pixel electrode arranged in the synchronization display area and a first synchronization intermediate layer which is arranged on the first synchronization pixel electrode and emits light having the first wavelength as the first sub-pixel, and a first conductive layer connecting the first pixel electrode to the first synchronization pixel electrode.

Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.

Abstract: Provided is a semiconductor device including electronic components electrically joined to each other via a metal nanoparticle sintered layer, wherein the metal nanoparticle sintered layer has formed therein a metal diffusion region in which a metal constituting a metallization layer formed on a surface of one of the electronic components is diffused, and in which the metal is present in an amount of 10 mass % or more and less than 100 mass % according to TEM-EDS analysis, and wherein the metal diffusion region has a thickness smaller than a thickness of the metallization layer.

Abstract: An apparatus comprises active word lines extending within a semiconductive material, passing word lines extending adjacent to the active word lines within the semiconductive material, isolation regions adjacent to the passing word lines, and a band offset material adjacent to the passing word lines and the isolation regions. The semiconductive material exhibits a first bandgap and the band offset material exhibits a second, different bandgap. Related methods and systems are also described.

Abstract: An organic light-emitting display apparatus includes: first and second pixel electrodes on a substrate, and spaced from each other; a pixel-defining film surrounding edges of the first and second pixel electrodes; a first intermediate layer on the first pixel electrode; a second intermediate layer on the second pixel electrode, spaced from the first intermediate layer; a first counter electrode on the first intermediate layer; a second counter electrode on the second intermediate layer, spaced from the first counter electrode; a first passivation layer on the first counter electrode; a second passivation layer on the second counter electrode, spaced from the first passivation layer; a first bank around the first passivation layer and protruding from the pixel-defining film to extend in a direction away from the substrate; and a second bank around the second passivation layer and protruding from the pixel-defining film to extend in the direction away from the substrate.

Abstract: A semiconductor package includes a semiconductor die, a first thermal conductive pattern and a second thermal conductive pattern. The semiconductor die is encapsulated by an encapsulant. The first thermal conductive pattern is disposed aside the semiconductor die in the encapsulant. The second thermal conductive pattern is disposed over the semiconductor die, wherein the first thermal conductive pattern is thermally coupled to the semiconductor die through the second thermal conductive pattern and electrically insulated from the semiconductor die.

Abstract: The present disclosure provides an OLED display substrate, a fabricating method thereof and a display device. The OLED display substrate includes a substrate; an inorganic layer and a light-emitting unit on substrate, light-emitting unit being on a side of inorganic layer away from substrate and including a light-emitting structure; a camera on a side of substrate away from inorganic layer, and light-emitting unit being not in orthographic projection region; a protective layer in orthographic projection region and on side of inorganic layer away from substrate, wherein protective layer is configured to protect inorganic layer in orthographic projection region from warping or cracking in a process of removing part of light-emitting structure in orthographic projection region by laser cutting.

Abstract: A substrate (100) is a light-transmitting substrate. A light-transmitting first electrode (110) is formed over the substrate (100). An insulating layer (150) is formed over the substrate (100) and the first electrode (110) and includes an opening (152) overlapping the first electrode (110). An organic layer (120) is located within at least the opening (152). A light-transmitting second electrode (130) is formed over the organic layer (120). An intermediate layer (200) is formed in at least a portion of a region of a lateral side of the first electrode (110) overlapping the first electrode (110). A refractive index of the intermediate layer (200) is between a refractive index of the substrate (100) and a refractive index of the first electrode (110).

Abstract: A semiconductor device includes a semiconductor element having a surface electrode layer; a first wire that is electrically connected to the first main surface of the surface electrode layer at a plurality of first connecting portions and is arranged in a first direction on the first main surface; and a second wire that is electrically connected to the first main surface of the surface electrode layer at a second connecting portion and is arranged in a second direction on the first main surface, wherein a second circle equivalent diameter, which is a diameter of a circle having a same cross-sectional area as the second wire, is larger than a first circle equivalent diameter, which is a diameter of a circle having a same cross-sectional area as the first wire.

Abstract: The present application discloses a method for fabricating a semiconductor device including providing a substrate comprising an array region and a peripheral region surrounding the array region, forming a first semiconductor element positioned above the peripheral region and having a first threshold voltage and a second semiconductor element positioned above the peripheral region and having a second threshold voltage, and forming a plurality of capacitor structures positioned above the peripheral region of the substrate. The first threshold voltage of the first semiconductor element is different from the second threshold voltage of the second semiconductor element.

Abstract: A display apparatus includes a display area and a transmission area on a substrate, and an intermediate area arranged between the display area and the transmission area and including a first sub-intermediate area and a second sub-intermediate area between the first sub-intermediate area and the transmission area, and a number of layers of thin films stacked on the substrate in the first sub-intermediate area is different from a number of layers of thin films stacked on the substrate in the second sub-intermediate area.