Abstract: An organic light emitting display device including: a first emission area including a first organic light emitting diode; a second emission area arranged adjacent to the first emission area and not overlapping with the first emission area, the second emission area including a second organic light emitting diode; a pixel circuit unit electrically connected to the first organic light emitting diode and the second organic light emitting diode; and a transmissive area adjacent to the first and second emission areas and not overlapping with the first and second emission areas, the transmissive area configured to transmit external light therethrough.

Abstract: A method of fabricating a semiconductor device and a semiconductor device formed by the method. The method includes form a stack conductive structure by stacking a first conductive pattern and an insulation pattern over a substrate; forming a sacrificial pattern over sidewalls of the stack conductive structure; forming a second conductive pattern having a recessed surface lower than a top surface of the stack conductive structure; forming a sacrificial spacer to expose sidewalls of the insulation pattern by removing an upper portion of the sacrificial pattern; reducing a width of the exposed portion of the insulation patters; forming a capping spacer to cap the sidewalls of the insulation pattern having the reduced width over the sacrificial spacer; and forming an air gap between the first conductive pattern and the second conductive pattern by converting the sacrificial spacer to volatile byproducts.

Abstract: Method of encapsulating a semiconductor structure comprising providing a semiconductor structure comprising an opto-electric element located in a cavity formed between a substrate and a cap layer, the cap layer being made of a material transparent to light, and having a flat upper surface; forming at least one protrusion on the cap layer; bringing the at least one protrusion of the cap layer in contact with a tool having a flat surface region, and applying a opaque material to the semiconductor structure where it is not in contact with the tool; and removing the tool thereby providing an encapsulated optical semiconductor device having a transparent window integrally formed with the cap layer.

Abstract: A method of placing a dummy fill layer on a substrate is disclosed (FIG. 2). The method includes identifying a sub-region of the substrate (210). A density of a layer in the sub-region is determined (212). A pattern of the dummy fill layer is selected to produce a predetermined density (216). The selected pattern is placed in the sub-region (208).

Abstract: An embodiment of a method of manufacturing a semiconductor device includes forming an oxygen diffusion barrier on a first surface of a Czochralski or magnetic Czochralski silicon substrate. A silicon layer is formed on the oxygen diffusion barrier. P-doped and n-doped semiconductor device regions are formed in the silicon layer. The method also includes forming first and second load terminal contacts.

Abstract: There is provided a solid-state imaging apparatus including a plurality of photoelectric conversion regions which photoelectrically convert light incident from a rear surface side of a semiconductor substrate, element isolation regions formed between the plurality of photoelectric conversion regions arranged in a matrix shape, and shielding members formed on upper surfaces of the element isolation regions. The element isolation regions have high impurity concentration regions of a high impurity concentration connected to at least a part of the shielding members.

Abstract: A GaN based LED epitaxial structure and a method for manufacturing the same. The GaN based LED epitaxial structure may include: a substrate; and a GaN based LED epitaxial structure grown on the substrate, wherein the substrate is a substrate containing a photoluminescence fluorescent material. The photoelectric efficiency of the LED epitaxial structure is enhanced and the amount of heat generated from a device is reduced by utilizing a rare earth element doped Re3Al5O12 substrate; since the LED epitaxial structure takes a fluorescence material as a substrate, a direct white light emission may be implemented by such an LED chip manufactured by the epitaxial structure, so as to simplify the manufacturing procedure of the white light LED light source and to reduce production cost. The defect density of the epitaxial structure is reduced by firstly epitaxial growing, patterning the substrate and then laterally growing a GaN based epitaxial structure.

Abstract: A method of forming a punch through stop region that includes forming isolation regions of a first dielectric material between adjacent fin structures and forming a spacer of a second dielectric material on sidewalls of the fin structure. The first dielectric material of the isolation region may be recessed with an etch process that is selective to the second dielectric material to expose a base sidewall portion of the fin structures. Gas phase doping may introduce a first conductivity type dopant to the base sidewall portion of the fin structure forming a punch through stop region underlying a channel region of the fin structures.

Abstract: A back-illuminated type solid-state image pickup unit in which a pad wiring line is provided on a light reception surface and which is capable of improving light reception characteristics in a photoelectric conversion section by having a thinner insulating film in a pixel region. The solid-state image pickup unit includes a sensor substrate having a pixel region in which photoelectric conversion sections are formed in an array, and a drive circuit is provided on a surface opposed to a light reception surface for the photoelectric conversion sections of the sensor substrate. A through hole via reaching the drive circuit from the light reception surface of the sensor substrate is provided in a peripheral region located outside the pixel region. A pad wiring line directly laminated on the through hole via is provided on the light reception surface in the peripheral region.

Abstract: A method of manufacturing a semiconductor device, comprising: providing a substrate; forming a first trough structure, which comprises at least a first sidewall, on the substrate; forming a first doping layer on the first sidewall; covering the first doping layer and a part of a surface of the substrate by a photoresist; forming a second trough structure, which comprises at least a second sidewall, on a part of the substrate which is not covered by the photoresist; removing the photoresist; forming an insulation layer on the substrate, the first trough structure, and the second trough structure; forming a conductive layer on the substrate, the first trough structure, and the second trough structure; and removing parts of the insulation layer and the conductive layer outside the first trough structure and the second trough structure to expose a surface of the first doping layer at the opening of the first trough structure.

Abstract: A structure comprises a first semiconductor chip with a first metal bump and a second semiconductor chip with a second metal bump. The structure further comprises a solder joint structure electrically connecting the first semiconductor chip and the second semiconductor chip, wherein the solder joint structure comprises an intermetallic compound region between the first metal bump and the second metal bump, wherein the intermetallic compound region is with a first height dimension and a surrounding portion formed along exterior walls of the first metal bump and the second metal bump, wherein the surrounding portion is with a second height dimension, and wherein the second height dimension is greater than the first height dimension.

Abstract: A display device includes a first substrate, pixel electrodes located in correspondence with pixels above the first substrate, a first partition covering ends of a group of the pixel electrodes, a second partition covering ends of another group of the pixel electrodes, the second partition being lower than the first partition, a solid filler located above the first partition and the second partition, and a second substrate facing the first substrate, the second substrate being away from the first substrate by a distance kept by the first partition, the second partition and the filler.

Abstract: There is provided a conductive pattern forming method that can suppress shape abnormalities caused by the reattachment of a neodymium component. A conductive pattern forming method according to an aspect of the invention includes forming an aluminum-neodymium alloy film on a base material; forming, on the aluminum-neodymium alloy film, a conductive film having a thickness greater than or equal to ¼ times the thickness of the aluminum-neodymium alloy film; and patterning the aluminum-neodymium alloy film and the conductive film by using dry etching.

Abstract: A dielectric substrate comprises a resin composition impregnated with non-woven fibrous mat material having a thickness of 5 mils (127 micrometers), wherein the fibrous mat material comprises fibers, having a diameter of 1 nm to 10 ?m, that have been extruded through one or more openings to produce fibers that have been collected in the form of a fibrous non-woven mat, and wherein the fibers exhibit a multi-directional orientation in the non-woven mat material. The dielectric substrate is useful in circuit materials, circuits, and multi-layer circuits, economical to make, and has excellent electrical and mechanical properties.

Abstract: A light-emitting device is disclosed that includes a light-emitting stack comprising a first surface; a patterned dielectric layer formed on the first surface, comprising a first portion and a second portion substantially surrounding the first portion and having substantially the same thickness with that of the first portion; a first reflective electrode covering the first portion of the patterned dielectric layer; and a barrier layer covering the first reflective electrode and the second portion of the patterned dielectric layer.

Abstract: A semiconductor device has a first insulating layer formed over a first surface of a polymer matrix composite substrate. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and first conductive layer. The second conductive layer is wound to exhibit inductive properties. A third conductive layer is formed between the first conductive layer and second conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. A bump is formed over the second conductive layer. A fourth insulating layer can be formed over a second surface of the polymer matrix composite substrate. Alternatively, the fourth insulating layer can be formed over the first insulating layer prior to forming the first conductive layer.

Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at. %. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.

Abstract: A technique relates to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses.

Abstract: A semiconductor device is made by forming a conductive layer over a first sacrificial carrier. A solder bump is formed over the conductive layer. A no-flow underfill material is deposited over the first carrier, conductive layer, and solder bump. A semiconductor die or component is compressed into the no-flow underfill material to electrically contact the conductive layer. A surface of the no-flow underfill material and first solder bump is planarized. A first interconnect structure is formed over a first surface of the no-flow underfill material. The first interconnect structure is electrically connected to the solder bump. A second sacrificial carrier is mounted over the first interconnect structure. A second interconnect structure is formed over a second side of the no-flow underfill material. The second interconnect structure is electrically connected to the first solder bump. The semiconductor devices can be stacked and electrically connected through the solder bump.

Abstract: An organic light-emitting display apparatus includes a substrate, a display unit, an encapsulation layer, and a protection layer. The display unit is formed on the substrate. The encapsulation layer covers the display unit. The protection layer is formed on the encapsulation layer. The encapsulation layer is formed of a low temperature viscosity transition (LVT) inorganic material. The protection layer is formed of an elastic, adhesive material to protect the encapsulation layer from an external force.