Patents Examined by Jean B. Jeanglaude
  • Patent number: 10263632
    Abstract: Methods and systems are provided for gain control during communications. A first electronic device may communicated data to a second electronic device; may monitor conditions and/or parameters affecting estimated reception performance at the second electronic device; and may communicated to the second electronic device, via a connection separate from and different than a connection used in communicating the data, information relating to the monitored conditions, to enable adjusting functions relating to reception of the data at the second electronic device. Based on the received information, at least one reception related function in the second electronic device may be controlled. The controlling may include determining, based on the received information, adjustments to the at least one reception related function or to a related parameter. The at least one reception related function may include applying gain to at least a portion of signals received by the second electronic device.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: April 16, 2019
    Assignee: MAXLINEAR, INC.
    Inventors: Raja Pullela, Curtis Ling
  • Patent number: 10263635
    Abstract: Method and apparatus for nonlinear signal processing include mitigation of outlier noise in the process of analog-to-digital conversion and adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. Methods, processes and apparatus for real-time measuring and analysis of variables include statistical analysis and generic measurement systems and processes which are not specially adapted for any specific variables, or to one particular environment. Methods and corresponding apparatus for mitigation of electromagnetic interference, for improving properties of electronic devices, and for improving and/or enabling coexistence of a plurality of electronic devices include post-processing analysis of measured variables and post-processing statistical analysis.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: April 16, 2019
    Inventor: Alexei V. Nikitin
  • Patent number: 10263321
    Abstract: A planar antenna assembly includes an antenna and a long transmission line. The antenna is configured to receive a radio wave signal from the outside. The radio wave signal received by the antenna is transmitted through the transmission line. The antenna and the transmission line are formed in a planar shape. The transmission line includes a conductor having a thickness thicker than a thickness of the antenna.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: April 16, 2019
    Assignee: YAZAKI CORPORATION
    Inventors: Mizuki Shirai, Hiroki Kondo
  • Patent number: 10256550
    Abstract: Systems and methods are described for operating a waveguide device having multiple slots, each slot having one or more switches. The waveguide device receives, from a circuit controller, an instruction to dynamically deactivate one or more switches to open selected ones of the multiple slots at determined locations in the waveguide device and to dynamically activate one or more switches to close selected ones of the multiple slots at determined locations in the waveguide device, wherein the circuit controller is communicatively coupled to each of the switches on the waveguide device. The waveguide device transmits a wave in a target direction based at least in part on the locations of the open selected ones of the multiple slots at the determined locations in the waveguide device.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: April 9, 2019
    Assignee: Ossia Inc.
    Inventors: Hatem Ibrahim Zeine, Seyed Ali Malek Abadi, Alireza Pourghorban Saghati, Prithvi Shylendra
  • Patent number: 10256535
    Abstract: Selectively shielded radio frequency modules are disclosed. A radio frequency module can include a package substrate, a radio frequency component on the package substrate, a multi-layer antenna, a radio frequency shielding structure configured to provide shielding between the multi-layer antenna and the radio frequency component. The radio frequency shielding structure can include a shielding layer providing a shield over the radio frequency component and leaving the radio frequency module unshielded over the antenna.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 9, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Hoang Mong Nguyen, Anthony James LoBianco, Gregory Edward Babcock, Darren Roger Frenette, George Khoury, René Rodriguez
  • Patent number: 10249941
    Abstract: A radar system for a motor vehicle includes a mounting bracket and a radar support bracket carried on the mounting bracket. The radar support bracket is displaceable between a deployed position and a deflected position. A biasing element biases the radar support toward the deployed position. A radar module is carried on the radar support bracket.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: April 2, 2019
    Assignee: Ford Global Technologies, LLC
    Inventors: Martin D. Lopez, Jr., Robert Harold Vasbinder, Michael Jon Gutowski, Matthew Dennis Smith Boswell
  • Patent number: 10250272
    Abstract: A digital-to-analog converter (DAC) may have an encoder that generates a multi-bit output based on a multi-bit input, a plurality of first converter elements, with each first converter element generating an output according to a single bit of the multi-bit output of the encoder; and a combiner that generates a combined output based on combining outputs from the plurality of first converter elements. The number of bits in the multi-bit input being two or more and the number of bits in the multi-bit output being greater than the number of bits in the multi-bit input. The DAC may also have one or more second converter elements, with second converter element generating an output according to a single bit, and the combiner may generates the combined output based on combining outputs from the plurality of first converter elements with outputs from the one or more second converter elements.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: April 2, 2019
    Assignee: MAXLINEAR, INC.
    Inventor: Jianyu Zhu
  • Patent number: 10243580
    Abstract: A digital to analog converter (DAC) that provides an output that is iteratively stepped as the DAC increments or decrements from its digital input to analog output. The DAC has configurable registers to store a timer count value, an iteration value, and the input value. A state machine compares the iteration value to current DAC values, and adds or subtracts the iteration value until the final output is reached.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: March 26, 2019
    Assignee: SOUTHWEST RESEARCH INSTITUTE
    Inventor: Mark A. Johnson
  • Patent number: 10243581
    Abstract: A method and apparatus for implementing FIR filters in a processor includes a plurality of execution units executing instructions of an instruction set. The execution units include a number of FIR filter circuits, each of which is associated with a corresponding one of a number FIR filter instructions. Furthermore, each of the FIR filter circuits is and dedicated exclusively to executing its corresponding one of the FIR filter instructions. Each FIR filter execution unit receives input data and provides filtered output data.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 26, 2019
    Assignee: Apple Inc.
    Inventors: Richard T. Witek, Peter C. Eastty
  • Patent number: 10236559
    Abstract: An apparatus and associated method are provided involving a housing having a periphery configured to operate as a second antenna, a third antenna, and a fourth antenna. The periphery includes a top wall having a first slot formed therein, a first side wall having a second slot formed therein, and a second side wall having a third slot formed therein. The top wall is arranged between the first side wall and the second side wall, and a top portion of the periphery is defined between the second slot and the third slot. The top portion is divided into a first top side portion and a second top side portion via the first slot. Further, the first top side portion operates as the second antenna, and the second top side portion operates as both the third antenna and the fourth antenna.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: March 19, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Chulmin Han, Wee Kian Toh, Wei Huang, Hongwei Liu
  • Patent number: 10230391
    Abstract: A computing device includes a memory and a controller. The controller is configured to encrypt and/or compress a file by transforming at least a portion of said file to a number and transforming the number to an exponent vector comprising at least one exponent, wherein each exponent corresponds to a base in a base vector, whereby the file is represented by the exponent vector and a family constant. The family constant is configured to align the number to be compressed and/or encrypted into a table family number, and the table family number represents a number family which is evenly dividable with the number.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: March 12, 2019
    Assignee: KELICOMP AB
    Inventor: Elise Revell
  • Patent number: 10230169
    Abstract: A small, inexpensive, printable meta-antenna system is described. In addition to being smaller than existing antennas, the meta-antenna improves over them by being omni-directional, and having a broader gain function and better efficiency. Some embodiments include a main element with a shape of a loop and two parasitic elements enclosed by the main element. Each parasitic element may be shaped as a loop with an opening. The openings of the two parasitic elements may be positioned adjacent to opposing sides of the main element, respectively.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: March 12, 2019
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventor: George W. Daniel
  • Patent number: 10230166
    Abstract: A reconfigurable antenna comprises a plurality of antenna feed elements, a plurality of plasma switches respectively associated with the antenna feed elements, and control circuitry for independently operating the plasma switches to selectively activate and deactivate the antenna feed elements. Each plasma switch may comprise a volume of inert gas, and a pair of electrodes spanning the respective volume of inert gas. The reconfigurable antenna may comprise a power supply for supplying a voltage to the pair of electrodes of each of plasma switch sufficient to ignite the respective inert gas volume into a plasma field to deactivate the respective antenna feed element. Each plasma switch may optionally be operated to attenuate each antenna feed element.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 12, 2019
    Assignee: The Boeing Company
    Inventors: Larry L. Savage, Ted R. Dabrowski, Colin A. Diehl, John D. Williams, Enrique J. Ruiz
  • Patent number: 10224949
    Abstract: An example apparatus for converting a plurality of analog signals to a plurality of digital signals includes: a plurality of successive approximation (SAR) analog-to-digital converters (ADCs) each including a first input configured to receive a respective one of the plurality of analog signals, a second input configured to receive a reference signal, and an output configured to provide a respective one of the plurality of digital signals; and a shared cycle LSB generator coupled to the plurality of SAR ADCs and configured to provide the reference signal shared by the plurality of SAR ADCs.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: March 5, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Zheming Li, Steve Chikin Lo, Chunbo Liu
  • Patent number: 10224944
    Abstract: A low power voltage regulator includes a weighted transistor array having a plurality of transistor switches with a total conductance of G, corresponding to bits from a MSB to LSB. A transistor switch corresponding to the MSB has a conductance of G/2 and remaining bits have a consecutive descending conductance of G/2N to the LSB, and search time takes a low number of cycles by starting with the MSB. A redundant LSB transistor switch has the same G/2N conductance of the LSB. The redundant LSB is used to correct steady-state errors, and a proportional derivative controller compensates output voltage. The compensation in a method eliminates an output pole of the voltage regulator to provide a stable voltage regulator operation irrespective of load current, load capacitance, or sampling frequency. Voltage can be regulated via the additional LSB below the resolution limit via pulse width modulation.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: March 5, 2019
    Assignee: The Regents of the University of California
    Inventors: Loai Galal Bahgat Salem, Patrick Mercier
  • Patent number: 10224632
    Abstract: An insulating substrate including a principal surface and coil antennas disposed on the substrate and each including a coil conductor. The coil conductor includes a winding axis in a direction parallel or substantially parallel to the principal surface of the substrate. An auxiliary loop conductor that is connected to the coil conductors of the coil antennas and generates a magnetic flux that is in phase with those of the coil antennas as seen from the direction of the winding axis of the coil conductor is provided in and on the substrate.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: March 5, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Nobuyuki Tenno, Naoto Ikeda
  • Patent number: 10218379
    Abstract: Some embodiments include apparatus and methods using a first digital-to-time converter (DTC) circuit to receive an input clock signal and generate a first clock signal based on the input clock signal, a second DTC circuit to receive the input clock signal and generate a second clock signal based on the input clock signal, and an output circuit to receive the first and second clock signals to generate an output clock signal based on the first and second clock signals.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Rotem Banin, Elias Nassar, Inbar Falkov, Eyal Fayneh, Ofir Degani, Sebastian Sievert
  • Patent number: 10218372
    Abstract: A time-skew adjustment circuit includes an input to receive a series of samples of an input signal from a plurality of channels of an interleaved ADC. A first subtractor calculates distances between consecutive samples in the received series of samples, and a plurality of average circuit code and a plurality of memory banks to calculate a plurality of first average distance, each corresponding to an average of the distance between consecutive samples from a respective pair of channels of the interleaved ADC. Time-skew detection circuitry calculates respective time skews between each of the pairs of channels by comparing each of the first average distances with an average of the distances between consecutive samples from the plurality of channels. Divergence control circuitry determines an accuracy of the time skews based at least in part on the first average distances and a Nyquist zone associated with the input signal.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: February 26, 2019
    Assignee: XILINX, INC.
    Inventors: Brendan Farley, Christophe Erdmann, John E. McGrath, Bruno Miguel Vaz
  • Patent number: 10218380
    Abstract: Data weighted averaging of a thermometric coded input signal is accomplished by controlling the operation of a crossbar switch matrix to generate a current cycle of a data weighted averaging output signal using a control signal generated in response to feedback of a previous cycle of the data weighted averaging output signal. The control signal specifies a bit location for a beginning logic transition of the data weighted averaging output signal in the current cycle based on detection of an ending logic transition of the data weighted averaging output signal in the previous cycle.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: February 26, 2019
    Assignee: STMicroelectronics International N.V.
    Inventors: Ankur Bal, Rupesh Singh
  • Patent number: 10211850
    Abstract: Data weighted averaging of a thermometric coded input signal is accomplished by controlling the operation of a crossbar switch matrix to generate a current cycle of a data weighted averaging output signal using a control signal generated in response to feedback of a previous cycle of the data weighted averaging output signal. The control signal specifies a bit location for a beginning logic transition of the data weighted averaging output signal in the current cycle based on detection of an ending logic transition of the data weighted averaging output signal in the previous cycle.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: February 19, 2019
    Assignee: STMicroelectronics International N.V.
    Inventors: Ankur Bal, Rupesh Singh