Patents Examined by Jean B. Jeanglaude
  • Patent number: 12013572
    Abstract: Exemplary apparatus can be provided which can include a laser arrangement that is configured to provide a laser radiation, and including an optical cavity. The optical cavity can include a dispersive optical waveguide first arrangement having first and second sides, and which is configured to (i) receive at least one first electro-magnetic radiation at the first side so as to provide at least one second electro-magnetic radiation, and (ii) to receive at least one third electro-magnetic radiation at the second side so as to provide at least one fourth electro-magnetic radiation. The first and second sides are different from one another, and the second and third radiations are related to one another. The optical cavity can also include an active optical modulator second arrangement which can be configured to receive and modulate the fourth radiation so as to provide the first electro-magnetic radiation to the first arrangement.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 18, 2024
    Assignee: The General Hospital Corporation
    Inventors: Benjamin Vakoc, Meena Siddiqui
  • Patent number: 12015215
    Abstract: Coaxial collinear antenna examples are described. An example coaxial collinear antenna includes a first segment and a second segment of a coaxial cable. The second segment includes a second inner conductor and a second outer conductor. The first inner conductor of the first segment is coupled to the second outer conductor of the second segment. The first outer conductor of the first segment is coupled to the second inner conductor of the second segment. Further, a first wire mesh is attached to the first outer conductor of the first segment, and a second wire mesh is attached to the second outer conductor of the second segment. Additionally, the coaxial collinear antenna includes an end-fed port that is situated at a distal end of the coaxial collinear antenna.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: June 18, 2024
    Assignee: VIRGINIA TECH INTELLECTUAL PROPERTIES, INC.
    Inventors: Ali Hosseini-Fahraji, Majid Manteghi
  • Patent number: 12009833
    Abstract: A method for synchronizing analog data (Data_ana1, Data_ana2) at the output of a plurality of digital/analog converters (DAC), comprising at least one conversion core (C1, C2), on an active edge of a common reference clock (Clk), the method comprising the following steps: a) supplying an external synchronization signal (SYNC_ext), to at least one converter, and supplying a signal of the common reference clock to the plurality of converters; b) generating, within each converter, an internal synchronization signal (SYNC_int), such that all the internal synchronization signals are aligned on an active edge of the common reference clock; c) for each of the converters, generating a start signal (START1, START2) which represents the start of the sending of digital data and counting a number of clock strokes until the internal synchronization signal is generated, and; d) applying a delay Ri (R1, R2) to each converter core, the delay being equal to the difference between the highest number counted in step c) and the
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: June 11, 2024
    Assignee: Teledyne e2v Semiconductors SAS
    Inventors: Quentin Béraud-Sudreau, Jérôme Ligozat, Rémi Laube, Marc Stackler
  • Patent number: 11996817
    Abstract: A system, a non-transitory computer readable media and a method for FIR filtering. The method may include obtaining a set of input samples; and concurrently applying a FIR filtering process on the set of input samples to provide a set of FIR filtered output samples. The latter may include calculating intermediate results that represent a first number of coefficient-input sample products, while calculating only some of the first number of coefficient-input sample products, wherein the calculating of the intermediate results is executed by using less than a first number of multipliers.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: May 28, 2024
    Assignee: Solanium Labs Ltd.
    Inventors: David Dayan, Raz Dagan, Or Vidal
  • Patent number: 11992974
    Abstract: Systems and methods for making and/or using a hybrid laminate composite tube structure. The methods comprise: wrapping a plurality of lamina layers around a male cylindrical tool (e.g., mandrel); treating the lamina layers with heat/pressure to form the hybrid laminate composite tube structure; and assembling a structure by adhesively bonding the hybrid laminate composite tube structure to a metallic fitting. The lamina layers comprise: at least one first lamina layer formed of a first material having a first CTE; and at least one second lamina layer formed of a second material different from the first material and having a second CTE different than the first CTE. The hybrid laminate composite tube structure has at least one property that is different in the axial direction than the hoop direction. An axial CTE of the hybrid laminate composite tube structure is tailored to provide a net zero CTE for the assembled structure.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: May 28, 2024
    Assignee: EAGLE TECHNOLOGY, LLC
    Inventor: Ian D. Peterson
  • Patent number: 11996818
    Abstract: An apparatus includes a differential current-to-voltage conversion circuit that includes an input sampling stage circuit, a differential integration and DC signal cancellation stage circuit, and an amplification and accumulator stage circuit. An input common mode voltage of the differential current-to-voltage conversion circuit is independent of an output common mode voltage of the differential current-to-voltage conversion circuit.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: May 28, 2024
    Assignee: ams International AG
    Inventors: Rahul Thottathil, Ravi Kumar Adusumalli, Parvathy S. J., Veeresh Babu Vulligaddala
  • Patent number: 11996851
    Abstract: A circuit for decoding a pulse width modulated (PWM) signal generates an output signal switching between a first and second logic values as a function of a duty-cycle of the PWM signal. Current generating circuitry receives the PWM signal and injects a current to and sinks a current from an intermediate node as a function of the values of the PWM signal. A capacitor coupled to the intermediate node is alternatively charged and discharged by the injected and sunk currents, respectively, to generate a voltage. A comparator circuit coupled to the intermediate node compares the generated voltage to a comparison voltage and drives the logic values of the output signal as a function of the comparison.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: May 28, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Ivan Floriani
  • Patent number: 11996867
    Abstract: Data compression is continuously optimized using frequency-based dictionary lookup tables for communication between a transmitter in a vehicle and a receiver. In a transmitter, first and second frequency-based dictionary lookup tables are provided. The transmitter receives a data block and compresses it using the first table. Using the data block, the second table is updated and a difference between a compression efficiency of the first table and a compression efficiency of the second table for the data block is calculated. The compressed data block is transmitted to the receiver. When the difference is more than a pre-defined threshold, the content of the first table is replaced with the content of the updated second table in the transmitter. The content of the updated second table is then also transmitted to the receiver.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: May 28, 2024
    Assignee: Continental Automotive GmbH
    Inventor: Ahamed Umar
  • Patent number: 11990916
    Abstract: A circuit includes a digital-to-analog converter (DAC) and a compensation circuit. The DAC has first and second terminals. The compensation circuit includes a capacitor and a transistor. The capacitor has first and second terminals, with the first terminal of the capacitor coupled to the first terminal of the DAC. The transistor has a source coupled to the second terminal of the capacitor, and has a gate coupled to the second terminal of the DAC.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: May 21, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Meghna Agrawal, Debapriya Sahu
  • Patent number: 11984908
    Abstract: Described herein are analog-to-digital converters (ADCs) that utilize time-to-digital converters (TDCs) and a histogram block to generate time-correlated histograms from analog signals. In some implementations, the time-to-digital converters determine time intervals for which the analog signal above or below a ramp signal, and the histogram block generates the time-correlated histograms of values using the determined time intervals. Furthermore, in some implementations, the analog-to-digital converters receive the analog signals from photodiodes, such as photo diodes used in Light Detection and Ranging (LIDAR) devices. In some such applications, the use of time intervals to generate time-correlated histograms may be used to reduce the effects of time jitter.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 14, 2024
    Assignee: Microvision, Inc.
    Inventor: Ralf Beuschel
  • Patent number: 11969250
    Abstract: This specification discloses a brain electrode device. The brain electrode device includes a set of contact points and a set of sub-circuits. The sub-circuits include sensor ports configured to connect to the contact to the respective ones of the contact points. The device can further include an intelligent multiplexer that aggregates signals from the set of sub-circuits and generates an aggregate signal. The aggregate signal is transmitted to a signal acquisition device.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: April 30, 2024
    Assignee: Mayo Foundation for Medical Education and Research
    Inventors: Patrick J. Zabinski, Gregory A. Worrell, Clifton R. Haider
  • Patent number: 11973479
    Abstract: Disclosed are a two-stage audio gain circuit based on analog-to-digital conversion and an audio terminal. The two-stage audio gain circuit includes a PGA configured to receive an analog audio signal and perform programmable gain amplification processing on the received analog audio signal; an ADC configured to convert the analog audio signal after the programmable gain amplification processing into a digital audio signal and output the digital audio signal; a first AGC gain unit configured to perform a first AGC processing on the digital audio signal and output a first gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal; and a second AGC gain unit configured to perform a second AGC processing on the digital audio signal and output a second gain adjustment value to the PGA, for the PGA to perform gain adjustment on the received analog audio signal.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: April 30, 2024
    Assignee: Radiawave Technologies Co., Ltd.
    Inventors: Liuan Zhang, Yulin Tan, Jon Sweat Duster, Ning Zhang, Haigang Feng, Erkan Alpman
  • Patent number: 11973272
    Abstract: A spacecraft includes: a main-reflection unit configured to reflect and emit a radio wave outside, a sub-reflection unit configured to face the main-reflection unit, a radiator arranged to face the sub-reflection unit and configured to radiate the radio wave in a direction of the sub-reflection unit, a main body configured to be able to accommodate at least one part of the sub-reflection unit therein, and a delivery device connected to the sub-reflection unit and configured to deliver the sub-reflection unit, at least one part of which is accommodated in the main body, to a position where the sub-reflection unit is able to reflect the radio wave radiated from the radiator to the main-reflection unit and cause the main-reflection unit to radiate the radio wave outside.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: April 30, 2024
    Assignee: Institute for Q-shu Pioneers of Space, Inc.
    Inventors: Shunsuke Onishi, Tetsuo Yasaka, Kazuo Kuno, Masahiko Uetsuhara, Yohei Koga, Shinji Ito, Yonosuke Ichiki, Kazuo Kiso, Mutsuhito Tobo
  • Patent number: 11967974
    Abstract: A system and method for data compression with protocol adaptation, that utilizes a codebook generator which leverages one or more machine/deep learning algorithms trained on at least a plurality of protocol policies in order to generate a protocol appendix and codebook, wherein original data is encoded by an encoder according to the codebook and sent to a decoder, but instead of just decoding the data according to the codebook to reconstruct the original data, data manipulation rules such as mapping and transformation are applied at the decoding stage to transform the decoded data into protocol formatted data.
    Type: Grant
    Filed: November 4, 2023
    Date of Patent: April 23, 2024
    Assignee: ATOMBEAM TECHNOLOGIES INC.
    Inventors: Joshua Cooper, Aliasghar Riahi
  • Patent number: 11967763
    Abstract: Spacecraft and antenna apparatus that can be more easily deployed from a stored state can include: a main-reflection unit including a plurality of ribs formed to be deployable in a stored state in which the ribs are folded and a sheet body provided between a plurality of the ribs and configured to be capable of reflecting a radio wave radiated from a radiator and emitting the radio wave outside, and a restriction member configured to restrict deployment of the plurality of ribs in the stored state, and release the restriction by operation of a restriction release member different from the main-reflection unit.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: April 23, 2024
    Assignee: Institute for Q-shu Pioneers of Space, Inc.
    Inventors: Shunsuke Onishi, Tetsuo Yasaka, Kazuo Kuno, Masahiko Uetsuhara, Yohei Koga, Shinji Ito, Yonosuke Ichiki, Kazuo Kiso, Mutsuhito Tobo
  • Patent number: 11962335
    Abstract: Methods, systems, and apparatus, including computer-readable storage media for hardware compression and decompression. A system can include a decompressor device coupled to a memory device and a processor. The decompressor device can be configured to receive, from the memory device, compressed data that has been compressed using an entropy encoding, process the compressed data using the entropy encoding to generate uncompressed data, and send the uncompressed data to the processor. The system can also include a compressor device configured to generate, from uncompressed data, a probability distribution of codewords, generate a code table from the probability distribution, and compress incoming data using the generated code table.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: April 16, 2024
    Assignee: Google LLC
    Inventor: Reiner Alwyn Pope
  • Patent number: 11955985
    Abstract: An AD converter includes: an integration unit that uses an input voltage as an initial value and repeats an operation of integrating one or both of two types of unit voltages with the input voltage, thereby generating an integrated voltage; a switching threshold voltage unit that includes two types of threshold voltages causing the operation of integrating to be terminated; a comparator that compares the integrated voltage with the threshold voltages; an integration determination unit that, before the operation of integrating is started, causes the comparator to compare the input voltage with a rough adjustment threshold voltage corresponding to a larger one of the unit voltages; a unit voltage switching control unit that, when the rough adjustment threshold voltage is larger than the input voltage, controls the integration unit to generate the integrated voltage by using the two types of unit voltages; and a single unit voltage control unit that, when the rough adjustment threshold voltage is smaller than th
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: April 9, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tadashi Minotani, Kenichi Matsunaga
  • Patent number: 11941527
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for training a neural network. A method includes: training a neural network having a plurality of network parameters to perform a particular neural network task and to determine trained values of the network parameters using an iterative training process having a plurality of hyperparameters, the method comprising: maintaining a plurality of candidate neural networks and, for each of the candidate neural networks, data specifying: (i) respective values of the network parameters for the candidate neural network, (ii) respective values of the hyperparameters for the candidate neural network, and (iii) a quality measure that measures a performance of the candidate neural network on the particular neural network task; and for each of the plurality of candidate neural networks, repeatedly performing additional training operations.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 26, 2024
    Assignee: DeepMind Technologies Limited
    Inventors: Maxwell Elliot Jaderberg, Wojciech Czarnecki, Timothy Frederick Goldie Green, Valentin Clement Dalibard
  • Patent number: 11936396
    Abstract: An AD converter with self-calibration function that does not require an instrument for calibration, and includes: a reference voltage unit that generates a reference voltage; a summation and conversion unit that has two or more unit voltages serving as units of amount of change in a summed voltage, and during conversion, sums up any one unit voltage of the two or more unit voltages until the summed voltage exceeds the reference voltage, with an input voltage being an initial value of the summed voltage; and a control unit including a calibration control section that calibrates the two or more unit voltages and an offset voltage of a comparator at a time of calibration, and a conversion control section that determines a polarity of the offset voltage of the comparator and thereafter converts the input voltage to a digital value during conversion.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: March 19, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Tadashi Minotani, Kenichi Matsunaga
  • Patent number: 11936111
    Abstract: An antenna array with a layered structure having a base layer with a metamaterial structure, a printed circuit board (PCB) layers, a feed layer arranged on the opposite side of the PCB from the RF IC(s), and a radiating layer arranged on the feed layer. The radiating layer having a plurality of radiating elements. The metamaterial structure is arranged to attenuate electromagnetic radiation propagating between the at least two adjacent waveguides in the frequency band.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: March 19, 2024
    Assignee: GAPWAVES AB
    Inventors: Thomas Emanuelsson, Yang Jian, Ashraf Uz Zaman, Wai Yan Yong