Abstract: An apparatus and associated method are provided involving a housing having a periphery configured to operate as a second antenna, a third antenna, and a fourth antenna. The periphery includes a top wall having a first slot formed therein, a first side wall having a second slot formed therein, and a second side wall having a third slot formed therein. The top wall is arranged between the first side wall and the second side wall, and a top portion of the periphery is defined between the second slot and the third slot. The top portion is divided into a first top side portion and a second top side portion via the first slot. Further, the first top side portion operates as the second antenna, and the second top side portion operates as both the third antenna and the fourth antenna.

Abstract: Communications method and apparatus include encoding information into a high-peakedness designed pulse train, converting the designed pulse train into a low-peakedness signal suitable for modulating a narrowband carrier to generate a physical communication signal with desired spectral and temporal properties, and generating and transmitting the physical communication signal. The communications method and apparatus also include receiving and demodulating the physical communication signal, and further converting the demodulated signal into a high-peakedness received pulse train corresponding to the designed pulse train, so that the encoded information may be extracted from the received pulse train.

Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.

Abstract: A delay circuit includes a state transition section configured to start state transition based on a trigger signal and output state information indicating the internal state and a transition-state acquisition section configured to latch and hold the state information. The state transition section includes a tapped delay line in which a plurality of delay elements are coupled, a logical circuit configured to generate a third signal based on a first signal based on the trigger signal and a second signal, which is an output signal of the delay element, and a synchronous transition section configured to count an edge of the third signal. The state information is having an output signal of the synchronous transition section and an output signal of the tapped delay line. A humming distance of the state information before and after the state transition is 1.

Abstract: In an embodiment, a circuit includes N sensing channels. Each channel includes a first main sensing node and a second redundancy sensing node paired therewith. N analog-to-digital converters (ADCs) are coupled to the first sensing nodes, with digital processing circuits coupled to the N ADCs. A pair of multiplexers are coupled to the second sensing nodes and to the N ADCs with a further ADC coupled to the output of the second multiplexer. An error checking circuit is coupled to the outputs of the second multiplexer and the further ADC to compare, at each time window in a sequence of N time windows, a first digital value and a second digital value resulting from conversion to digital of: an analog sensing signal at one of the first sensing nodes, and an analog sensing signal at the second sensing node paired with the selected one of the first sensing nodes.

Abstract: A lossless compression method for a test vector has following steps: S01: converting the test vector into a data stream with A rows and B columns, the data stream is expressed in binary; S02: compressing the data stream a column by a column sequentially to form compressed words and uncompressed words corresponding to test datum of each of the B columns; a compression method for the test datum of each of the B columns comprises: setting a window with a width of 1 bit and a depth of M rows, and sliding the window down a row by a row from top of test datum of a column, and forming the compressed words and the uncompressed words corresponding to the test datum of each of the B columns; S03: converging the compressed datum of the test datum of each of the B columns to form a compressed data stream.

Abstract: A decompression system has a plurality of decompression devices in an array or chain layout for decompressing respective compressed data values of a compressed data block. A first decompression device is connected to a next decompression device, and a last decompression device is connected to a preceding decompression device. The first decompression device decompresses a compressed data value and reduces the compressed data block by extracting a codeword of the compressed data value and removing the compressed data value from the compressed data block, retrieving a decompressed data value out of the extracted codeword, and passing the reduced compressed data block to the next decompression device. The last decompression device receives a reduced compressed data block from the preceding decompression device and decompresses another compressed data value by extracting a codeword of the other compressed data value, and retrieving another decompressed data value out of the extracted codeword.

Abstract: A power supply circuit module for a TDC (Time to Digital Converter) includes a first input for receiving a control signal, a second input for receiving a power supply voltage, and an output configured to be connected to the power supply input of the TDC. An active main power supply device is configured to receive the control signal at the input and to contribute on the value of the power supply voltage resulting at an output by a voltage value lower than a first predefined percentage with respect to the nominal power supply voltage. A number N of active secondary power supply devices each are configured to contribute on the value of the power supply voltage resulting at the output by a percentage different from the remaining active secondary power supply devices.

Abstract: To speed up decoding of a range code. A decompression circuit calculates a plurality of candidate bit values for each bit of the N-bit string based on a plurality of possible bit histories of a bit before a K-th bit in parallel for a plurality of bits, and repeatedly selects a correct bit value of the K-th bit from the plurality of candidate bit values based on a correct bit history of the bit before the K-th bit to decode the N-bit string.

Abstract: Devices, methods, and systems for encoding data as DNA are provided. An encoder device can include circuitry to encode a data file having a bit sequence encoding data and to generate a virtual DNA (VDNA) sequence of virtual nucleotide bases (Vnb) that reversibly encodes the bit sequence of the data file, divide the VDNA sequence into a plurality of VDNA fragments, associate each VDNA fragment with an archive library sequence (Arc_SEQ), and generate a read instruction (READ) sequence of differences between each VDNA fragment and each associated Arc_SEQ including sufficient instruction to facilitate regeneration of each VDNA fragment from each associated Arc_SEQ. A codeword sequence (Code_SEQ) is additionally generated for each VDNA fragment that includes a codename identifying the associated Arc_SEQ, the READ sequence associated with the VDNA fragment, and an index sequence (Idx_SEQ) including an index mapping of the VDNA fragment in the VDNA sequence.

Abstract: Single band and multiband wireless antennas are an important element of wireless systems. Competing tradeoffs of overall footprint, performance aspects such as impedance matching and cost require not only consideration but become significant when multiple antenna elements are employed within a single antenna such as to obtain circular polarization transmit and/or receive. Accordingly, it would be beneficial to provide designers of a wide range of electrical devices and systems with compact single or multiple frequency band antennas which, in addition to providing the controlled radiation pattern and circular polarization purity (where required) are impedance matched without substantially increasing the footprint of the antenna and/or the complexity of the microwave/RF circuit interfaced to them, whilst supporting multiple signals to/from multiple antenna elements in antennas employing them.

Abstract: A method of encoding input data includes dividing the input data into a plurality of data packets, an input packet of the plurality of data packets including a plurality of digits in a first base system, base-converting the input packet from the first base system to generate a base-converted packet including a plurality of converted digits in a second base system, the second base system having a base value lower than that of the first base system, and incrementing the converted digits to generate a coded packet for transmission through a communication channel.

Abstract: An antenna apparatus includes a ground plane; a first patch antenna pattern having a first bandwidth and spaced apart from the ground plane; a second patch antenna pattern spaced apart from the ground plane and the first patch antenna and overlapping at least a portion of the first patch antenna pattern; and guide vias disposed between the first patch antenna pattern and the ground plane and electrically connecting the first patch antenna pattern to the ground plane. The second patch antenna pattern has a second bandwidth corresponding a frequency higher than a frequency of the first bandwidth. The guide vias are disposed along a first side of the first patch antenna pattern.

Abstract: An analog-to-digital converter (ADC) is described. This ADC includes a conversion circuit with multiple bit-conversion circuits. During operation, the ADC may receive an input signal. Then, the conversion circuit may asynchronously perform successive-approximation-register (SAR) analog-to-digital conversion of the input signal using the bit-conversion circuits, where the bit-conversion circuits to provide a quantized representation of the input signal. For example, the bit-conversion circuits may asynchronously and sequentially perform the SAR analog-to-digital conversion to determine different bits in the quantized representation of the input signal. Moreover, the ADC may selectively perform self-calibration of a global delay of the bit-conversions circuits. Note that the timing self-calibration may be iterative and subject to a constraint that a maximum conversion time is less than a target conversion time.

Abstract: A tactile reproduction system achieves a data amount reduction of a tactile signal while ensuring reproducibility of a tactile sense. A decoding apparatus includes a decoding unit configured to decode tactile coded data obtained by performing encoding of compressing an information amount, on a tactile signal using higher-order perception in a tactile sense. Therefore, a data amount reduction of a tactile signal can be performed in accordance with a tactile characteristic of a human.

Abstract: The present disclosure provides a data encoding method, a decoding method, a related device, and a storage medium. The data encoding method first passes a first bit stream of an original encoded data through a logical operation to obtain a second bit stream. Then, through signal determination, negating processing, and insertion of corresponding flag bit, encoded data having a certain jump amplitude is obtained. A problem that signal is prone to error in transmission process is solved, reliability of coding is improved, and signal transmission is facilitated.

Abstract: A quantizer for a sigma-delta modulator, a sigma-delta modulator, and a method of shaping noise are provided. The quantizer includes: an integrator configured to generate, in a Kth sampling period, a quantization error signal for a Kth period according to an internal signal, a quantization error signal for a (K?1)th period, a filtered quantization error signal for the (K?1)th period and a filtered quantization error signal for a (K?2)th period; an integrating capacitor configured to store the quantization error signal for the Kth period, to weight the internal signal in a (K+1)th sampling period; a passive low-pass filter configured to acquire the quantization error signal for the Kth period in a Kth discharge period, and feed back the filtered quantization error signal to the integrator in a (K+1)th sampling period and a (K+2)th sampling period; and a comparator configured to quantize the quantization error signal for the Kth period.

Abstract: Techniques are provided for implementing a file system format for persistent memory. A node, with persistent memory, receives an operation associated with a file identifier and file system instance information. A list of file system info objects are evaluated to identify a file system info object matching the file system instance information. An inofile, identified by the file system info object as being associated with inodes of files within an instance of the file system targeted by the operation, is traversed to identify an inode matching the file identifier. If the inode has an indicator that the file is tiered into the persistent memory, then the inode it utilized to facilitate execution of the operation upon the persistent memory. Otherwise, the operation is routed to a storage file system tier for execution by a storage file system upon storage associated with the node.

Abstract: An antenna array may include shielding elements that provide a degree of radiation shielding to other components of the antenna array, such as a substrate of the antenna array. In some examples, the shielding elements may be positioned to overlap with one or more gaps between antenna elements, or one or more gaps between ground elements (e.g., when viewed from a radiation source, when viewed in a direction perpendicular to a substrate). Thus, shielding elements of an antenna array may reflect, absorb, or otherwise dissipate radiation that passes through such gaps before the radiation is incident on the other components of the antenna array, such as the substrate of the antenna array.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for training a neural network. A method includes: training a neural network having multiple network parameters to perform a particular neural network task and to determine trained values of the network parameters using an iterative training process having multiple hyperparameters, the method includes: maintaining multiple candidate neural networks and, for each of the multiple candidate neural networks, data specifying: (i) respective values of network parameters for the candidate neural network, (ii) respective values of hyperparameters for the candidate neural network, and (iii) a quality measure that measures a performance of the candidate neural network on the particular neural network task; and for each of the multiple candidate neural networks, repeatedly performing additional training operations.