Abstract: A multiplexer circuit is composed of several basic unit circuits, which are each supplied with a data signal and select signal. Each output terminal of several basic unit circuits is connected to a common line. Each basic unit circuit is composed of an unmatch detection circuit detecting an unmatch state of the common line and the data signal, a control circuit controlling drive timing of the common line when receiving a state transition of the select signal, and a tri-state buffer driving the common line according to a state of the data signal when an output of the unmatch detection circuit and an output of the control circuit are both in an active state while holds high impedance state when the state other than above is given.

Abstract: Methods for determining a surface voltage of an insulating film are provided. One method includes depositing a charge on an upper surface of the insulating film and measuring a current to the wafer during deposition. The method also includes determining the surface voltage of the insulating film from the current. In this manner, the surface voltage is not measured, but is determined from a measured current. Another embodiment may include measuring a second current to the wafer during a high current mode deposition of a charge on the film and determining a second surface voltage of the film from the second current. This method may be repeated until a Q-V sweep is measured. An additional embodiment may include altering a control voltage during deposition of the charge such that a current to the wafer is substantially constant over time and determining charge vs. voltage data for the insulating film.

Abstract: A measurement circuit for measuring input voltages in an automatic test system includes a pedestal source, a differential amplifier, and a feedback amplifier. The differential amplifier measures a “residue,” i.e., a difference between an input signal and a pedestal signal from the pedestal source, which is programmed to equal an expected input voltage. The feedback amplifier boosts the residue before it is presented to the differential amplifier, and thus allows the differential amplifier to be operated at lower gain than is typically used in conventional topologies. Consequently, the effect of the errors in the differential amplifier are reduced.

Abstract: Method and test structures for determining heating effects in a test semiconductor device (10) are provided. The test device may include a first conductive metal structure (151–156) for accepting a flow of electric current that causes a heating effect. The test device may further include a second conductive metal structure proximate (121–126) the first conductive structure for obtaining resistivity changes in response to the heating effect. The resistivity changes are indicative of temperature changes due to the heating effect.

Abstract: An integrated circuit die comprising functional circuitry, a plurality of bond pads, each bond pad associated with a respective portion of the functional circuitry and for bonding the respective portion of the functional circuitry, at least one probe pad for testing of the functional circuitry; and multiplexing circuitry between the probe pad and the bond pads, the multiplexing circuitry for multiplexing signals between the probe pad and each of the respective portions of the functional circuitry, thus allowing the respective portions of functional circuitry to be tested using the probe pad and without any contact of the plurality of bond pads by a probe needle.

Abstract: The present invention relates to a method to detect at least one defective pixel in a spatial light modulator comprising numerous pixel elements. The spatial light modulator is imaged to a detector. A relayed image of a first chess-board pattern of pixels in said spatial light modulator is detected by said detector. A relayed image of a second chess-board pattern of pixels in said spatial light modulator is detected, which is inverted to the first chessboard pattern, by said detector. The relayed images of said first and second chessboard patterns are analyzed to detect differences between said detected images and theoretical images thereof.

Abstract: The preferred embodiments of the present invention provide non-invasive approaches of testing ICs that use photon emission from semiconductor devices to provide results of various testing procedures. For example, instead of reading the results from the built-in-self-test (BIST) circuitry using micro-mechanical probes, the results from BIST may be represented using an array of circuit elements configured to emit photons. Accordingly, by reading the photon emission of this BIST circuitry, the results of the testing procedures may be measured non-invasively. In addition, the preferred embodiments also may use an external light source to initiate on-chip testing functions so that the number of external connections to the IC may be further minimized. For example, instead of providing input signals to BIST circuitry using micro-mechanical probes, pulsed lasers may provide desired input signals.

Abstract: An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on the component. The interconnect contacts include flexible spring segments defined by grooves in the substrate, shaped openings in the substrate, or shaped portions of the substrate. The spring segments are configured to flex to exert spring forces on the component contacts, and to compensate for variations in the size or planarity of the component contacts. The interconnect can be configured to test wafer sized components, or to test die sized components. A test method includes the steps of providing the interconnect with the interconnect contacts, and electrically engaging the component contacts under a biasing force from the spring segments. A wafer level test system includes the interconnect mounted to a testing apparatus such as a wafer probe handler.

Abstract: A semiconductor wafer is placed into a probe fixture with a front side of the wafer facing up. Power and signal probes are then placed on an integrated circuit (IC) formed on the front side of the wafer. The probe fixture is retained at a test station either in a upright or an inverted position for testing and optical failure analysis. The probe fixture includes a position adjustment mechanism to locate the entire probe above the wafer and to more precisely position a tip of the probe on the IC. Optical failure analysis techniques are performed on the front side or the back side of the wafer while the wafer is retained in the test fixture and the probes are connected to the IC.

Abstract: Signal paths within an interconnect structure linking input/output (I/O) ports of an integrated circuit (IC) tester and test points of an IC die on a wafer are tested for continuity, shorts and resistance by using the interconnect structure to access a similar arrangement of test points on a reference wafer. Conductors in the reference wafer interconnect groups of test points. The tester may then test the continuity of signal paths through the interconnect structure by sending test signals between pairs of its ports through those signal paths and the interconnecting conductors within the reference wafer. A parametric test unit within the tester can also determine impedances of the signal paths through the interconnect structure by comparing magnitudes of voltage drops across pairs of its I/O ports to magnitudes of currents it transmits between the I/O port pairs.

Abstract: The present disclosure relates to an apparatus for use with a probe station in the testing of semiconductor wafers. In one embodiment, an apparatus for testing semiconductor devices includes a first plate and a second plate. The first plate is configured to be mounted to and completely removable from the head stage of a probe station. The second plate is configured to be removably coupled to the first plate and has a major aperture for receiving a probe-card assembly. Docking equipment desirably is mounted to a major surface of the second plate to facilitate docking of a tester to the probe station.

Abstract: A device for handling and testing individual sliders in a row-like format utilizes an elongated, row-like holder having a series of small pockets, each of which receives a single slider. After the sliders enter the holder, a clamp is moved to a closed position to retain the sliders in the holder. The holder is placed in a test fixture such that permanently mounted probes precisely engage the small pads on the sliders for multiple testing purposes. Enlarged probe pads on the test fixture are electrically interconnected with the probes to provide an operator with easy access to the slider pads. The sliders are tested in a row-like format, side by side, to reduce handling-induced electrostatic discharge and mechanical damage.

Abstract: A pusher is constituted by a pusher main body, which is capable of direct contact with an electronic component to be tested, a heat absorbing and radiating body provided on the pusher main body, a heater provided on the pusher main body to enable direct or indirect contact with the electronic component to be tested, and a thermal insulating material provided between the pusher main body and the heater. According to such a pusher, temperature control of an electronic component can be performed such that the electronic component nears a target set temperature for testing.

Abstract: Disclosed herein are an anisotropically conductive connector that conductivity of all conductive parts for connection is good, and insulating property between adjacent conductive parts for connection is surely achieved even when the pitch of electrodes as objects of connection is small, and good conductivity is retained over a long period of time even when it is used repeatedly under a high-temperature environment, and applications thereof.

Abstract: A chip capable of performing self testing includes: an output circuit for generating output signals; a transmitting circuit coupled to the output circuit for transmitting output signals generated by the output circuit; a receiving circuit for receiving signals transmitted to the chip and generating corresponding receiving signals; a first multiplexer; and an input circuit coupled to an output port of the first multiplexer for receiving outputs of the first multiplexer, wherein the first multiplexer includes: a first input port coupled to the output circuit for receiving output signals generated by the output circuit; and a second input port coupled to the receiving circuit for receiving signals generated by the receiving circuit.

Abstract: A probe for probing test points on a target board uses a printed circuit board (PCB) having a plurality of signal routes for routing signals to a test instrument. The probe also has a plurality of spring pins for probing the test points on the target board. Each of the spring pins is i) disposed perpendicularly to the PCB, and ii) electrically coupled to at least one signal route of the PCB. By way of example, the spring pins may be fit into holes in the PCB or, alternately, they may be electrically coupled to signal routes of a second PCB that is perpendicularly abutted to the first PCB. Methods for making and using such probes are also disclosed.

Abstract: A conductive composition of titanium boronitride (TiBxNy) is disclosed for use as a conductive material. The titanium boronitride is used as conductive material in the testing and fabrication of integrated circuits. For example, the titanium boronitride is used to construct contact pads such as inline pads, backend pads, sensors, or probes. Advantages of embodiments of the titanium boronitride include reduced scratching, increased hardness, finer granularity, thermal stability, good adhesion, and low bulk resistivity. Exemplary methods of creating the titanium boronitride include a sputtering process and a plasma anneal process.

Abstract: A test apparatuss for testing substrates at low temperatures has a chuck, which can be displaced in the working area by means of a chuck drive, the temperature of which can be controlled using heating and cooling means. The chuck has a receiving surface for receiving a test substrate and holding means for fixing a substrate carrier which receives the test substrate. Spatially and thermally defined test conditions are maintained with minimal energy and labor costs both at room temperatures and at low temperatures. This is achieved by providing a vacuum chamber which surrounds the working area of the chuck. The chuck is on one side thermally decoupled from the uncooled chuck drive and on the other side is thermally connected in a releasable manner to the test substrate. The cooled chuck and the cooled test substrate are shielded from the thermal radiation of the surrounding uncooled assemblies by means of a directly cooled thermal radiation shield.

Abstract: To apply a constant pressing force to an object to be tested, so that reliable tests can be performed. A test socket 10 presses an object to be tested 1 against the testing face of a testing device 4.

Abstract: A system and method measures parameters associated with an inductor such as in a switching converter. The inductance value can be determined by monitoring voltages and currents associated with the inductor when a measurement mode is activated. In one example, the measurement is provided by a signal processing system that includes an analog differentiator. In another example, the measurement is provided by a signal processing system that converts the analog measurement voltages into digital quantities that are analyzed in the digital domain. The value of the inductance value is determined by calculating of ?VL and ?IL/?t. The saturation point in the inductance is located by measuring the change in slew rate of the inductance during the measurement mode. Average values for the inductor and the slew rate can be determined using digital techniques. Other parameters such as current limit and on-time of the inductor can be adjusted by this methodology.