Abstract: A light emitting diode (LED) and a method are provided for fabricating the a LED with an improved structure for better light emitting efficiency and better light output performance.

Abstract: An anti-reflective coating layer for the manufacturing of semiconductor devices is disclosed. In one example, a partial semiconductor device includes a substrate; a bottom anti-reflective coating (BARC) layer over the substrate, and the BARC layer is transformed from being hydrophobic to being hydrophilic during a lithography process; and a photoresist layer over the BARC layer.

Abstract: A structure for isolating areas in a semiconductor device is provided. The structure includes a trench having first and second portions formed in a substrate. The first portion has a first width, and the second portion has a second width and is below the first portion. The first width is greater than the second width. A first insulating liner is formed along at least lateral sidewalls of the first portion. A spacer material is formed along at least lateral sidewalls of the insulating liner and filling the second portion. A filler material is over said spacer material and within the first portion. Methods for forming the structure are also provided.

Abstract: According to this invention, a semiconductor device has an upper surface on which an external connection electrode is formed and a lower surface which opposes the upper surface and is in a mirror surface state. A roughened region roughened by laser marking is formed at part of the lower surface. The roughened region includes a product information mark of the semiconductor device itself. The product information mark is printed by laser marking. The number, size, shape, and layout position of the roughened regions are decided to make it possible to, when the lower surface is irradiated with light, read the product information from the difference in light reflectance between the roughened region and mirror-finished region.

Abstract: An LED lamp has a package and a plurality of light emitting elements that are electrically connected to a plurality of electrode plates provided in the package and that are sealed with transparent material. A red light emitting element of the plurality of light emitting elements is wire bonded along the longitudinal direction of the package, a green light emitting element and a blue light emitting element are flip-chip bonded with its electrode faced down, and the electrodes are extended to a surface opposite to the light emission surface of the LED lamp while being embedded in the package.

Abstract: The electronic device of the invention comprises one or more active elements, each comprising a first and a second electrode and an active layer of organic material separating the first and second electrodes. Examples of active elements are thin-film transistors and light-emitting diodes. The active layer comprises a polymeric material having conjugated units A and non-conjugated intermediate units B, which intermediate units B separate the conjugated units A from each other, such that no conjugation extends from a first conjugated unit A1 to a second conjugated unit A2. The polymeric material may be a polymer network, an alternating copolymer or a polymer in which the conjugated units are present in side chains. The polymer can be prepared from monomers having a B1-A1-B2 structure, wherein at least one of B1 and B2 comprises a reactive group enabling polymerization.

Abstract: To suppress occurrence of dislocation in a substrate of a semiconductor device at an end portion of a gate electrode. Provided is a semiconductor device having a plurality of element formation regions formed over the main surface of a semiconductor substrate, an element isolation trench located between the element formation regions and having an element isolation insulating film embedded therein, and a gate insulating film, a gate electrode and a plurality of interconnect layers formed thereabove, each formed in the element formation region, wherein the element isolation trench has a thermal oxide film formed between the semiconductor substrate and the element isolation insulating film, and the element isolation film has a great number of micro-pores formed inside thereof and is more porous than the thermal oxide film.

Abstract: The present invention includes a bipolar ESD device for protecting an integrated circuit from ESD damage. The bipolar ESD device includes a collector connected to a terminal of the integrated circuit, a floating base, and a grounded emitter. When an ESD pulse hits the terminal of the integrated circuit, the PN junction between the emitter and the base becomes forward biased. The forward biasing of the emitter-base PN junction in turn causes carriers to be injected into the collector-base junction, triggering the bipolar ESD device to turn on to discharge the ESD pulse. The trigger voltage of the bipolar ESD device is a fraction of a breakdown voltage of the collector-base PN junction and can be modified by adjusting a base length of the bipolar ESD device, a junction depth of the collector, or a dopant concentration in the base.

Abstract: A light emitting device includes a substrate, a doped substrate layer, a layer of first conductivity type overlying the doped substrate layer, a light emitting layer overlying the layer of first conductivity type, and a layer of second conductivity type overlying the light emitting layer. A conductive transparent layer, e.g., of indium tin oxide, and a reflective metal layer overlie the layer of second conductivity type and provide electrical contact with the layer of second conductivity type. A plurality of vias may be formed in the reflective metal and conductive transparent layer as well as the layer of second conductivity type, down to the doped substrate layer. A plurality of contacts are formed in the vias and are in electrical contact with the doped substrate layer. An insulating layer formed over the reflective metal layer insulates the plurality of contacts from the conductive transparent layer and reflective metal layer.

Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.

Abstract: The invention includes methods of forming rugged electrically conductive surfaces. In one method, a layer is formed across a substrate and subsequently at least partially dissociated to form gaps extending to the substrate. An electrically conductive surface is formed to extend across the at least partially dissociated layer and within the gaps. The electrically conductive surface has a rugged topography imparted by the at least partially dissociated layer and the gaps. The topographically rugged surface can be incorporated into capacitor constructions. The capacitor constructions can be incorporated into DRAM cells, and such DRAM cells can be incorporated into electrical systems.

Abstract: The series TFT comprises a semiconductor layer including a first body, a second body and a connecting portion serially connecting the first body to the second body. The first body has a first channel region and first source/drain regions positioned at both sides of the first channel region. The second body has a second channel region and second source/drain regions positioned at both sides of the second channel region. And the connecting portion is interposed between the first source/drain region and the second source/drain region to serially connect the first body to the second body and having a conductive type different from that of at least one of the first source/drain region and the second source/drain region. A first gate is positioned to correspond to the first channel region, and a second gate is positioned to correspond to the second channel region. An active matrix OLED can be manufactured using such series TFTs.

Abstract: A flexible electronic device excellent in heat liberation characteristics and toughness and a production method for actualizing thereof in low cost and with satisfactory reproducibility are provided. A protection film is adhered onto the surface of a substrate on which surface a thin film device is formed. Successively, the substrate is soaked in an etching solution to be etched from the back surface thereof so as for the residual thickness of the substrate to fall within the range larger than 0 ?m and not larger than 200 ?m. Then, a flexible film is adhered onto the etched surface of the substrate, and thereafter the protection film is peeled to produce a flexible electronic device.

Abstract: A method for designing semiconductor light emitting devices is disclosed wherein the side surfaces (surfaces not parallel to the epitaxial layers) are formed at preferred angles relative to vertical (normal to the plane of the light-emitting active layer) to improve light extraction efficiency and increase total light output efficiency. Device designs are chosen to improve efficiency without resorting to excessive active area-yield loss due to shaping. As such, these designs are suitable for low-cost, high-volume manufacturing of semiconductor light-emitting devices with improved characteristics.

Abstract: In accordance with the present invention, a metal oxide semiconductor (MOS) transistor has a substrate of a first conductivity type. A drift region of a second conductivity type extends over the substrate. A body region of the first conductivity type is in the drift region. A source region of the second conductivity is in the body region. A gate extends over a surface portion of the body region. The surface portion of the body region extends between the source region and the drift region to form a channel region of the transistor. A drain region of the second conductivity type is in the drift region. The drain region is laterally spaced from the body region. A first buried layer of the second conductivity type is between the substrate and drift region. The first buried layer laterally extends from under the body region to under the drain region. A second buried layer of the first conductivity type is between the first buried layer and the drift region.

Abstract: The invention provides a light emitting device which is capable of displaying on both sides, has a small volume, and is capable of being used as a module. A light emitting element represented by an EL element and the like is used in a pixel portion, and two pixel portions are provided in one light emitting device. A first pixel portion has a structure to emit light only from a counter electrode side of the light emitting element. A second pixel portion has a structure to emit light only from a pixel electrode side of the light emitting element. That is, in the first pixel portion and the second pixel portion, directions of light emission are reverse in front and back.

Abstract: A thin film transistor (TFT) having a lightly doped drain (LDD) structure includes a lightly doped drain (LDD) region formation pattern, an active layer formed in an uneven structure on the LDD region formation pattern, and having a source region and a drain region having an LDD region. A gate electrode may be formed on a gate insulating layer, and source and drain electrodes are coupled to the source and drain regions.

Abstract: A semiconductor integrated circuit includes an inductor formed by a conductive loop that is fabricated on one or more metal layers. The inductor also includes a dielectric region provided adjacent to the conductive loop. The semiconductor integrated circuit may also include a pattern of electrically isolated metallic fill structures formed within the dielectric region.

Abstract: A microneedle array module is disclosed comprising a multiplicity of microneedles affixed to and protruding outwardly from a front surface of a substrate to form the array, each microneedle of the array having a hollow section which extends through its center to an opening in the tip thereof. A method of fabricating the microneedle array module is also disclosed comprising the steps of: providing etch resistant mask layers to one and another opposite surfaces of a substrate to predetermined thicknesses; patterning the etch resistant mask layer of the one surface for outer dimensions of the microneedles of the array; patterning the etch resistant mask layer of the other surface for inner dimensions of the microneedles of the array; etching unmasked portions of the substrate from one and the other surfaces to first and second predetermined depths, respectively; and removing the mask layers from the one and the other surfaces.

Abstract: Provided are a vertical GaN-based LED and a method of manufacturing the same. The vertical GaN-based LED includes an n-electrode. An AlGaN layer is formed under the n-electrode. An undoped GaN layer is formed under the AlGaN layer to provide a two-dimensional electron gas layer to a junction interface of the AlGaN layer. A GaN-based LED structure includes an n-type GaN layer, an active layer, and a p-type GaN layer that are sequentially formed under the undoped GaN layer. A p-electrode is formed under the GaN-based LED structure. A conductive substrate is formed under the p-electrode.