Abstract: A common-mode rejection receiver including a first differential amplifier arranged to receive a differential signal including receiving a positive signal of the differential signal at a first non-inverting input port and receiving a negative signal of the differential signal at a first inverting input port, and output a first differentiated signal based on a voltage differential between the positive signal and the negative signal. A clamping circuit is arranged to limit a magnitude of the first differentiated signal to a pre-determined limit. A second differential amplifier is arranged to receive the positive signal at a second inverting input port and receive the negative signal at a second non-inverting input port, and output a second differentiated signal. A matching circuit is arranged to receive the second differentiated signal output and output a matched signal. A summing circuit adds the clamped signal and matched signal and outputs a receiver output signal.

Abstract: A semiconductor package includes a semiconductor chip having chip pads on a first surface and having first and second side surfaces opposite to each other and third and fourth side surfaces opposite to each other, a molding member covering the third and fourth side surfaces and exposing the first and second side surfaces of the semiconductor chip, a redistribution wiring layer on a lower surface of the molding member to cover the first surface of the semiconductor chip and including a plurality of redistribution wirings electrically connected to the chip pads, and outer connection members arranged in a connection region defined on an outer surface of the redistribution wiring layer and electrically connected to the redistribution wirings.

Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.

Abstract: Linearity is improved in an amplifier circuit without lowering gain. The amplifier circuit includes a transistor, a load, an impedance element, and a variable current source. The transistor amplifies an input signal. The load is connected between the transistor and a power supply. The impedance element is connected between the transistor and a ground terminal, and passes a direct current. The variable current source is connected to a connection part between the transistor and the impedance element, and supplies a current in accordance with a voltage of the connection part.

Abstract: Disclosed herein is a semiconductor integrated circuit device including a standard cell with a fin extending in a first direction. The fin and a gate line extending in a second direction perpendicular to the first direction and provided on the fin constitute an active transistor. The fin and a dummy gate line provided in parallel with the gate line constitute a dummy transistor. The active transistor shares a node as its source or drain with the dummy transistor.

Abstract: An input stage for an LVDS receiver circuit is provided, which includes at least one supply voltage connection as well as a first and a second stage input to be acted upon by a differential input signal pair. The input stage further includes a first and a second differential stage, the stage inputs being directly connected to one input each of the first differential stage and indirectly, via one level-shifting circuit each, to one input each of the second differential stage. According to the present invention, the first and the second differential stage are connected to the supply voltage connection via one transistor each of a third differential stage, the control input of one of these transistors being connected to a measuring path connecting the stage inputs to one another, with the control input of the other transistor being connected to an apparatus/device (arrangement) for providing a reference voltage.

Abstract: An electric circuit according to one embodiment of the present technology includes a target circuit and an auxiliary circuit. The target circuit includes an output portion from which predetermined output power is output, and an application point to which a voltage corresponding to the output power is applied to output the output power. The auxiliary circuit has impedance lower than impedance of the target circuit, and outputs the voltage corresponding to the output power to the application point as an auxiliary voltage.

Abstract: A micro LED display panel includes a substrate, a plurality of first metal electrodes and a plurality of metal pads on a surface of the substrate, a connection layer on the substrate, a plurality of micro LEDs on a side of the connection layer away from the substrate. The connection layer includes conductive particles. Each of the micro LEDs is coupled to at least one of the first metal electrode. A side of each of the metal pads away from the substrate is coupled to some of the conductive particles in the connection layer to form a metal retaining wall. The metal retaining walls enhance structural strength of the micro LED display panel and avoid breakage of any of the micro LEDs.

Abstract: The use of a capacitor (22) to serve as the principal impedance in a negative feed-back loop in a voltage amplifier component (21) of a trans-impedance amplifier and actively controlling the amount of charge accumulated within the capacitor appropriately to improve the responsiveness and/or dynamic range of the amplifier. A switch (25) is electrically coupled to the inverting input terminal of the voltage amplifier and electrically isolated from the output terminal (23) of the voltage amplifier. The output voltage of the amplifier is proportional to the accumulation of charge, and the switch is operable to ‘reset’ the charge/voltage on the feedback capacitor, as desired. This arrangement decouples the structure of the switch from the output port of the voltage amplifier, and so avoids leakage currents and/or interfering voltage signals emanating from the switch structure and being felt at the output port of the voltage amplifier.

Abstract: An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.

Abstract: Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. For disclosed embodiments, a filter circuit is coupled between a first internal node and a connection pad for an integrated circuit. The filter circuit includes a first inductance, a variable capacitance, and a second inductance. The capacitance amount for the variable capacitance is controlled to tune filtering for the filter circuit to a harmonic of a frequency for a transmit output signal. A power amplifier outputs the transmit output signal to the connection pad without passing through the filter circuit. The filter circuit filters the harmonic of the frequency for the transmit output signal, shunting harmonic current to ground. For one embodiment, the filtered harmonic is a third harmonic of the transmit frequency. For one embodiment, the transmit output signal has an output power greater than or equal to 15 dBm.

Abstract: A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-K dielectric material.

Abstract: The present disclosure provides an optical structure, including a substrate, a light detection region in the substrate, an isolation structure in the substrate, surrounding the light detection region, a color filter layer over the substrate, and a dielectric grid structure in the color filter layer, the dielectric grid structure overlapping with the light detection region.

Abstract: A method of forming a nanosheet device, including forming a channel stack on a substrate, where the channel stack includes at least one nanosheet channel layer and at least one sacrificial release layer, forming a stack cover layer on at least a portion of the channel stack, forming a dummy gate on at least a portion of the stack cover layer, wherein at least a portion of the at least one nanosheet channel layer and at least one sacrificial release layer is exposed on opposite sides of the dummy gate, removing at least a portion of the at least one sacrificial release layer on each side of the dummy gate to form a sacrificial supporting rib, and forming an inner spacer layer on exposed portions of the at least one nanosheet channel layer and at least one sacrificial supporting rib.

Abstract: An integrated circuit (IC) package is described. The IC package includes a die. The die including an active layer on a substrate and through substrate vias (TSVs) coupled to the active layer and extending through the substrate to a backside surface of the die. The IC package also includes integrated passive devices (IPDs) on the backside surface of the die and coupled to the active layer through the TSVs. The IC package further includes back-end-of-line (BEOL) layers on the active layer. The IC package also includes a metallization structure on the BEOL layers. The IC package also includes an under bump metallization layer on the metallization structure. The IC package further includes package bumps on the first under bump metallization layer.

Abstract: A stack package includes a first sub-package and a second sub-package stacked on the first sub-package. The first sub-package includes a first through mold via (TMV) for connection spaced apart from a first semiconductor chip in an X-axis direction, a first TMV for bypass spaced apart from the first semiconductor chip in a Y-axis direction, and a first redistribution line (RDL) pattern connecting the first semiconductor chip to the first TMV for connection. The second sub-package includes a second TMV for connection spaced apart from a second semiconductor chip in the Y-axis direction and another RDL pattern connecting the second semiconductor chip to the second TMV for connection. the second sub-package is stacked on the first sub-package such that the second TMV for connection is connected to the first TMV for bypass.

Abstract: A transimpedance amplifier is provided for converting a current between its two input terminals to a voltage over its two output terminals comprising a high-speed level shifter configured for creating a difference in input DC voltage and for being transparent for alternating voltages, an input biasing network configured for reverse biasing a photodiode connected to at least one of the input terminals and transparent for a feedback signal from the feedback network which is differentially and DC-coupled with the output terminals of the voltage amplifier and outputs of the feedback network are differentially and DC-coupled with the input biasing network of which outputs are coupled with inputs of the level shifter which is differentially and DC-coupled with input terminals of the voltage amplifier.

Abstract: Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.

Abstract: A semiconductor structure includes a first substrate, a second substrate, a metal layer, a buffer structure, and a barrier structure. The first substrate has a landing pad. The second substrate is disposed over the first substrate. The metal layer is disposed in the second substrate and extends from the landing pad to a top surface of the second substrate. The buffer structure is disposed in the second substrate and surrounded by the metal layer, in which a top surface of the buffer structure is below a top surface of the metal layer. The barrier structure is disposed over the metal layer and the buffer structure.

Abstract: An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes a distributed ET integrated circuit (DETIC) configured to generate a distributed ET voltage. The DETIC may be coupled to a higher-bandwidth (HB) amplifier circuit and a lower-bandwidth (LB) amplifier circuit configured to amplify an HB radio frequency (RF) signal and an LB RF signal, respectively. In examples discussed herein, the DETIC may be configured to selectively provide the ET voltage to one of the HB amplifier circuit and the LB amplifier circuit, depending on which of the HB amplifier circuit and the LB amplifier circuit is activated. By providing the DETIC in proximity to the HB amplifier circuit and the LB amplifier circuit, it may be possible to reduce potential distortion to the HB RF signal and the LB RF signal, without significantly increasing footprint of the ET amplifier apparatus.