Abstract: A digital to analog converter (DAC) can include a current mode DAC to receive an OC word from digital logic indicating an amount of current to add to or remove from sources of respective transistors of an amplifier and generate a current based on the OC word, an active output stage including a positive current mirror and a negative current mirror to generate a positive current and a negative current based on at least a portion of the generated current, and a plurality of outputs including a plurality of sink outputs and a plurality of source outputs to provide the positive and negative currents to the sources of the respective transistors.

Abstract: LED devices and methods of operating LED devices are described. An LED device includes a light-emitting element, a wavelength converting layer and a dichroic mirror. The light-emitting element is configured to emit ultra violet, visible, or ultra violet and visible light. The wavelength converting layer is configured to absorb at least a portion of the light emitted by the light-emitting element and in response emit infrared light. The dichroic mirror transmits the infrared light emitted by the wavelength converting layer, reflects the light emitted by the light emitting element, and is arranged to reflect back into the wavelength converting layer light emitted by the light emitting element, transmitted unabsorbed through the wavelength converting layer, and incident on the dichroic mirror.

Abstract: An amplifier, such as a Class D amplifier, having one or more feedback loops comprising a path from the input to the primary amplifier input, where the paths comprise a low pass filter and a compensator which is disabled when the primary amplifier clips.

Abstract: A method for fabricating a semiconductor device includes recessing a first odd hardmask and a first even hardmask to form recessed odd and even hardmasks, forming a first conductive hardmask including first conductive hardmask material on the recessed odd hardmask and a second conductive hardmask on the recessed even hardmask, and forming self-aligned vias at line ends corresponding to the first odd and even conductive lines based at least in part on the first and second conductive hardmasks.

Abstract: A amplifier device includes an amplifier, a coupling circuit, and a filter circuit. The amplifier amplifies a high frequency signal, and outputs to signal output ports the high frequency signal. The coupling circuit is provided side-by-side with the amplifier in a first direction on a substrate, connected to the signal output ports, and configured to couple output signals and output one output signal to an output terminal. The filter circuit is provided on the substrate and connected to the coupling circuit, and configured to reduce third-order IMD included in the one output signal. The one output signal is output from a middle of the substrate in a second direction intersecting with the first direction, and the filter circuit is arranged next to an edge of the substrate in the second direction, and arranged next to an edge of the substrate on the output terminal side in the first direction.

Abstract: An offset drift compensation circuit for correcting offset drift that changes with temperature. In one example, offset drift compensation circuit includes a low temperature offset compensation circuit and a high temperature offset circuit. The low temperature offset compensation circuit is configured to compensate for drift in offset at a first rate below a selected temperature. The high temperature offset compensation circuit is configured to compensate for drift in offset at a second rate above the selected temperature. The first rate is different from the second rate.

Abstract: A method for operating a charge pump having a variable switching frequency may include comparing a target minimum output voltage with an output voltage generated at an output of the charge pump and controlling switching of switches of the charge pump based on the comparison such that the variable switching frequency varies as an output current driven by the charge pump varies.

Abstract: A transimpedance amplifier circuit for generating an output voltage in accordance with an input current includes an offset resistor, a common emitter inverting amplifier having a first input and a first output, the first input receiving the input current, an emitter follower having a second input and a second output, the second input being coupled to the first output through the offset resistor, the second output outputting the output voltage, a feedback resistor connected between the second output and the first input, a variable current source connected to a node between the offset resistor and the second input, the variable current source configured to provide an offset current to the offset resistor, the offset current having a current value varied in accordance with a control signal, and a control circuit configured to generate the control signal so that an average voltage of the first output approaches a preset voltage value.

Abstract: A system for time aligning widely frequency spaced signals includes a digital predistortion (DPD) processor and a power amplifier coupled to the DPD processor and operable to provide a transmit signal at a power amplifier output. The system also includes a feedback loop coupled to the power amplifier output. The feedback loop comprises an adaptive fractional delay filter, a delay estimator coupled to the adaptive fractional delay filter, and a DPD coefficient estimator coupled to the delay estimator.

Abstract: A method for fabricating a semiconductor device includes: forming a first bonding layer on a first wafer and an etching mask on the first bonding layer; etching an edge portion of the first bonding layer by using the etching mask, such that a portion of the first wafer is exposed; removing the etching mask; and bonding a second wafer to the first bonding layer.

Abstract: A three-dimensional memory device includes a vertically alternating stack of insulating layers and electrically conductive layers located over a top surface of a substrate and memory stack structures extending through the alternating stack. Each of the memory stack structures contains a respective memory film and a respective vertical semiconductor channel, and each of the insulating layers contains a metal-organic framework (MOF) material portion. The MOF material portion has a low dielectric constant, and reduces RC coupling between the electrically conductive layers. An optional airgap may be located within the MOF material portion to further reduce the effective dielectric constant. Optionally, discrete charge storage regions or floating gates may be formed only at the levels of the electrically conductive layers to reduce program disturb and noise in the device.

Abstract: The silicon carbide semiconductor chip includes a silicon carbide substrate, a first insulating film on the silicon carbide substrate, and a second insulating film on the first insulating film. The silicon carbide substrate has a first main surface in contact with the first insulating film, a second main surface, and an outer peripheral surface. The resin covers both of the outer peripheral surface and the second insulating film. The second insulating film has a Young's modulus lower than that of the resin. The second insulating film has a thermal expansion coefficient higher than that of the silicon carbide substrate and higher than that of the resin. The second insulating film includes a first outer peripheral end portion. In a cross section perpendicular to the first main surface, the first outer peripheral end portion is provided along the outer peripheral surface.

Abstract: An insulating structure of a high electron mobility transistor (HEMT) is provided, which comprises a gallium nitride layer, an aluminum gallium nitride layer disposed on the gallium nitride layer, a groove disposed in the gallium nitride layer and the aluminum gallium nitride layer, an insulating layer disposed in the groove, wherein a top surface of the insulating layer is aligned with a top surface of the aluminum gallium nitride layer, and a passivation layer, disposed on the aluminum gallium nitride layer and the insulating layer.

Abstract: An amplifier includes a first input circuit, a second input circuit, a first compensation circuit, a second compensation circuit. The first input circuit changes a voltage level of the negative output node based on a first input signal. The second input circuit changes a voltage level of the positive output node based on a second input signal. The first compensation circuit changes the voltage level of the positive output node based on the first input signal. The second compensation circuit changes the voltage level of the negative output node based on the second output signal.

Abstract: A power amplifier circuit includes a first amplifier that amplifies a first signal, and a second amplifier arranged subsequent to the first amplifier. The second amplifier amplifies a second signal that is based on an output signal of the first amplifier. The first amplifier performs class inverse-F operation, and the second amplifier performs class F operation.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a germanium layer over a silicon substrate; forming a capping layer over the germanium layer; performing a thermal treatment on the capping layer and the germanium layer, thereby heating the germanium layer to a temperature higher than a melting point of germanium, wherein the thermal treatment is performed to diffuse germanium atoms of the germanium layer into the silicon substrate, such that at least a portion of the silicon substrate is turned to a silicon germanium layer; and removing the capping layer and the germanium layer from the silicon germanium layer after the thermal treatment is performed.

Abstract: A common-mode rejection receiver including a first differential amplifier arranged to receive a differential signal including receiving a positive signal of the differential signal at a first non-inverting input port and receiving a negative signal of the differential signal at a first inverting input port, and output a first differentiated signal based on a voltage differential between the positive signal and the negative signal. A clamping circuit is arranged to limit a magnitude of the first differentiated signal to a pre-determined limit. A second differential amplifier is arranged to receive the positive signal at a second inverting input port and receive the negative signal at a second non-inverting input port, and output a second differentiated signal. A matching circuit is arranged to receive the second differentiated signal output and output a matched signal. A summing circuit adds the clamped signal and matched signal and outputs a receiver output signal.

Abstract: A semiconductor package includes a semiconductor chip having chip pads on a first surface and having first and second side surfaces opposite to each other and third and fourth side surfaces opposite to each other, a molding member covering the third and fourth side surfaces and exposing the first and second side surfaces of the semiconductor chip, a redistribution wiring layer on a lower surface of the molding member to cover the first surface of the semiconductor chip and including a plurality of redistribution wirings electrically connected to the chip pads, and outer connection members arranged in a connection region defined on an outer surface of the redistribution wiring layer and electrically connected to the redistribution wirings.

Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.

Abstract: Linearity is improved in an amplifier circuit without lowering gain. The amplifier circuit includes a transistor, a load, an impedance element, and a variable current source. The transistor amplifies an input signal. The load is connected between the transistor and a power supply. The impedance element is connected between the transistor and a ground terminal, and passes a direct current. The variable current source is connected to a connection part between the transistor and the impedance element, and supplies a current in accordance with a voltage of the connection part.