Abstract: In one aspect, a method of enhancing semiconductor chip process variability and lifetime reliability through a three-dimensional (3D) integration applied to electronic packaging is disclosed. Also provided is an arrangement for implementing the inventive method. In another aspect, a method and on-chip controller are disclosed for enhancing semiconductor chip process variability and lifetime reliability through a three-dimensional (3D) integration applied to electronic packaging. Also provided is an on-chip reliability/variability controller arrangement for implementing the inventive method. In yet another aspect, base semiconductor chips, each comprising a plurality of chiplets, are manufactured and tested. For a base semiconductor chip having at least one non-functional chiplet, at least one repair semiconductor chiplet is vertically stacked. A functional multi-chip assembly is formed, which provides the same functionality as a base semiconductor chip in which all chiplets are functional.

Abstract: Disclosed are a method of manufacturing a dye sensitized solar battery and a solar battery assembling apparatus. The method includes: forming electrode pads on electrodes of respective solar battery sub modules; applying a conductive adhesive on the electrode; and overlapping the electrodes of the solar battery sub modules, applying a current to the electrode pads, and then heating and hardening the conductive adhesive.

Abstract: A method of manufacturing a laminated substrate is provided. The method includes: forming an oxide film on at least a surface of a first substrate having a hardness of equal to or more than 150 GPa in Young's modulus, and then smoothing the oxide film; implanting hydrogen ions or rare gas ions, or mixed gas ions thereof from a surface of a second substrate to form an ion-implanted layer inside the substrate, laminating the first substrate and the second substrate through at least the oxide film, and then detaching the second substrate in the ion-implanted layer to form a laminated substrate; heat-treating the laminated substrate and diffusing outwardly the oxide film.

Abstract: A semiconductor apparatus includes a first substrate and a second substrate located over a first portion of the first substrate and separated from the first substrate by a buried layer. The semiconductor apparatus also includes an epitaxial layer located over a second portion of the first substrate and isolated from the second substrate. The semiconductor apparatus further includes a first transistor formed at least partially in the second substrate and a second transistor formed at least partially in or over the epitaxial layer. The second substrate and the epitaxial layer have bulk properties with different electron and hole mobilities. At least one of the transistors is configured to receive one or more signals of at least about 5V. The first substrate could have a first crystalline orientation, and the second substrate could have a second crystalline orientation.

Abstract: A method for anisotropically plasma etching a semiconductor wafer is disclosed. The method comprises supporting a wafer in an environment operative to form a plasma, such as a plasma reactor, and providing an etching mixture to the environment. The etching mixture comprises at least one etch component, at least one passivation component, and at least one passivation material removal component.

Abstract: A method includes patterning a plurality of magnetic tunnel junction (MTJ) layers to form an MTJ cell, and forming a dielectric cap layer over a top surface and on a sidewall of the MTJ cell. The step of patterning and the step of forming the dielectric cap layer are in-situ formed in a same vacuum environment. A plasma treatment is performed on the dielectric cap layer to transform the dielectric cap layer into a treated dielectric cap layer, whereby the treated dielectric cap layer improves protection from H2O or O2, and thus degradation.

Abstract: A solar cell and a method for manufacturing the same are discussed. The solar cell includes a substrate of a first conductive type, an emitter layer of a second conductive type opposite the first conductive type, a plurality of first electrodes each including a first electrode layer connected to the emitter layer and a second electrode layer positioned on the first electrode layer, at least one first current collector connected to the plurality of first electrodes, and a second electrode connected to the substrate. The emitter layer forms a p-n junction along with the substrate. The first electrode layer has a first width and the second electrode layer has a second width less than the first width of the first electrode layer.

Abstract: The present invention discloses a nanoball solution coating method and applications thereof. The method comprises steps: using a scraper to coat a nanoball solution on a substrate to attach a plurality of nanoballs on the substrate; flushing or flowing through the substrate with a heated volatile solution to suspend the nanoballs unattached to the substrate in the volatile solution; and using the scraper to scrape off the volatile solution carrying the suspended nanoballs, whereby is simplified the process to coat nanoballs. The method can be used to fabricate nanoporous films, organic vertical transistors, and large-area elements and favors mass production.

Abstract: A polyimide film is effectively formed on a complicated surface. The polyimide film is formed by reacting, on the surface, diamine monomer and tetracarboxylic acid dianhydride monomer both of which are dissolved within carbon dioxide in a supercritical states, together with a polyamic acid resulting from a reaction between the diamine monomer and the tetracarboxylic acid dianhydride reached to the surface.

Abstract: A method for making a semiconductor device is provided which comprises (a) creating a first mask for the epitaxial growth of features in a semiconductor device, said first mask defining a set of epitaxial tiles (219); (b) creating a second mask for defining the active region of the semiconductor device, said second mask defining a set of active tiles (229); and (c) using the first and second masks to create a semiconductor device.

Abstract: A method for producing an electrical feedthrough in a substrate includes: forming a first printed conductor on a first side of a substrate which electrically connects a first contact area of the substrate on the first side; forming a second printed conductor on a second side of a substrate which electrically connects a second contact area of the substrate on the second side; forming an annular trench in the substrate, a substrate punch being formed which extends from the first contact area to the second contact area; and selectively depositing an electrically conductive layer on an inner surface of the annular trench, the substrate punch being coated with an electrically conductive layer and remaining electrically insulated from the surrounding substrate due to the annular trench.

Abstract: According to one embodiment, in a method of a nitride semiconductor light emitting device, a nitride semiconductor laminated body is formed on a first substrate having a first size. A first adhesion layer with a second size smaller than the first size is formed on the nitride semiconductor laminated body. A second adhesion layer is formed on a second substrate. The first and the second substrates are bonded while the first and second adhesion layers being overlapped each other. The first substrate is removed so as to generate a recess having a third size equal to or larger than the second size. The first substrate is etched until exposing the nitride semiconductor laminated body while injecting a chemical solution into the recess. The exposed nitride semiconductor laminated body is etched using the chemical solution so as to form a concave-convex portion in the exposed nitride semiconductor laminated body.

Abstract: A method for fabricating a semiconductor device includes forming a mold layer over a substrate, wherein the mold layer includes a first sacrificial layer and a second sacrificial layer that are stacked, forming an insulation layer pattern that has an etch selectivity to the first sacrificial layer and the second sacrificial layer on the mold layer, etching the mold layer using the insulation layer pattern as an etch barrier to form storage node holes, forming a storage node conductive layer over a substrate structure including the insulation layer pattern and the mold layer that has been etched, performing a storage node isolation process that simultaneously forms storage nodes and forming the insulation layer pattern to a first thickness, and removing the first sacrificial layer and the second sacrificial layer.

Abstract: A manufacturing method for a semiconductor device, the method including forming a thin film transistor by forming a polysilicon thin film on an insulating substrate, forming a gate electrode via a gate insulating film, and forming source/drain regions and a channel region by ion implantation in the polysilicon thin film by using the gate electrode as a mask, forming an interconnection layer on an interlayer dielectric film covering this thin film transistor and forming a first contact to be connected to the thin film transistor through the interlayer dielectric film, forming a silicon hydronitride film on the interlayer dielectric film so as to cover the interconnection layer, forming a lower electrode on this silicon hydronitride film and forming a second contact to be connected to the interconnection layer through the silicon hydronitride film, and forming a ferroelectric layer on the lower electrode.

Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of mixing wavelength conversion particles in a base material to a first weight percentage, mixing reflective particles in the base material to a second weight percentage, curing the base material to form a wavelength conversion layer having a selected thickness, and attaching the wavelength conversion layer to a die.

Abstract: A method comprises: forming a first array of fins and a second array of fins on a substrate; masking off the first array of fins from the second array of fins with a first mask; depositing a dielectric layer on the second array of fins and on the first mask on the first array of fins; masking off the dielectric layer deposited on the second array of fins with a second mask; removing the dielectric layer and the first mask from the first array of fins; removing the second mask from the second array of fins to expose the dielectric layer on the second array of fins; and depositing a chemox layer on the first array of fins. The chemox layer is thinner than the dielectric layer on the second array of fins.

Abstract: In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

Abstract: A deposition apparatus includes: a deposition source including a spray nozzle linearly arranged in a first direction and discharging a deposition material; and a pair of angle control members disposed at both sides of the deposition source and controlling a discharging direction angle of the deposition material. Each angle control member includes a rotation axis parallel to the first direction, and a plurality of shielding plates installed about the rotation axis and separated from each other by a predetermined interval around the rotation axis. Although the deposition angle is changed according to the increasing of the process time, the deposition angle is compensated to form a uniform thin film. Also, the organic thin film may be uniformly deposited through each pixel of an organic light emitting diode (OLED) display, thereby increasing luminance uniformity for each pixel.

Abstract: The present invention relates to a method for manufacturing silicon thin-film solar cells, including: providing a substrate; forming a first electrode on the substrate; forming a first doped semiconductor layer on the first electrode by chemical vapor deposition; forming an intrinsic layer on the first doped semiconductor layer by chemical vapor deposition, where the intrinsic layer includes a plurality of amorphous/nanocrystalline silicon layers, and the intrinsic layer has various energy bandgaps formed by varying average grain sizes of the amorphous/nanocrystalline silicon layers; forming a second doped semiconductor layer on the intrinsic layer by chemical vapor deposition, where one of the first doped semiconductor layer and the second doped semiconductor layer is a p-type amorphous silicon layer and the other is an n-type amorphous/nano-microcrystalline silicon layer; and forming a second electrode on the second doped semiconductor layer.

Abstract: Methods of manufacturing semiconductor devices and transistors are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece comprising a plurality of fins, and forming a semiconductive material over a top surface of the plurality of fins. An etch stop layer is formed over the semiconductive material, and an insulating material is disposed over the etch stop layer. The insulating material and a portion of the etch stop layer are removed from over the plurality of fins. Forming the semiconductive material or forming the etch stop layer are controlled so that removing the portion of the etch stop layer does not remove the etch stop layer between a widest portion of the semiconductive material over the plurality of fins.