Patents Examined by Michelle Mandala
  • Patent number: 11700746
    Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base substrate; an insulating layer on the base substrate and in at least the peripheral area; a plurality of light emitting elements on the base substrate and in the display area; an encapsulating layer on a side of the plurality of light emitting elements distal to the base substrate to encapsulate the plurality of light emitting elements; and a dam layer on a side of the insulating layer distal to the base substrate. The encapsulating layer includes a first inorganic encapsulating sublayer extending from the display area into the peripheral area. The display substrate has a groove extending into the first insulating layer in the peripheral area, and substantially surrounding the display area. The first inorganic encapsulating sublayer extends into at least a portion of the groove.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: July 11, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Shilong Wang, Zhiliang Jiang
  • Patent number: 11699666
    Abstract: A semiconductor device in which occurrence of peeling between a filling member and a metal terminal is suppressed is obtained. The semiconductor device includes: an insulating substrate having a front surface and a back surface, and having a semiconductor element joined to the front surface; a base plate joined to the back surface of insulating substrate; a case member surrounding insulating substrate; a filling member having an upper surface, covering insulating substrate, and filling a region surrounded by base plate and case member; and a metal member having a plate shape that leans toward an upper surface side of filling member inside filling member, has one end joined to the front surface of insulating substrate and another end separated from an inner wall of case member, and is exposed from the upper surface of filling member.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: July 11, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Akira Kosugi
  • Patent number: 11697586
    Abstract: The present publication discloses a micromechanical structure including at least one active element, the micromechanical structure comprising a substrate, at least one layer formed on the substrate forming the at least part of the at least one active element, mechanical contact areas through which the micromechanical structure can be connected to other structures like printed circuit boards and like. In accordance with the invention the micromechanical structure includes weakenings like trenches around the mechanical contact areas for eliminating the thermal mismatch between the active element of the micromechanical structure and the other structures.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: July 11, 2023
    Assignee: Teknologian tutkimuskeskus VTT Oy
    Inventors: Aarne Oja, Jaakko Saarilahti
  • Patent number: 11688754
    Abstract: Photonic devices and methods having an increased quantum effect length are provided. In some embodiments, a photonic device includes a substrate having a first surface. A cavity extends into the substrate from the first surface to a second surface. A semiconductor layer is disposed on the second surface in the cavity of the substrate, and a cover layer is disposed on the semiconductor layer. The semiconductor layer is configured to receive incident radiation through the substrate and to totally internally reflect the radiation at an interface between the semiconductor layer and the cover layer.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsai-Hao Hung, Tao-Cheng Liu, Ying-Hsun Chen
  • Patent number: 11682730
    Abstract: A semiconductor nanostructure and an epitaxial semiconductor material portion are formed on a front surface of a substrate, and a planarization dielectric layer is formed thereabove. Recess cavities are formed to expose a first active region and the epitaxial semiconductor material portion. A metallic cap structure is formed on the first active region, and a sacrificial metallic material portion is formed on the epitaxial semiconductor material portion. A connector via cavity is formed by anisotropically etching the sacrificial metallic material portion and an underlying portion of the epitaxial semiconductor material portion while the metallic cap structure is masked with a hard mask layer. A connector via structure is formed in the connector via cavity. Front-side metal interconnect structures are formed on the connector via structure and the metallic cap structure, and a backside via structure is formed through the substrate on the connector via structure.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Li-Zhen Yu, Chia-Hao Chang, Lin-Yu Huang, Cheng-Chi Chuang, Chih-Hao Wang
  • Patent number: 11682632
    Abstract: An integrated device that includes a substrate, a circuit region located over the substrate, a design keep out region located over the substrate, and a periphery structure located over the substrate. The design keep out region laterally surrounds the circuit region. The periphery structure includes a first plurality of interconnects that laterally surrounds the design keep out region. The periphery structure is configured to operate as an electrical seal ring and a mechanical crack stop.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: June 20, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Abhijeet Paul, Mishel Matloubian
  • Patent number: 11683972
    Abstract: The present disclosure discloses a method for manufacturing a light-emitting device using laser etching including: a first light-emitting layer forming step for depositing a first light-emitting layer on an surface of a hole transport layer deposited on an upper surface of an anode substrate; a first light-emitting device forming step for etching the first light-emitting layer to form a first light-emitting device; a second light-emitting layer depositing step for depositing a second light-emitting layer on a region including the upper surface of the hole transport layer; a second light-emitting device forming step for etching the second light-emitting layer to form a second light-emitting device; a third light-emitting layer depositing step for depositing a third light-emitting layer on a region including the upper surface of the hole transport layer; and a third light-emitting device forming step for etching the third light-emitting layer to form a third light-emitting device.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: June 20, 2023
    Assignee: Kyonggi University Industry & Academia Cooperation Foundation
    Inventor: Sang Hyun Ju
  • Patent number: 11676993
    Abstract: In one example an electronic device includes a first resistor and a second resistor. The first resistor includes a first resistive layer located over a substrate, the first resistive layer having a first sheet resistance. The second resistor includes a first portion of a second resistive layer located over the substrate, the second resistive layer having a second sheet resistance different from the first sheet resistance. The first resistive layer is located between the substrate and a second noncontiguous portion of the second resistive layer.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: June 13, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Christoph Andreas Othmar Dirnecker, Wolfgang Schwartz, Doug Weiser, Joel Martin Halbert, Joseph Anthony DeSantis, Karsten Jens Spinger
  • Patent number: 11676885
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a package leadframe assembly. The package leadframe includes a plurality of leads. An adhesive is placed on a portion of the plurality of leads. A die pad is placed onto the adhesive. A portion of the die pad overlaps the portion of the plurality of leads. A semiconductor die is attached to the die pad. A molding compound encapsulates the semiconductor die and a portion of the package leadframe assembly.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: June 13, 2023
    Inventors: Yeou Chian Chang, Chao Hui Huang
  • Patent number: 11678503
    Abstract: An organic light emitting diode display panel of the present disclosure includes a substrate, an array layer disposed on the substrate, a specific recess disposed on a surface of the array layer away from the substrate, an electroluminescent layer disposed on the array layer, and a thin film encapsulation layer disposed on the electroluminescent layer and covering the electroluminescent layer. The thin film encapsulation layer extends into the specific recess and fills the specific recess, and special structures which engage with each other are formed at a position corresponding to the specific recess.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: June 13, 2023
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Jiajia Sun
  • Patent number: 11678584
    Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a ā€œZā€ axis magnetic field onto sensors orientated in the XY plane.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: June 13, 2023
    Assignee: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Renu Whig, Phillip Mather, Kenneth Smith, Sanjeev Aggarwal, Jon Slaughter, Nicholas Rizzo
  • Patent number: 11672162
    Abstract: A method of patterning quantum dot layer includes: forming, on a substrate, a film layer including a photosensitive material and quantum dots with ligands on surfaces of the quantum dots; irradiating a quantum dot reserved area with light of a preset wavelength; where under irradiation with light of the preset wavelength, the photosensitive material or a product of the photosensitive material after light irradiation reacts with the ligands on the surfaces of the quantum dots, to allow the ligands to fall off from the surfaces of the quantum dots, so that solubility of the quantum dots is changed to cause the quantum dots to undergo coagulation; and removing a portion of the film layer which is not irradiated by the light of the preset wavelength, to form a patterned quantum dot portion of the quantum dot layer in the quantum dot reserved area.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: June 6, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wenhai Mei, Zhenqi Zhang, Zhihong Wu
  • Patent number: 11659752
    Abstract: An electro-optical device comprising a plurality of pixels. Each of the plurality of pixels includes a first sub pixel and a second sub pixel that are arrayed in the first direction, a third sub pixel and a fourth sub pixel that are arrayed in the first direction, and a color filter corresponding to each of the first sub pixel, the second sub pixel, the third sub pixel, and the fourth sub pixel. Each of the first sub pixel, the second sub pixel, the third sub pixel, and the fourth sub pixel including a light-emitting element includes a light-emitting region, a supply circuit for supplying current to the light-emitting element, and a contact region in which a contact for electrically connecting the light-emitting element to the supply circuit is disposed.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: May 23, 2023
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Takeshi Koshihara
  • Patent number: 11640927
    Abstract: The present disclosure relates to display devices, and more specifically, a display device including a display panel including an active area and a non-active area surrounding the active area and including a pad area, a driving integrated circuit disposed in the pad area, a stiffener disposed between the driving integrated circuit and the active area, spaced apart from the driving integrated circuit, and disposed to surround a portion of a lateral surface of the driving integrated circuit, and a color-changing layer having a color, disposed to surround a portion, or all, of the lateral surface of the driving integrated circuit, and overlapping with at least a portion of an upper surface of the stiffener. As the display device includes the color-changing layer, even without separate measurement equipment, quality and a process condition or situation of the display device can be easily checked or identified.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: May 2, 2023
    Assignee: LG Display Co., Ltd.
    Inventor: Jihyeon Hwang
  • Patent number: 11640957
    Abstract: A light emitting module includes a substrate, a light reflective resin layer, wiring electrodes and a light emitting element. The light reflective resin layer is arranged on the substrate. The wiring electrodes are arranged over the substrate with the light reflective resin layer being interposed between the substrate and the wiring electrodes. The light emitting element has an electrode formation surface including a positive and negative pair of element electrodes, and a light emitting surface on a side opposite to the electrode formation surface. The light emitting element is arranged on top surfaces of the wiring electrodes with the element electrodes facing the top surfaces of the wiring electrodes.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: May 2, 2023
    Assignee: NICHIA CORPORATION
    Inventors: So Sakamaki, Yasunori Nagahama, Masahiko Sano, Katsuyoshi Kadan
  • Patent number: 11637262
    Abstract: Embodiments of the present disclosure provide an array substrate and a manufacturing method therefor, and a display panel. The array substrate includes: a substrate and a pixel defining layer provided on the substrate, the pixel defining layer including a plurality of opening areas, and the plurality of opening areas being provided with a plurality of quantum dot light-emitting devices in a one-to-one correspondence manner; each of the quantum dot light-emitting devices includes a quantum dot light-emitting layer, and the quantum dot light-emitting layer is made of a quantum dot material. At least one of the pixel defining layer and the quantum dot material is magnetic.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: April 25, 2023
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wenhai Mei, Tuo Sun, Yanzhao Li
  • Patent number: 11637269
    Abstract: An organic EL display device includes an organic EL element disposed on a flattening film, and a sealing film disposed over the organic EL element, a display region, and a frame region disposed around the display region. The frame region includes a plurality of mask spacers. The flattening film has a recess disposed between the display region and the mask spacers adjacent to the display region. The recess is filled with an organic film.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: April 25, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Senoo, Takeshi Hirase, Hisao Ochi, Takashi Ochi, Tohru Sonoda, Akihiro Matsui, Yoshinobu Miyamoto, Jumpei Takahashi
  • Patent number: 11626568
    Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk, resistance of a laterally conductive OLED layer may be increased. The laterally conductive layer may include an organic host material, dopants, and a resistance-increasing additive. Another way to reduce leakage current is to apply bias voltages to the anodes of the display and/or expose the laterally conductive layer to ultraviolet light, causing dopants within the laterally conductive layer to degrade.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: April 11, 2023
    Assignee: Apple Inc.
    Inventors: Jared S. Price, Mathew K. Mathai, Hitoshi Yamamoto, Martijn Kuik
  • Patent number: 11626543
    Abstract: A light emitting apparatus includes: an electrically insulating base member that has first and second sides extending in a width direction, and third and fourth sides extending in a length direction, wherein the third and fourth sides are longer than the first and second sides; a plurality of electrically conductive pattern portions; a plurality of light emitting devices mounted on the electrically conductive pattern portions, the light emitting devices being arrayed in the length direction; a protection element that is flip chip mounted on the electrically conductive pattern portions and located, in the plan view, between the light emitting devices and the third side of the base member in the width direction; a first resin part that has a frame shape; a second resin part that is located in the first resin part; and at least one transparent member located on the light emitting devices.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 11, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Tomonori Miyoshi, Kenji Ozeki, Tomoaki Tsuruha
  • Patent number: 11626577
    Abstract: An organic light-emitting diode (OLED) device includes a substrate, a well structure on the substrate with the well structure having a recess with side walls and a floor, a lower metal layer covering the floor and side-walls of the well, an upper conductive layer on the lower metal layer covering the floor of the well and contacting the lower metal layer, the upper conductive layer having outer edges at about an intersection of the side walls and the floor, a dielectric layer formed of an oxide of the lower metal layer covering the side walls of the well without covering the upper conductive layer, a stack of OLED layers covering at least the floor of the well, the upper conductive layer providing an electrode for the stack of OLED layers, and a light extraction layer (LEL) in the well over the stack of OLED layers and the dielectric layer.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: April 11, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Gang Yu, Chung-Chia Chen, Wan-Yu Lin, Hyunsung Bang, Lisong Xu, Byung Sung Kwak, Robert Jan Visser