Abstract: Methods and computer systems provide for the selection of a DSDT that accurately describes a current configuration of the computer system. Because the system configuration can change over time, such as due to hardware malfunctions or the addition or removal of hardware requiring a BIOS interface to software, multiple DSDTs are available for selection so that for each computer system configuration, an appropriate DSDT is available. Upon boot-up, the hardware of the computer system is analyzed to determine the set of available North Bridge chipset devices. An appropriate DSDT is then selected from a set of multiple DSDTs for the current computer system configuration.

Abstract: Transition signal control for creating asynchronous timing is provided using a transition signal control circuit, which includes Muller C elements each with an inverter. The control device is constituted by a machine ring including n-stages of transition signal control circuits, a state ring including k-stages of transition signal control circuits, and a synchronous circuit for synchronizing with the machine ring by receiving a vector which is output from the state ring. When the output vector of the state ring is received, the synchronous circuit outputs a vector to the machine ring. The output vector of the machine ring and the output vector of the state ring create timings for controlling the processor, for example, asynchronously, and these timings are input to the instruction decoder, for example.

Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

Abstract: Methods are disclosed for establishing a path for data transmissions in a system having a plurality of possible paths by creating a configuration database and establishing internal connection paths based upon a configuration policy and the configuration database. The configuration policy can be based on available system resources and needs at a given time. In one embodiment, one or more tables are initiated in the configuration database to provide connection information to the system. For example, a path table and a service endpoint table can be employed to establishing a partial record in the configuration database whenever a user connects to a particular port on a universal port card in the system. The method can further include periodically polling records in the path table and transmitting data from the partial records to a policy provisioning manager (PPM).

Abstract: The present invention provides for saving power in a floating point unit. Bypass logic is coupled to the input of the aligner and the multiplier. An aligner bypass is coupled to the output of the aligner and an output of the bypass logic. A multiplier bypass is coupled to the output of the multiplier and an output of the bypass logic. The aligner bypass and the multiplier bypass transmit the output of the aligner and multiplier, or the bypass logic, as a function of an aligner bypass signal and a multiplier bypass signal, respectively. An adder is coupled to the output of the aligner bypass and the multiplier bypass. Clock disable logic is used to selectively enable and disable at least portions of the aligner, multiplier and bypass logic. This is done based on the operation and on the value of the operands.

Abstract: Methods and computer systems provide updating of device configuration information in a DSDT of a BIOS for a computer system. Because the device configuration information can be changed, this information is determined upon boot-up of the computer system. The determined device configuration information such as the device number, function number, and/or bus number is then updated in the DSDT table at an appropriate entry for the device rather than having the device configuration information be pre-defined when the DSDT is developed.

Abstract: Function of an equipment control apparatus is changed from outside of the equipment control apparatus by means of a communication method of higher security than that of a monitoring system operating via a Web communication net: the equipment control apparatus being provided on the side of facility equipments constituting a power system and controlling the facility equipments; and the monitoring control apparatus being provided outside of the equipment control apparatus and obtaining internal information about the equipment control apparatus via the Web communication net to monitor a state of the power system from the internal information.

Abstract: A method and system for providing priority to a station in a congested half duplex Ethernet network. Specifically, one embodiment of the present invention includes a method for providing priority to a peripheral component (e.g., half duplex Network Interface Card) in a congested network. The method includes the step of detecting a collision of a data packet during transmission of the data packet by a peripheral component coupled to a network. Furthermore, the method includes the step of determining a restricted back off time. It should be appreciated that the restricted back off time is substantially equal to or less than a restricted time value. Additionally, the method includes the step of causing the peripheral component to wait the restricted back off time before trying to retransmit the data packet over the network.

Abstract: A system and method are provided for reducing power consumption within a video processing portion of a system. Activity associated within a video-processing portion of a personal digital assistant is analyzed. As reduced activity is identified, power conservation modes are implemented. In a normal mode of operation, a clock signal generated through an external oscillator is provided to a phase locked loop (PLL). An output clock signal from the PLL is then provided to several dividers to generate system clock signals. In a reduced mode of operation, the output clock from the external oscillator is provided to a divider, bypassing the PLL. Video processing components then use clock signals based on the external oscillator. In a suspend mode, both the PLL and the external oscillator are disabled.

Abstract: Some computer operating systems do not permit application programs to perform certain tasks. If there is a desire to perform a forbidden task, a virtual partition (228) is created (610) in a storage device (108), such as a hard disk drive, associated with the computer system (100). The virtual partition (228) is stored as a file within the file system of the storage device (108). Operating system files (414) are installed in the virtual partition (228), and the storage device (108) is configured (616) to boot the computer system (100) using the operating system in the virtual partition. When the task is complete, the computer system (100) is configured to boot using the operating system other than the one in the virtual partition.

Abstract: An interleaved delay line for use in phase locked and delay locked loops is comprised of a first portion providing a variable amount of delay substantially independently of process, temperature and voltage (PVT) variations while a second portion, in series with the first portion, provides a variable amount of delay that substantially tracks changes in process, temperature, and voltage variations. By combining, or interleaving, the two types of delay, single and dual locked loops constructed using the present invention achieve a desired jitter performance under PVT variations, dynamically track the delay variations of one coarse tap without a large number of delay taps, and provide for quick and tight locking. Methods of operating delay lines and locked loops are also disclosed.

Abstract: To provide an integrated information processing unit that is capable of producing images and sounds of high quality. It includes a control unit, information processing units, and a merge unit. Each of the information processing units includes a counter for synchronization purpose. The information processing units performs a predetermined processing based on the measured value obtained by the counter for synchronization purpose. The control unit simultaneously provides a trigger of measurement of synchronization clocks to all counters for synchronization purpose and individually provides a reset signal to the counters for synchronization purpose which the reset signal is for initializing the measured value obtained by the counters for synchronization purpose. The merge unit merges information processed by the information processing units according to the unit of output (in frame) of, for example, a display device.

Abstract: An output device can be quickly and easily set to the operating parameters required for a particular output process according to data received from a host device. The output device has RAM that temporarily stores the operating parameters, a memory initialization processor that initializes the volatile memory in response to a specific input, a controller that stores operating parameter values for controlling the output device into the RAM in response to one or more first commands from the host device. A second command from the host device causes a first operating parameter controller to save the operating parameters from RAM into a flash ROM. A second operating parameter controller responds to a third command from the host device by storing information into the flash ROM indicative of whether operating parameter data in the flash ROM should be automatically loaded after the memory initialization process.

Abstract: A system and method are provided for reducing power consumption within a video processing portion of a system based on display content. Display content is monitored to determine whether the display content is changing. New display content is compared to old display content to determine if the display content is changing. If the display content has not changed, a frame rate used to output display data is reduced. A color depth associated with the display data is also reduced. Power consumption can be reduced when it is determined that display content is not changing.

Abstract: A method for reducing the boot time for a computer includes: supplying power to the computer; disabling a plurality of input/output (I/O) devices coupled to the computer; performing a boot process for the computer; and placing the computer in a suspend to memory state before a user turns on the computer. The method reduces the boot time for a computer by placing the computer in a suspend to memory mode rather than completely shutting off the computer. In this manner, when a user of the computer pushes the power button, the computer wakes up from the suspend to memory mode instead of being required to perform the entire boot process. This significantly reduces the time required to make the computer available to the user, allowing the computer to function like an appliance.

Abstract: A self-powered peripheral apparatus is connected upstream to another apparatus via a universal serial bus (USB), wherein one of the conductors of the USB provides a supply voltage to the self-powered peripheral apparatus. One of the two data conductors of the USB is connected to a voltage source of the self-powered peripheral apparatus. The self-powered peripheral apparatus includes a control device for controlling the data conductor supply for supplying the latter only if the supply voltage is present on the supply conductor. The control device includes a circuit for detecting the supply voltage and a logic circuit for controlling the regulator.

Abstract: A software implementation of an application watchdog, comprising a restart service operating in the user mode and a watchdog driver operating in the kernel mode of a computer operating system. The driver incorporates a system thread configured to monitor a plurality of user applications operating in the user mode. The driver provides a first IOCTL signal interface for communicating control signals between the watchdog driver and one of the user applications and a second IOCTL signal interface for communicating control signals between the watchdog driver and the restart service. A communication interface exists for coordinating timer events with the operating system scheduler. If the system thread does not receive a message from one of said applications within an allotted period of time, the timer event alerts the watchdog driver that the allotted time has elapsed and the watchdog driver signals the restart service to restart that application.

Abstract: The present invention, in various embodiments, provides techniques for managing system power. In one embodiment, system compute loads and/or system resources invoked by services running on the system consume power. To better manage power consumption, the spare capacity of a system resource is periodically measured, and if this spare capacity is outside a predefined range, then the resource operation is adjusted, e.g., the CPU speed is increased or decreased, so that the spare capacity is within the range. Further, the spare capacity is kept as close to zero as practical, and this spare capacity is determined based on the statistical distribution of a number of utilization values of the resources, which is also taken periodically. The spare capacity is also calculated based on considerations of the probability that the system resources are saturated.

Abstract: An energy saving circuit is connected to a receiver of a first physical layer of a first network device. The energy saving device has first and second energy saving modes. In the first energy saving mode, a sense circuit generates a receive signal when connection activity is detected by the receiver. The energy saving circuit powers down the physical layer when the receiver does not detect the connection activity. An autonegotiation circuit powers up the first physical layer and negotiates a connection with a second physical layer of a second network device when the sense circuit generates the receive signal. In a second energy saving mode, a second timer periodically powers a transmitter and generates a link pulse. After the transmitter generates the link pulse, the transmitter is turned off.

Abstract: A method and mechanism for generating a clock signal with a relatively linear increase or decrease in clock frequency. A first clock signal is generated with a first frequency which is then used to generate a second clock signal with a second frequency. The second frequency is generated by dropping selected pulses of the first clock signal. Particular patterns of bits are stored in a storage element. Bits are then selected and conveyed from the storage element at a frequency determined by the first clock signal. The conveyed bits are used to construct the second clock signal. By selecting the particular pattern of bits selected and conveyed, the frequency of the second clock signal may be determined. Further, by changing the patterns of bits within the registers at selected times, the frequency of the second clock signal may be made to change in a relatively linear manner.