Abstract: An oscillator supplies a clock signal having a frequency determined in part according to a received current. A transmit side charge pump is coupled to the clock signal and boosts a voltage supplied to the charge pump to generate a boosted voltage. A driver circuit drives a transmit signal having a frequency based on the clock signal and a voltage based on the boosted voltage to a capacitive isolation communication path. A receive side charge pump is coupled to the isolation capacitors of the isolation communication path and boosts a voltage of the received signal on the receive side of the isolation communication path and supplies a gate signal with the boosted voltage to a gate of at least one transistor.
Abstract: Provided are an energy harvesting device capable of generating electric energy by effectively obtaining an electromagnetic wave emitted from an indoor lighting device and a power control system of a lighting device capable of performing self-power generation by using the energy harvesting device as a power source. The energy harvesting device using an electromagnetic wave according to an exemplary embodiment of the present disclosure includes: an interface unit made of a conductive material and configured to capture a conductive interference signal transferred through a conductive member of a lighting device; and a rectifier circuit unit configured to rectify the captured conductive interference signal to convert the rectified conductive interference signal to direct current power.
Type:
Grant
Filed:
October 18, 2012
Date of Patent:
December 20, 2016
Assignee:
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Inventors:
Chang Hee Hyoung, Sung Weon Kang, Jung Hwan Hwang, In Gi Lim, Jung Bum Kim, Kyung Soo Kim, Kyung Hwan Park, Hyung-Il Park, Tae Young Kang, Sung Eun Kim, Tae Wook Kang, Byoung Gun Choi
Abstract: Pulse width modulated controller systems. Implementations may include: a microcontroller coupled with a memory, a switch controller coupled with the microcontroller, and a calibration unit. The calibration unit may include one or more comparators, one or more passive electrical components, and an encoder logic all operatively coupled together and coupled with the microcontroller and with the switch controller where the at least one comparator and the one or more passive electrical components are electrically coupled with a supply voltage to the semiconductor switch and with a load voltage (output voltage) from the semiconductor switch.
Abstract: Embodiments disclose an integrated circuit (IC) including a power input unit, which receives power from an external power supply, a core, which is driven by the power input through the power input unit, and a controller, which determines characteristics of the core and controls the external power supply to supply the power according to the determined characteristics.
Type:
Grant
Filed:
December 12, 2012
Date of Patent:
December 6, 2016
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Kang-young Won, Jae-hee Han, Tae-yong Son
Abstract: Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal.
Abstract: Automatic and robust anti-shoot-through glitch-free operation of half-bridge control pre-driver and power stage circuits have been achieved by using multiple feedback control signals. These feedback signals are taken both from the gates of power devices on high side and low sides and from the gates of one or more devices on both high side and low side that enable power device ON state. No duty cycle limitation is required of the input signal. The control logic uses NAND/NOR RS latches. The solution disclosed can readily be scaled to higher order of feedback loops providing even greater level of robustness.
Abstract: A rotational synchronizer for metastability resolution is disclosed. A synchronizer includes a plurality of M+1 latches each coupled to receive data through a common data input. The synchronizer further includes a multiplexer having a N inputs each coupled to receive data from an output of a corresponding one of the M+1 latches, and an output, wherein the multiplexer is configured to select one of its inputs to be coupled to the output. A control circuit is configured to cause the multiplexer to sequentially select outputs of the M+1 latches responsive to N successive clock pulses, and further configured to cause the M+1 latches to sequentially latch data received through the common data input.
Abstract: A circuit comprises: a first capacitor; a second capacitor; a MOS (metal oxide semiconductor) transistor; and an operational amplifier, wherein the first capacitor is configured to couple to the second capacitor via the MOS transistor; the operational amplifier is configured to receive a voltage at the first capacitor and output a control voltage; and the MOS transistor is configured to be controlled by the control voltage.
Abstract: An exemplary current switching device includes an integrated gate-commutated thyristor with an anode, a cathode, and a gate, wherein a current between the anode and the cathode is interruptible by applying a switch-off voltage to the gate; and a gate unit for generating the switch-off voltage. The gate unit and a connection of the gate unit to the gate establish a gate circuit having a stray impedance. The gate unit is adapted for generating a spiked switch-off voltage with a maximum above a breakdown voltage (VGRMAX) between the cathode and the gate, such that the switch-off voltage at the gate stays below the breakdown voltage (VGRMAX) due to the stray impedance of the gate circuit.
Abstract: A power semiconductor device includes an output transistor, a control circuit connected with a gate of the output transistor, a first discharge route from a first node to a ground terminal, and a second discharge route from the first node to the ground terminal. In a usual turn-off, only the first discharge route is used. When a load abnormality occurs, both of the first and second discharge routes are used. The second discharge route contains a discharge transistor and a countercurrent prevention device. The discharge transistor is connected between the first node and the second node. The countercurrent prevention device prevents a flow of current from the third node to the second node. At least, in an OFF period, the control circuit sets the gate voltage of the discharge transistor to a high level.
Abstract: Described is an apparatus which comprises: a first voltage follower; a second voltage follower; and a pass-gate including a p-type transistor in parallel to an n-type transistor, wherein gate terminal of the p-type transistor is controlled by an output of the first voltage follower, and wherein gate terminal of the n-type transistor is controlled by an output of the second voltage follower.
Abstract: A feedthrough signal transmission circuit includes a first permanently on cell and a cell controlling unit. The first permanently on cell is arranged to transmit a first control signal. The cell controlling unit is coupled to the first permanently on cell, and includes a power switch and a plurality o buffers. The power switch is coupled to the first permanently on cell, arranged to receive a switch control signal and the first control signal, and selectively output the first control signal according to the switch control signal. The plurality of buffers is coupled to the power switch. Each of the buffers is arranged to buffer a data input only when powered by the first control signal output from the power switch.
Abstract: Aspects of the present invention provides a device that is capable of accurately measuring an output current of a transistor, controls the drive of a switching element, by using an existing IC tester without any evaluation board improvement. The control device according to one aspect of the present invention has: a drive circuit, a plurality of transistors for controlling the drive of a switching element and a transistor operation controller. A transistor for turning the switching element OFF is configured by a plurality of transistors. The transistor operation controller, in a normal operation, performs ON/OFF control on the two transistors simultaneously or collectively by means of the same drive signal output from the drive circuit. In a test operation, the transistor operation controller sequentially selects one of the transistors and supplies the same drive signal to the selected transistor, to drive the transistors individually.
Abstract: A circuit includes a phase adjustment capacitor (PAC) coupled to a signal path and configured to adjust a phase of a signal on the signal path. A transistor switch device is coupled in series with the PAC to provide a circuit branch parallel with the signal path. The transistor switch device is configured to selectively open or close the circuit branch of the signal path to enable or disable, respectively, the adjustment of the phase of the signal on the signal path via the PAC. A nonlinear capacitance is coupled to a node interconnecting the PAC and the transistor switch device. The nonlinear capacitance is configured to vary inversely proportional with a capacitance of the transistor switch device with respect to the signal on the signal path and to linearize a total capacitance provided by the circuit branch when the circuit branch is open.
Abstract: A method can be used for driving a switch circuit. The switch circuit includes a first transistor device and a second transistor device. Both the first transistor device and the second transistor device have a load path and a control terminal. The load paths of the first transistor device and the second transistor device are connected in series. The control terminal of the first transistor device is configured to receive a first drive signal and the control terminal of the second transistor device is configured to receive a second drive signal. One of an on-level switching on the first transistor device or an off-level switching off the first transistor device of the first drive signal is selected and one of a first signal level and a second signal level of the second drive signal is selected.
Abstract: A semiconductor device may include a control signal generation block configured to shift a level of a trimming signal and generate a selection control signal, and shift a level of a first enable signal and generate a driving control signal, when an internal voltage is raised to a level greater than a sensing reference voltage after an initialization period is ended. The semiconductor device may include an internal voltage generation block configured to select one of a plurality of trimming division voltages as a selected reference voltage in response to the selection control signal, and drive the internal voltage by comparing levels of the selected reference voltage and the internal voltage in response to the driving control signal.
Abstract: LO leakage and Image are common and undesirable effects in typical transmitters. Typically, thirty complex hardware and algorithms are used to calibrate and reduce these two impairments. A single transistor that draws essentially no de current and occupies a very small area, is used to detect the LO leakage and Image Rejection signals. The single transistor operating as a square law device, is used to mix the signals at the input and output ports of the power amplifier (PA). The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.
Abstract: A frequency doubling device suitable to generate an output terminal voltage oscillating at a differential frequency double the frequency of the input differential voltage, includes a first differential pair of P-type transistors and a second differential pair of N-type transistors controlled by the differential input voltage, as well as an LC oscillator including a LC resonant dipole through which the absorbed current is forced by two differential pairs of transistors.
Abstract: In the case where luminance of light to be irradiated onto a multi-screen is not homogenized over the entire multi-screen, each of an image display apparatus and image display apparatuses carries out a homogenizing process of light to be irradiated onto a multi-screen over the entire multi-screen.
Abstract: A method for switching a cycle in a power transistor circuit is created, especially in a parallel circuit of power transistors. The method includes the step of specifying a switching time difference and the switching of the power transistors of two switching times which are separate from one another by use of the switching time difference.