Patents Examined by Sara Crane
  • Patent number: 6933549
    Abstract: A barrier layer protecting, for example, a ferroelectric capacitor from hydrogen is described. The barrier layer comprises aluminum oxide with barrier enhancement dopants. The barrier enhancement dopants are selected from Ti, Hf, Zr, their oxides, or a combination thereof.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: August 23, 2005
    Assignees: Infineon Technologies Aktiengesellschaft, Kabushiki Kaisha Toshiba
    Inventors: Karl Hornik, Koji Yamakawa, Hiroshi Itokawa
  • Patent number: 6933547
    Abstract: A memory cell circuit for modification of a default register value in an integrated circuit chip, which includes a plurality of metal layers and first and second supply potentials. The circuit comprises a memory cell, a register and a control circuit. The memory cell has a first metal interconnect structure that traverses the plurality of metal layers using a first plurality of vias, wherein the first metal interconnect structure is coupled to one of the first and second supply potentials, a second metal interconnect structure that traverses the plurality of metal layers using a second plurality of vias, wherein the second metal interconnect structure is coupled to the other one of the first and second supply potentials, and an output, wherein a state of the output is programmable by altering any one of the plurality of metal layers or any one of a plurality of via layers. The register has a data input, a data output and control inputs. The control circuit is coupled to the control inputs of the register.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: August 23, 2005
    Assignee: Broadcom Corporation
    Inventors: Manolito M. Catalasan, Vafa J. Rakshani, Edmund H. Spittles, Tim Sippel, Richard Unda
  • Patent number: 6927089
    Abstract: A CMOS imager having multiple graded doped regions formed below respective pixel sensor cells is disclosed. A deep retrograde p-well is formed under a red pixel sensor cell of a semiconductor substrate to increase the red response. A shallow p-well is formed under the blue pixel sensor cell to decrease the red and green responses, while a shallow retrograde p-well is formed below the green pixel sensor cell to increase the green response and decrease the red response.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: August 9, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 6924518
    Abstract: There is disclosed is a semiconductor device which comprises a semiconductor substrate, isolation regions formed within the semiconductor substrate to define the active region, a pair of impurity diffusion regions formed within the element region in a manner to have surfaces elevated from the isolation region, a SiGe film formed on an upper surface of the impurity diffusion region so as to cover partly the side surface of the impurity diffusion region, a Ge concentration in the SiGe film being higher at a lower surface of the SiGe film than at an upper surface of the SiGe film, a metal silicide layer formed on the SiGe film, and a gate electrode formed in the active region of the semiconductor substrate with a gate insulating film interposed therebetween and having a sidewall insulating film formed on the side surface.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiko Iinuma, Ichiro Mizushima, Mitsuaki Izuha, Kiyotaka Miyano, Kyoichi Suguro
  • Patent number: 6924510
    Abstract: A light-emitting device and optical communication system based on the light-emitting device is disclosed. The light-emitting device is formed in a float-zone substrate. The light-emitting device includes on the substrate lower surface a reflective layer and on the upper surface spaced apart doped regions. The portion of the upper surface between the doped regions is textured and optionally covered with an antireflection coating to enhance light emission. The light-emitting device can operate as a laser or as a light-emitting diode, depending on the reflectivities of the antireflection coating and the reflective layer.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: August 2, 2005
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Tanay Karnik, Jianping Xu, Shekhar Y. Borkar
  • Patent number: 6924504
    Abstract: An organic light emitting diode (OLED) includes a substrate having a first electrode layer formed thereon in a predetermined pattern, an insulator layer defining the upper portion of the substrate having the first electrode layer in a predetermined pattern, an organic polymer layer formed based on the pattern defined by the insulator layer, a barrier for blocking flow of the organic polymer layer at both ends of the pattern defined by the insulator layer, and a second electrode layer formed on the organic polymer layer.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: August 2, 2005
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Werner Humbs, Albrecht Uhlig, Marcus Schädig
  • Patent number: 6924513
    Abstract: A light emitting element includes: a light emitting layer; a rectangular first principal surface being parallel to the light emitting layer; a rectangular second principal surface opposing to the first principal surface so that the light emitting layer is sandwiched between the first and second principal surfaces; and first through fourth side surfaces of the light emitting element provided with a rough surface, the first through fourth side surfaces connecting between the first principal surface and the second principal surface, respectively so as to define a solid shape.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Shoichi Washizuka, Yoshiyuki Kinugawa
  • Patent number: 6924509
    Abstract: Monoatomic and monocrystalline layer of large size, in diamond type carbon, and method for the manufacture of this layer. According to the invention, a monocrystalline substrate (2) is formed in SiC terminated by an atomic plane of carbon according to a reconstruction c(2×2) and at least one annealing is carried out, capable of transforming this atomic plane, which is a plane of dimers C?C (4) of sp configuration, into a plane of dimers C—C (8) of sp3 configuration. Application to microelectronics, optics, optoelectronics, micromechanics and biomaterials.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: August 2, 2005
    Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche Scientifique
    Inventors: Vincent Derycke, Gérald Dujardin, Andrew Mayne, Patrick Soukiassian
  • Patent number: 6924514
    Abstract: The light-emitting device includes a light-emitting element chip; a package having a first recessed portion thereon, in which the light-emitting chip is disposed; a transparent flexible member covering at least the recessed portion; and a transparent rigid member disposed on or above the transparent flexible member. The package has at least a first front surface extending at least outwardly above the first recessed portion; a second front surface extending outwardly above the first front surface; and a third surface as the outside of the package extending outwardly above the second front surface. The rigid member is disposed in the outline of the second front surface with at least three points of contact. The flexible member is continuously provided along the first front surface, the second front surface and the back surface of the rigid member. This light-emitting device is capable of improved reliability without deteriorating its optical characteristics.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: August 2, 2005
    Assignee: Nichia Corporation
    Inventor: Ryoma Suenaga
  • Patent number: 6921926
    Abstract: Light emitting diode (LED) packages are made by first providing a platelike frame having a plurality of cells, each of which is composed of a main plate and a separate arm. Secondly, an LED die and a reflecting ring are respectively mounted on top of each main plate such that the die is located at a center of the reflecting ring. Then a conductive wire is connected between the top surface of the die and a top surface of the separate arm by wire bonding. A domed transparent encapsulant is then molded on each of the cells. The encapsulant encapsulates the die, the reflecting ring and the conductive wire and covers the main plate and the separate arm, and fills a space between the main plate and the separate arm to remain their spaced apart. Finally, the frame is cut according to the size of each cell to obtain the LED packages.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: July 26, 2005
    Assignees: Lingsen Precision Industries, Ltd., Cotco Holding Limited
    Inventor: Cheng-Hsiang Hsu
  • Patent number: 6921931
    Abstract: A the present invention provides an electrostatic discharge protection element to be used in a semiconductor integrated circuit providing MOSFET, comprising a thyristor and a trigger diode for triggering the thyristor into an ON-state, wherein the trigger diode provides an n-type cathode high concentration impurity region, a p-type anode high concentration impurity region and a gate formed between the two high concentration impurity regions, the gate being composed of the same material as that of a gate of MOSFET forming the semiconductor integrated circuit, and the thyristor provided with a p-type high concentration impurity region that forms a cathode and an n-type high concentration impurity region that forms an anode, and the p-type high concentration impurity region provides in a p well and connected to a resistor and/or the n-type high concentration impurity region provided in an n well and connected to a resistor.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: July 26, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kenichi Higashi, Alberto O. Adan
  • Patent number: 6921920
    Abstract: A solid-state light source includes a semiconductor light source for emitting light and an optical system having a fiber optic element. The fiber optic element has an input for receiving emitted light from the semiconductor light source. The fiber optic element also has an output for emitting light received from the solid-state light source. The semiconductor light source and the fiber optic element in aggregate form an illumination path.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: July 26, 2005
    Assignee: Smith & Nephew, Inc.
    Inventor: Yuri Kazakevich
  • Patent number: 6921915
    Abstract: An electroluminescence device having a layer containing a specific metal coordination compound is provided. The metal coordination compound is represented by formula (1) below: MLmL?n??(1), wherein M is a metal atom of Ir, Pt, Rh or Pd; L and L? are mutually different bidentate ligands; m is 1, 2 or 3 and n is 0, 1 or 2 with the proviso that m+n is 2 or 3; a partial structure MLm is represented by formula (2) shown below and a partial structure ML?n is represented by formula (3) or (4) shown below: ? at least one of the optional substituent(s) of the cyclic groups, and the cyclic groups CyC1 and CyC2 include an aromatic group capable of having a substituent represented by the following formula (5): ? The metal coordination compound having the aromatic group is effective in providing high-efficiency luminescence and long-term high luminance.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: July 26, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takao Takiguchi, Shinjiro Okada, Akira Tsuboyama, Seishi Miura, Takashi Moriyama, Jun Kamatani, Manabu Furugori
  • Patent number: 6911664
    Abstract: The present invention generally involves an extra-substrate control system comprising a first substrate, attached to which is at least one superconducting structure, and a second substrate, connected to which is at least one element of circuitry, wherein the superconducting structure and the circuitry interact, so that a change in a state of the superconducting structure can be detected by the circuitry. The present invention also provides a quantum computing apparatus comprising a first substrate, attached to which is one or more layers of material, at least one of which is a superconducting material, a second substrate, deposited on which is a flux shield and on the flux shield is at least one element of circuitry, wherein the superconducting material and the second substrate are separated by a mean distance that is small enough to permit coupling between the element of circuitry and the superconducting material.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: June 28, 2005
    Assignee: D-Wave Systems, Inc.
    Inventors: Evgeni Il'ichev, Miles F. H. Steininger
  • Patent number: 6906352
    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The structure includes a first n-type cladding layer of AlxInyGa1?x?yN, where 0?x?1 and 0?y<1 and (x+y)?1; a second n-type cladding layer of AlxInyGa1?x?yN, where 0?x?1 and 0?y<1 and (x+y)?1, wherein the second n-type cladding layer is further characterized by the substantial absence of magnesium; an active portion between the first and second cladding layers in the form of a multiple quantum well having a plurality of InxGa1?xN well layers where 0<x<1 separated by a corresponding plurality of AlxInyGa1?x?yN barrier layers where 0?x?1 and 0?y?1; a p-type layer of a Group III nitride, wherein the second n-type cladding layer is positioned between the p-type layer and the multiple quantum well; and wherein the first and second n-type cladding layers have respective bandgaps that are each larger than the bandgap of the well layers.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: June 14, 2005
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Kathleen Marie Doverspike, Hua-Shuang Kong, Michael John Bergmann, David Todd Emerson
  • Patent number: 6900479
    Abstract: A method for controlling electric conduction on nanoscale wires is disclosed. The nanoscale wires are provided with controllable regions axially and/or radially distributed. Controlling those regions by means of microscale wires or additional nanoscale wires allows or prevents electric conduction on the controlled nanoscale wires. The controllable regions are of two different types. For example, a first type of controllable region can exhibit a different doping from a second type of controllable region. The method allows one or more of a set of nanoscale wires, packed at sublithographic pitch, to be independently selected.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: May 31, 2005
    Assignees: California Institute of Technology, Brown University, President and Fellows of Harvard College, SRI International
    Inventors: André DeHon, Charles M. Lieber, Patrick D. Lincoln, John E. Savage
  • Patent number: 6900496
    Abstract: A method of forming a capacitor includes, a) providing a node to which electrical connection to a first capacitor plate is to be made; b) then, providing a finned lower capacitor plate in ohmic electrical connection with the node using no more than one photomasking step; and c) providing a capacitor dielectric layer and a conductive second capacitor plate layer over the conductive layer.
    Type: Grant
    Filed: July 1, 1997
    Date of Patent: May 31, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Pierre C. Fazan
  • Patent number: 6900458
    Abstract: A device is provided. The device has a first electrode comprising a reflective material, and a second electrode disposed over the first electrode, the second electrode comprising a transmissive material. An organic layer including an emissive material is disposed between the first electrode and the second electrode. A light modulating element is disposed over the second electrode. In one embodiment, the first electrode is the only significantly reflective layer in the device. In another embodiment, the first and second electrodes and the organic layer are fabricated over the light modulating element, and the second electrode is reflective, not the first electrode. Color filters may be used to achieve a full-color display. Organic light emitting devices may be used that emit a broad spectra of light, such as white light. Organic light emitting devices that emit a single color of light may be used. Different organic light emitting devices that emit different spectra of light may be used.
    Type: Grant
    Filed: February 21, 2003
    Date of Patent: May 31, 2005
    Assignee: Universal Display Corporation
    Inventors: Yeh-Jiun Tung, Min-Hao Michael Lu, Vladimir Bulovic
  • Patent number: 6897520
    Abstract: A nonvolative memory in the form of a flash EEPROM with high density and low cost. A vertical MOS transistor is formed in well etched into a semiconductor substrate, the substrate having a buried layer of doped material of a first conductivity type acting as the channel region. Source and drain regions of this transistor comprise second conductivity type layers doped in the substrate above and below the buried layer. A thin gate oxide or oxide-nitride-oxide (ONO) layer is formed in the well and a floating gate of polysilicon is formed over the gate oxide. A layer of oxide or ONO is formed over the floating gate, and a second polysilicon or metal layer is used to fill the well to form the control gate and word line. A bit line is formed of a layer of metal or polysilicon deposited over an insulating layer on top of the word line and makes contact with the drain of the vertical MOS transistor through a contact window formed adjacent the well.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: May 24, 2005
    Inventor: Madhukar B. Vora
  • Patent number: 6890781
    Abstract: A transparent layer of a LED device and the method for growing the same are disclosed in this present invention. This present invention provides an improved liquid phase epitaxy (LPE) process for growing a transparent layer of a LED device. In the above-mentioned LPE process, an improved supersaturated solution is utilized to overcome the shortcomings in the prior art, wherein the supersaturated solution comprises antimony and/or indium as a solvent. Furthermore, a metallic zinc and/or magnesium dopant is added into the supersaturated solution to optimize the characters of the transparent layer. Therefore, this invention can provide a more efficient method for growing a transparent layer of a LED device, and the quality of the above-mentioned transparent layer can thereby be improved.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: May 10, 2005
    Assignee: Uni Light Technology Inc.
    Inventors: Liann-Be Chang, Li-Hsin Kuo, Li-Zen Hsieh, Li-Yuan Chang