Abstract: A superconducting structure that can operate, for example, as a qubit or a superconducting switch is presented. The structure includes a loop formed from two parts. A first part includes two superconducting materials separated by a junction. The junction can, for example, be a 45° grain boundary junction. The second part can couple the two superconducting materials across the junction. The second part includes a superconducting material coupled to each of the two superconducting materials of the first part through c-axis junctions. Further embodiments of the invention can be as a coherent unconventional superconducting switch, or a variable phase shift unconventional superconductor junction device.

Abstract: A method of making dielectrically isolated solid state device comprising state device (including integrated circuits) comprises providing a silicon wafer having a PN junction or other electronic rectifying barrier contained therein and thermally growing or ion-implanting selected ions to an oxide or nitride isolating groove in-situ to isolate it into a plurality of physically integral pockets for use as electrically separately operable components. The groove has a symmetrical, centrally rounded bottom which is located within a few microns below the PN junction or rectifying barrier. Through the unique oxide/nitride forming conditions and through curvature, symmetry, and proximity effects, novel passivation and isolation results obtain.

Abstract: The present invention provides a planar polymer memory device that can operate as a non-volatile memory device. A planar polymer memory device can be formed with two or more electrodes and an electrode extension associated with one electrode, wherein a selectively conductive medium and dielectric separate the electrodes. The method for forming a planar polymer memory device comprises at least one of forming a first electrode with an associated plug, forming a second electrode, forming a passive layer over the extension, depositing an organic polymer and patterning the organic polymer. The method affords integration of a planar polymer memory device into a semiconductor fabrication process. A thin film diode (TFD) can further be employed with a planar polymer memory device to facilitate programming. The TFD can be formed between the first electrode and the selectively conductive medium or the second electrode and the selectively conductive medium.

Abstract: A bipolar transistor having a collector connected to a base, the collector including an amount of carbon sufficient to prevent a conduction band barrier at a base-collector junction.

Abstract: A method of fabricating a chalcogenide random access memory (CRAM) is provided. The method is to provide a substrate having a bottom electrode thereon and then form a chalcogenide film and a patterned mask corresponding to the bottom electrode sequentially over the substrate. Thereafter, using the patterned mask, an ion implantation is performed to convert a portion of the chalcogenide film into a modified region while the chalcogenide film underneath the patterned mask is prevented from receiving any dopants and hence is kept as a non-modified region. The modified region has a lower conductivity than the non-modified region. After that, the patterned mask is removed and then a top electrode is formed over the non-modified region. Utilizing the ion implantation as a modifying treatment, the contact area between the chalcogenide film and the bottom electrode is decreased and the operating current of the CRAM is reduced.

Abstract: Disclosed herein is a light emitting diode (LED) device. The light emitting diode device comprises a package formed with a terminal for applying an electrical signal, one or more LED chips mounted on the package such that the LED chips are electrically connected to the terminal, a lens formed to surround the LED chips on the package for changing path of light emitted from the LED chips to the horizontal direction with the difference of the refraction rates of the media, and a reflector formed on the lens for reflecting the light, emitted above the lens without being refracted in the horizontal direction at the lens, to the horizontal direction. The LED device reflects the light, which is deviated from the optical design range of the lens and emitted above the lens, back to the lens, thereby preventing the hot spot from being generated, and enhancing horizontal emission efficiency of the light.

Abstract: A switching device to be reversibly switched between an electrically isolating off-state and an electrically conducting on-state for use in, e.g., a reconfigurable interconnect. The device includes two separate electrodes, one of which being a reactive metal electrode and the other one being an inert electrode, and a solid state electrolyte arranged between the electrodes and being capable of electrically isolating the electrodes to define the off-state. The reactive metal electrode and the solid state electrolyte also being capable of forming a redox-system having a minimum voltage (turn-on voltage) to start a redox-reaction, which results in generating metal ions that are released into the solid state electrolyte. The metal ions are reduced to increase a metal concentration within the solid state electrolyte, wherein an increase of the metal concentration results in a conductive metallic connection bridging the electrodes to define the on-state.

Abstract: A diffusion layer 3a of a silicon substrate, a polycrystalline silicon material 10, or a gate electrode 12 is connected to a conductive film 8 through a titanium silicide film 6 within a contact hole 5 provided in an insulating film 4. The titanium silicide film 6 is formed by the silicide reaction between a titanium film 7 and the silicon. The upper limit of the thickness of the titanium silicide film 6, and the upper limit of the titanium film 7 are specified by the internal stress within the conductive film 8.

Abstract: A semiconductor device and method for forming the same includes a silicon (111) single crystal substrate, and an epitaxial boron phosphide (BP) layer disposed on the substrate. A group III-nitride semiconductor epitaxial layer is disposed on the BP epitaxial layer.

Abstract: A parallel processor including two processor element groups each configured to simultaneously execute arithmetic operations for states of all logical values expressable by N bits (N is a natural number) and retain results of the arithmetic operation to execute an arithmetic operation equivalent to N qubits; and an exchange unit for data exchange between the two processor element groups. The two processor element groups are each configured to execute an arithmetic operation equivalent to N qubits are connected to each other via the exchange unit to constitute a processor element group configured to execute an arithmetic operation equivalent to (N+1) qubits with 1 qubit extension, and consequently, it becomes possible to execute a large-scale arithmetic operation at high speed without any increase in the time and effort required for designing an integrated circuit for executing the large-scale arithmetic operation.

Abstract: Even where an I/O cell requiring good characteristics is alloted to an I/O slot corresponding to the uppermost standard pattern wiring, a pad can be connected to the I/O slot by forming rewiring in the chip outermost peripheral area.

Abstract: A strained crystalline layer having a tensilely strained SiGe portion and a compressively strained SiGe portion is disclosed. The strained crystalline layer is epitaxially bonded, or grown, on top of a SiGe relaxed buffer layer, in a way that the tensilely strained SiGe has a Ge concentration below that of the SiGe relaxed buffer, and the compressively strained SiGe has a Ge concentration above that of the SiGe relaxed buffer. The strained crystalline layer and the relaxed buffer can reside on top a semi-insulator substrate or on top of an insulating divider layer. In some embodiments the tensile SiGe layer is pure Si, and the compressive SiGe layer is pure Ge. The tensilely strained SiGe layer is suited for hosting electron conduction type devices and the compressively strained SiGe is suited for hosting hole conduction type devices. The strained crystalline layer is capable to seed an epitaxial insulator, or a compound semiconductor layer.

Abstract: A light-emitting device, which has a structure that improves an opening ratio and light extraction efficiency, can solve a problem of an etching residue occurred during forming the device itself, and reduce deterioration due to poor coverage and short-circuiting to improve greatly the reliability, and a method for manufacturing the light-emitting device. In the light-emitting device having a structure that improves light extraction efficiency, a material used for forming a first electrode is Ti/TiN/Al (or Al—Ti)/Ti (or TiN).

Abstract: A light emitting diode is provided having a Group III nitride based superlattice and a Group III nitride based active region on the superlattice. The active region has at least one quantum well structure. The quantum well structure includes a first Group III nitride based barrier layer, a Group III nitride based quantum well layer on the first barrier layer and a second Group III nitride based barrier layer. A Group III nitride based semiconductor device and methods of fabricating a Group III nitride based semiconductor device having an active region comprising at least one quantum well structure are provided. The quantum well structure includes a well support layer comprising a Group III nitride, a quantum well layer comprising a Group III nitride on the well support layer and a cap layer comprising a Group III nitride on the quantum well layer.

Abstract: The invention provides an organic EL (electroluminescence) light emitting device that includes a plane emission-type first organic EL light emitter, and a side emission-type second organic EL light emitter. The first organic EL light emitter includes a glass substrate, and an ITO film, an organic layer, a cathode layer, and a sealing substrate, which are laminated on the back of the glass substrate. The second organic EL light emitter includes a glass substrate, and an ITO film, a luminescent layer, a cathode layer, and a sealing substrate, which are laminated on either of the front and back sides of the glass substrate. The outer surface of the second organic EL light emitter is covered with a high-reflectance mirror except a portion of the side of the glass substrate. An aperture of the second organic EL light emitter is disposed opposite to the side of the glass substrate of the first organic EL light emitter.

Abstract: Silver electrode metallization in light emitting devices is subject to electrochemical migration in the presence of moisture and an electric field. Electrochemical migration of the silver metallization to the pn junction of the device results in an alternate shunt path across the junction, which degrades efficiency of the device. In accordance with a form of this invention, a migration barrier is provided for preventing migration of metal from at least one of the electrodes onto the surface of the semiconductor layer with which the electrode is in contact.

Abstract: Grooves in a desired circuit configuration are formed in the surface of a substrate to pre-pattern the area to receive material forming an organic thin film transistor (OTFT) structure and interconnecting conductive paths. The OTFT material is deposited in the pre-patterned area using printing techniques such as ink jet printing. In one embodiment, the grooves are formed in the surface substrate during the injection molding process of the substrate. Inter-exchangeable device covers carry different substrates to provide different functionalities of an electronic device with which the covers are used.

Abstract: A method for quantum computing with a quantum system comprising a first energy level, a second energy level, and a third energy level. The first energy level and said second energy level are capable of being degenerate with respect to each other. In the method a signal is applied to the quantum system. The signal has an alternating amplitude at an associated frequency such that (i) the frequency of the signal correlates with an energy level separation between the first energy level and the third energy level or (ii) the frequency of the signal correlates with an energy level separation between the second energy level and the third energy level. The signal induces an oscillation in the state of the quantum system between the first energy level and the second energy level.

Abstract: A varactor is provided. The varactor includes a second type substrate, two gate structures, a first type doped region and a second type doped region. The two gate structures are disposed over the substrate, and each of the gate structures includes an inter-gate dielectric layer and a gate conductive layer. The first type doped region is disposed in the substrate between the two gate structures. The second type doped region is disposed in the substrate at a side of the two gate structures apart from the first type doped region. The first type doped region is electrically connected to a first electrode, and second type doped region is electrically connected to a second electrode, and the two gate structures are electrically connected to the first electrode or the second electrode.

Abstract: A control system for an array of qubits is disclosed. The control system according to the present invention provides currents and voltages to qubits in the array of qubits in order to perform functions on the qubit. The functions that the control system can perform include read out, initialization, and entanglement. The state of a qubit can be determined by grounding the qubit, applying a current across the qubit, measuring the resulting potential drop across the qubit, and interpreting the potential drop as a state of the qubit. A qubit can be initialized by grounding the qubit and applying a current across the qubit in a selected direction for a time sufficient that the quantum state of the qubit can relax into the selected state. In some embodiments, the qubit can be initialized by grounding the qubit and applying a current across the qubit in a selected direction and then ramping the current to zero in order that the state of the qubit relaxes into the selected state.