Abstract: An organic adhesive light-emitting device with a vertical structure is provided. The organic adhesive light-emitting device comprises a conductive substrate with a concavo-convex upper surface; a first metal layer formed on the concavo-convex upper surface of the conductive substrate; an organic adhesive material formed over the first metal layer; a second metal layer formed over the organic adhesive material, wherein all or part of the first metal layer over the concavo-convex upper surface is in ohmic contact with the second metal layer through the organic adhesive material; a reflective layer formed over the second metal layer; and a light-emitting stack layer formed over the second metal layer. The process for manufacturing the present invention organic adhesive light-emitting device is less complex than that for manufacturing prior art diodes.

Abstract: A Hall element is provided with a segmented field plate. Dynamic bias control is applied to the segments of the field plate. In one embodiment, a feedback signal is derived from an amplified output of the Hall element. The feedback signal is applied to the segments of the field plate in order to control sheet conductivity in specific localized areas. In one embodiment, a metal field plate is split into four segments along lines between bias and sense contacts of the Hall element. Opposing diagonal segments are electrically connected.

Abstract: A semiconductor wafer includes (a) a first principal side and a second principal side opposite to each other, (b) a first bevel contour and a second bevel contour provided at an outer periphery of the first principal side and the second principal side, (c) a first recess formed in the first bevel contour, and (d) a first type of ID mark configured by a protruding dot provided on a bottom face of the first recess.

Abstract: For a light emitting device using gallium nitride (GaN), on a substrate are sequentially formed a GaN-based layer, an AlGaN-based layer, and a light emitting layer. To prevent cracks in the AGaN-based layer, the AlGaN-based layer is formed before planarization of the surface of the GaN layer on a surface of the GaN layer which is not planar. For a laser, the AlGaN-based layers serve as clad layers which sandwich the light emitting layer.

Abstract: In synchronous communication in a client-server-distributed data system, the turnaround time from when a client calls a server function until the client receives a notification of completion of the server function is reduced. A server includes a pre-processing registration section for registering pre-processing; a post-processing registration section for registering post-processing; a server command section for requesting to register the pre-processing and the post-processing; and a server function correspondence section for establishing correspondence between the pre-processing and the post-processing with a server function identifier. When the server receives a request message from a client to call a server function, the server execute pre-processing and sends a completion message including the execution result of the pre-processing to the client. After sending the completion message, the server executes post-processing.

Abstract: The present invention provides a method for forming quantum tunneling devices comprising the steps of: (1) providing a quantum well, the quantum well comprising a composite material, the composite material comprising at least a first and a second material; and (2) processing the quantum well so as to form at least one segregated quantum tunneling structure encased within a shell comprised of a material arising from processing the composite material, wherein each segregated quantum structure is substantially comprised of the first material. The present invention also comprises additional methods of formation, quantum tunneling devices, said electronic devices.

Abstract: A solid-state imaging device is provided, which comprising at least one unit pixel portion. Each of the at least one unit pixel portion comprises a light receiving portion for subjecting incident light to photoelectric conversion to output electric charges, and an optical signal detecting portion comprising a first conductivity type buried region for accumulating the output electric charges. The light receiving portion comprises at least a portion of a second conductivity type impurity diffusion region, and at least a portion of a first conductivity type well region provided between a second conductivity type well region and the second conductivity type impurity diffusion region. The second conductivity type well region and the second conductivity type impurity diffusion region are separated from each other.

Abstract: A diode which eliminates generation of local avalanche breakdown phenomenon when static surges in the backward direction are applied and withstands electrostatic breakdown. A P-type impurity diffused region of high concentration as an anode and an N-type impurity diffused region of high concentration as a cathode that surrounds the P-type impurity diffused region, are formed on the surface of an N-type silicon well region. The surface of the N-type silicon well region on which the impurity diffused regions are formed is covered with an interlayer dielectric, and a metal interconnect layer is formed thereon, to spread to the border line of the N-type impurity diffused region and is electrically connected to the P-type impurity diffused region. Accordingly, a P-type inversion layer IP is uniformly formed in a separation area between the impurity diffused regions when static surges in the backward direction are applied, preventing local avalanche breakdown.

Abstract: A method for manufacturing a semiconductor chip with bumps comprises providing a semiconductor chip, which defines an active surface and a back surface and has a plurality of pads disposed on the active surface, and a plurality of preformed solder balls. A passivation is disposed on the active surface of the semiconductor chip with the pads exposed. A plurality of UBMs (Under Bump Metallurgy) are disposed on the pads and define a plurality of bump pads. The diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls. The preformed solder balls are placed on the bump pads and then reflowed to form a plurality of bumps on the semiconductor chip.

Abstract: A photonic crystal structure is formed in an n-type layer of a III-nitride light emitting device. In some embodiments, the photonic crystal n-type layer is formed on a tunnel junction. The device includes a first layer of first conductivity type, a first layer of second conductivity type, and an active region separating the first layer of first conductivity type from the first layer of second conductivity type. The tunnel junction includes a second layer of first conductivity type and a second layer of second conductivity type and separates the first layer of first conductivity type from a third layer of first conductivity type. A photonic crystal structure is formed in the third layer of first conductivity type.

Abstract: A light-emitting thyristor having an improved luminous efficiency is provided. According to the light-emitting thyristor, a p-type AlGaAs layer and an n-type AlGaAs layer are alternately stacked to form a pnpn structure on a GaAs buffer layer formed on a GaAs substrate, and Al composition of the AlGaAs layer just above the GaAs buffer layer is increased in steps or continuously.

Abstract: A single molecular species having a low-forward-voltage rectifying property is provided. The molecular species is represented by the formula: CL-IL-A-IR-CR where A is a “conducting” moiety (with a relatively narrow HOMO-LUMO gap), IL and IR are each an “insulating” moiety (with a relatively wide HOMO-LUMO gap), CL is a connecting group for attachment to a first electrode, and CR is a connecting group for attachment to a second electrode. Also, a low-forward-voltage rectifying molecular rectifier is provided, comprising the molecular species attached between the two electrodes. The present teachings provide a set of design rules to build single-molecule rectifying diodes that operate at low forward and large reverse voltages. Such single-molecule rectifying diodes are useful in a variety of nano-scale applications.

Abstract: A field-effect transistor includes a semiconductor substrate, a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a channel region formed in the semiconductor substrate, wherein the source region is connected to a source terminal electrode and the drain region is connected to a drain terminal electrode, wherein the channel region comprises a first narrow width channel region and a second narrow width channel region connected in parallel regarding the source terminal electrode and the drain terminal electrode, and wherein the first narrow width channel region and/or the second narrow width channel region comprise lateral edges narrowing the width of the narrow width channel region is such a way that a channel formation in the narrow width channel region is influenced by a mutually influencing effect of the lateral edges, and a gate electrode arranged above the first and second narrow width channel regions.

Abstract: A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO2, Si3N4, Al2O3, Y2O3, Ta2O5, TiO2, HfO2, Pr2O3, ZrO2, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.

Abstract: A semiconductor integrated circuit device (10) is composed of an LSI function unit (11) and a shield wiring layer (22) formed on the unit. The LSI function unit (11) includes a semiconductor substrate (12) and a first insulating film (13), and the semiconductor substrate (12) is formed with a circuit element including, for example, a MOS transistor (14). The shield wiring layer (22) is composed of a lower shield line (23), a third insulating film (24), an upper shield line (25), and a fourth insulating film (26) sequentially stacked above a second insulating film (17). The directions in which the lower and upper shield lines (23) and (25) are arranged intersect each other.

Abstract: An electronic device includes a substrate, a structure having openings, and a first electrode overlying the structure and lying within the openings. From a cross-sectional view, the structure, at the openings, has a negative slope. From a plan view, each opening has a perimeter that may or may not substantially correspond to a perimeter of an organic electronic component. The portions of the first electrode overlying the structure and lying within the openings are connected to each other. In a process for forming the electronic device, an organic active layer may be deposited within the opening, wherein the organic active layer has a liquid composition.

Abstract: An organic semiconductor device includes an organic semiconductor layer with carrier mobility which is deposited between a pair of electrodes facing each other. At least one of the electrodes includes a carrier relay layer which is in contact with the organic semiconductor layer and has a work function close or equal to an ionized potential of the organic semiconductor layer, and a conductive layer which is formed on the carrier relay layer and has lower resistivity than the carrier relay layer.

Abstract: Semiconductor devices and fabrication methods are presented, in which a hydrogen barrier is provided above a ferroelectric capacitor to prevent degradation of the ferroelectric material during back-end manufacturing processes employing hydrogen. The hydrogen barrier comprises silicon rich silicon oxide or amorphous silicon, which can be used in combination with an aluminum oxide layer to inhibit diffusion of process-related hydrogen into the ferroelectric capacitor layer.

Abstract: A silicon nanoparticle transistor and transistor memory device. The transistor of the invention has silicon nanoparticles, dimensioned on the order of 1 nm, in a gate area of a field effect transistor. The resulting transistor is a transistor in which single electron flow controls operation of the transistor. Room temperature operation is possible with the novel transistor structure by radiation assistance, with radiation being directed toward the silicon nanoparticles to create necessary holes in the quantum structure for the flow of an electron. The transistor of the invention also forms the basis for a memory device. The device is a flash memory device which will store electrical charge instead of magnetic effects.

Abstract: A qubit (quantum bit) circuit includes a superconducting main loop that is electrically-completed by a serially-interconnected superconducting subloop. The subloop includes two Josephson junctions. A first coil provides a first flux that couples with the main loop but not with the subloop. A second coil provides a second flux that couples with the subloop but not with the main loop.