Abstract: Silicon-controlled rectifiers, electrostatic discharge circuits, and methods of fabricating a silicon-controlled rectifier for use in an electrostatic discharge circuit. A device structure for the silicon controlled rectifier includes a first well of a first conductivity type in a semiconductor layer, a second well of a second conductivity type in the semiconductor layer, a cathode coupled with the first well, and an anode coupled with the second well. First and second body contacts are coupled with the first well, and the first and second body contacts each have the first conductivity type. A triggering device may be coupled with the first body contact.

Abstract: A light-emitting device includes: a light-emitting layer; a first layer located on a light-emitting side of the light-emitting layer; and a second layer located on a light-emitting side of the first layer, and in contact with the first layer. A concavo-convex structure composed of a plurality of convex portions having two or more steps is formed at a boundary between the first layer and the second layer, a refractive index of the first layer is higher than a refractive index of the second layer, and a concavo-convex pattern of the concavo-convex structure is a pattern formed by a space-filling curve or a fractal tiling pattern.

Abstract: Embodiments of the invention are directed to methods of forming a FinFET. A non-limiting example method includes forming a fin across from a major surface of a substrate. A dummy gate is formed around a channel region of the fin. A source region or a drain region is formed on the fin, and the dummy gate is replaced with a metal gate structure. Subsequent to replacing the dummy gate with the metal gate structure, dopants are inserted into the source region or the drain region.

Abstract: An optical sensor package module and a manufacturing method thereof are provided. The optical sensor package module includes a substrate, a sensor chip and a shielding assembly. The sensor chip is disposed on the substrate and includes an array of pixels located at a top side thereof for receiving light. The shielding assembly surrounds the sensor chip for limiting influx of light onto the sensor chip, and the shielding assembly has a first aperture to expose at least a first subset of the pixels that is configured to receive corresponding light.

Abstract: An image sensor includes a substrate including a plurality of pixel regions and one or more pairs of dummy pixel regions; a pixel separation structure between two adjacent pixel regions among the plurality of pixel regions and including a first conductive layer; a dummy pixel separation structure between the one or more pairs of dummy pixel regions, electrically connected to the pixel separation structure, and including a second conductive layer; and a pixel separation contact disposed on the dummy pixel separation structure.

Abstract: In a general aspect, a device can include a substrate, a first pillar of a first conductivity type, a second pillar of a second conductivity type, the first pillar and the second pillar being alternately disposed, and a metal layer having a first portion disposed on the first pillar and a second portion disposed on the second pillar. The first portion of the metal layer can be wider than the second portion of the metal layer.

Abstract: The present application discloses a light-emitting array, comprising a first light-emitting chip; a second light-emitting chip; and a conductive line electrically connected to the first light-emitting chip and the second light-emitting chip, wherein the conductive line includes a first segment and a second segment having a radius curvature different from that of the first segment.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate including a trench. The semiconductor device further includes a gate electrode disposed in the trench, and a gate insulating film disposed between the substrate and the gate electrode. The gate electrode includes a gate conductor and a metal element, and an effective work function of the gate electrode is less than an effective work function of the gate conductor.

Abstract: An organic electroluminescent device having low driving voltage, high luminous efficiency, and a long lifetime is provided by combining various materials for an organic electroluminescent device. In the organic electroluminescent device having at least an anode, a hole injection layer, a first hole transport layer, a second hole transport layer, a light emitting layer, an electron transport layer, and a cathode in this order, the hole injection layer includes an arylamine compound of the following general formula (1) and an electron acceptor. In the formula, Ar1 to Ar4 may be the same or different, and represent a substituted or unsubstituted aromatic hydrocarbon group, a substituted or unsubstituted aromatic heterocyclic group, or a substituted or unsubstituted condensed polycyclic aromatic group.

Abstract: A semiconductor device includes first fin-shaped structures and second fin-shaped structures, which are separately disposed on a semiconductor substrate. Each of the first and second fin-shaped structures includes a base portion and a top portion protruding from the top portion. The base portions of the second fin-shaped structures are wider than the top portions of the second fin-shaped structures, and the top portions of the second fin-shaped structures are as wide as the top portions of the first fin-shaped structures. Each second fin-shaped structure further includes a recessed region on its sidewall.

Abstract: A method includes forming a metal hard mask over a low-k dielectric layer. The step of forming the metal hard mask includes depositing a sub-layer of the metal hard mask, and performing a plasma treatment on the sub-layer of the metal hard mask. The metal hard mask is patterned to form an opening. The low-k dielectric layer is etched to form a trench, wherein the step of etching is performed using the metal hard mask as an etching mask.

Abstract: A semiconductor device includes a substrate having an insulating surface; a circuit including a transistor provided on the insulating surface and including a semiconductor layer, an insulating layer and a conductive layer; and a line provided on the insulating surface, the line extending in a first direction. The line includes a core containing a resin material and a conductive portion covering the core as seen in a cross-sectional view taken along a second direction crossing the first direction.

Abstract: An image sensor is provided. The image sensor may include a photodiode formed in a substrate; a light refraction pattern formed on the photodiode; a color filter covering the light refraction pattern; and a micro-lens formed on the color filter.

Abstract: A semiconductor device includes a semiconductor substrate comprising a main surface and a gate electrode in a trench between neighboring semiconductor mesas. The gate electrode is electrically insulated from the neighboring semiconductor mesas by a dielectric layer. The semiconductor device further includes a conductor arranged, at least partially, between neighboring dielectric contact spacers. The conductor has a conductivity greater than a conductivity of the gate electrode. An interface between the conductor and the gate electrode extends along the gate electrode.

Abstract: According to one embodiment, a semiconductor package includes a substrate with first and second pad, first semiconductor chip above the substrate, first wire, first mold member, second semiconductor chip above the first mold member, third semiconductor chip above the second semiconductor chip, second wire, and a second mold member. The first wire electrically connects the first pad and the first semiconductor chip. The first mold member seals the first wire and the first semiconductor chip. The second wire electrically connects the second pad and the second semiconductor chip. The second mold member seals the second wire, the second and the third semiconductor chips, and the first mold member.

Abstract: Methods are directed to forming an electronic semiconductor device that includes a body having a first side and a second side opposite to one another and including a first structural region facing the second side, and a second structural region extending over the first structural region and facing the first side. A body region extends in the second structural region at the first side. A source region extends inside the body region and a lightly-doped drain region faces the first side of the body. A gate electrode is formed over the body region. A trench dielectric region extends through the second structural region in a first trench conductive region immediately adjacent to the trench dielectric region. A second trench conductive region is in electrical contact with the body region and source region. An electrical contact on the body is in electrical contact with the drain region through the first structural region.

Abstract: One embodiment provides a device, including: a composite image sensor, including: a wiring layer that processes electrical signals; a first photodiode layer configured to convert a first light wave signal into an electrical signal; and a second photodiode layer configured to convert a second light wave signal into an electrical signal; wherein the first photodiode layer and the second photodiode layer are separated by a predetermined distance. Other aspects are described and claimed.

Abstract: A design method for an image sensor device includes providing an initial design for an image sensor device. The initial design includes a pixel array region and a through-via region disposed proximate the pixel array region. The initial design has a first length between the pixel array region and the through-via region. The initial design has a second length that is a width of the through-via region. The design method includes analyzing a ratio of the second length and the first length, and modifying the initial design to achieve a ratio of the second length and the first length within a particular range.

Abstract: A single crystal semiconductor handle substrate for use in the manufacture of semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure is etched to form a porous layer in the front surface region of the wafer. The etched region is oxidized and then filled with a semiconductor material, which may be polycrystalline or amorphous. The surface is polished to render it bondable to a semiconductor donor substrate. Layer transfer is performed over the polished surface thus creating semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure having 4 layers: the handle substrate, the composite layer comprising filled pores, a dielectric layer (e.g., buried oxide), and a device layer. The structure can be used as initial substrate in fabricating radiofrequency chips. The resulting chips have suppressed parasitic effects, particularly, no induced conductive channel below the buried oxide.

Abstract: A semiconductor device includes a substrate comprising a WELL region, a gate electrode comprising a gate length disposed on the WELL region, and first and second drift regions which overlap with the gate electrode. The first and second draft regions may overlap with the gate electrode at an overlapping length which is a percentage of the gate length.