Abstract: A programmable analog to digital (A/D) converter useful for example, in ultrasonic medical diagnosis systems, for providing transfer functions that in some arrangements may be manually selected and in other arrangements may be automatically selected as a function of time. A ladder network providing the comparator reference voltages in the converter is driven at a plurality of control nodes or points by programmed control voltage sets received from, for example, a resistive network or from a digital source through a digital to analog converter. In the arrangement in which the transfer function changes as a function of time, different transfer curves are selected having a predetermined relationship to the amplitude levels of the input signal which, for example, may be an ultrasonic return signal in a medical diagnosis system.

Abstract: An analog-to-digital converter includes a first comparator which receives an analog input. The first comparator generates a plurality of reference voltages which establish a first continuous range of voltage gaps. The first comparator has a plurality of quantizing outputs, one of which will be at a logical one and the rest of which will be at logical zeros in order to indicate which of the voltage gaps encompasses the analog input voltage. The first comparator also has a reference current output whose magnitude is representative of which voltage gap encompasses the analog input voltage. A first encoder receives the quantizing outputs of the first comparator and generates a binary number which represents which of the voltage gaps the analog input voltage is encompassed by and which constitutes the most significant bit group of the binary digital representation of the analog input voltage. A voltage subtractor circuit receives as inputs the reference current output of the first comparator and the analog input.

Abstract: An analog-to-digital converter includes a first and a second comparator each of which receives an analog input. The first comparator generates a plurality of reference voltages which establish a first continuous range of voltage gaps. The first comparator has a plurality of quantizing outputs, one of which will be at a logical one and the rest of which will be at logical zeros in order to indicate which of the voltage gaps encompasses the analog input voltage. The first comparator also has first and second reference current outputs whose magnitudes are representative of which voltage gap encompasses the analog input voltage and a third reference current output whose magnitude is representative of the voltage gap width.

Abstract: A converter for converting a high frequency video input signal to a digital signal by detecting the peak voltages of the input signal. A video input signal fans out to a plurality of comparators of which each are connected to a resistive ladder of equal resistors values. One end of the resistive ladder is connected with a positive reference voltage and the other end is connected with a negative reference voltage. Real time is divided into sampling bins determined by the cycle time of a clock and, within each bin, the digital output from a plurality of master-slave flip-flops shows the maximum level reached by the video input signal. The outputs from the flip-flops go to a pair of priority encoders and a multiplexer for indicating in digital form the highest point reached on the resistive ladder.

Abstract: Analog signals are converted into digital form in a reproducible, accurate and stable manner. The tri-dual phase technique involves the conversion of the condition to be measured, and typically represented by a voltage, first to a reference level and then to an unknown level in a dual phase conversion, and then solving for the unknown level once the relationship of the reference level, the unknown high input level, and the unknown low input levels are established. A circuit capable of carrying out the technique includes an integrator receiving voltage input signals from a switching device adapted to switch to three different input signals, including a high unknown signal level, a low unknown signal level, and a known signal reference level. The reference level is also fed into a comparator which receives the output of the integrator.

Abstract: A method and apparatus are provided for converting into digital form the analog ultrasonic echo signals received as a result of cyclically transmitted ultrasonic search signals intercepting an acoustic discontinuity in a workpiece. The ultrasonic echo signals are divided into a discrete number of raster-like scan lines which are scanned electronically by a microprocessor. Digital signals are generated for each line of the raster-like scan and such signals assume either a first or second state along the scan line in accordance with the signal amplitude along that line. As successive scans are made at progressively higher amplitudes of the echo signal, the amplitude required for varying the digital signal between the states for a particular scan line is incrementally increased with each scan line. A comparator receives at a first input the echo signals and at a second input a signal from a digital-to-analog converter whose output is incrementally increased on successive scan lines by the microprocessor.

Abstract: A D-A converter for converting a digital signal to a duty factor of a pulse train signal and for averaging the pulse signal by a low-pass filter to convert it to an analog signal is disclosed. A plurality of pulses which are to be selected in accordance with the input digital signal comprise a plurality of basic pulses of different phases and pulse widths derived by frequency division and auxiliary basic pulses which occur at a cycle period which is at least twice as long as a repetition cycle period of the basic pulses. The basic pulses are selected by high order bits of the digital signal while the auxiliary basic pulses are selected by low order bits of the digital signal to produce an output pulse train signal a duty factor of which changes in accordance with the digital signal. The pulse train signal is then averaged to convert it to an analog signal.

Abstract: A digital-to-analog driver capable of driving a speaker or other voice coil means and implementable using field effect semiconductor devices is disclosed. A plurality of switching field effect semiconductive constant current sources each having a control electrode and two current carrying electrodes are coupled in parallel at the current carrying electrodes thereof. Each switching field effect constant current sources preferably includes a field effect load device and a field effect switching device, the aforementioned control electrode preferably being the gate of the switching device. The respective width to length ratios of the active areas under the gates of the devices differ by a factor of two from each other. Therefore, the width to length ratio of the gates of a third one of the souces is twice the width to length ratio of the gates of a second one of the sources and four times the width to length ratio of the gates of a first one of the sources, and so forth.

Abstract: Analog signal is translated to charges which concurrently are spilled down a plurality of charge coupled device (CCD) channels. The CCD storage electrodes of these channels define potential wells at least some of which are of different size and the number of wells in each channel which receive charge as it attempts to fill the successive wells in that channel with depend upon the analog signal amplitude and the respective sizes of said successive wells. The presence or absence of charge in one or more of the storage wells in each channel is sensed and employed in some cases for indicating the value of a bit of given significance, and in others for inhibiting or permitting the propagation of charge along a CCD channel employed to indicate the value of a bit of lower significance.

Abstract: Circuitry and method for adding, subtracting, multiplying and/or dividing a plurality of multi-bit, arbitrarily signed, changeable, coded digital input signals representing numerical values to convert said signals into a single analog output signal of predetermined amplitude having a fixed period but a duty cycle that is proportional to the algebraic sum or product or quotient of said input signals. This is accomplished using indirect digital-to-analog conversion.

Abstract: An angle encoder, for measuring the angular position of a shaft, comprises at least two code carriers having correlated code indicia thereon, the two code carriers being coupled to the shaft for concurrent movement therewith past a scanning unit, and being so arranged that the relative position of the two code carriers changes successively during successive revolutions of the shaft. The two code carriers can comprise endless code tapes having different lengths, or mesh-engaged code disks having different sizes.

Abstract: A charge redistribution circuit for pulse code modulation encoding suitable for use in apparatus for encoding voice in a companded code to maximize signal-to-noise performance. The companded code is the fifteen segment approximation of the .mu.255 compression law, wherein each segment contains 16 equal size steps. The circuit includes a single binary weighted capacitor array for the generation of both segment and step boundaries of voice being encoded. Each capacitor in the array has a pair of opposed plates, one plate of each capacitor being commonly coupled together. The circuit further includes a binary comparator having a first input adapted to be coupled to a reference bias potential and a second input coupled to the commonly coupled plates. First switching means connect and disconnect the commonly coupled plates to and from ground potential. Second switching means selectively connect a first common line to an input analog voice signal or to ground potential.

Abstract: A method is described for electrically converting an analog signal into a digital representation in a manner that maximizes noise rejection. The digital representation is formed from a preselected number of discrete points corresponding to sampled approximations of the analog signal. In establishing the magnitudes of the respective points, digital samples of the analog signal are taken at a predetermined number of discrete coordinates along the analog signal on either side of the respective discrete points. The predetermined number of coordinates are averaged and employed as corresponding approximations for the respective discrete points in the digital representative reproduction of the analog signal. The effects of harmonics of power line frequencies associated with processing electrical equipment are minimized by sampling the discrete coordinates for a particular point over an integral number of cycles of the power line frequency.

Abstract: A relatively high speed analog-to-digital converter is a charged coupled ice preferably formed as a metal-oxide semiconductor integrated circuit. It includes a pair of potential charge packet wells, an electrode gate to control the transfer of charge packets in a seesaw manner between the two wells, electrode gates to control the dissipation of charges from the wells to sinks, electrode gates to control the input of a charge representing an analog signal to one of the wells, electrode gates to control the detection of charge packets, a clock and a logic control to operate the electrode gates in a predetermined sequence.

Abstract: A digital rotary shaft position encoder includes a disk having a plurality of digitally encoded apertured tracks. The successive binary characters read from the tracks each have at least one 1 and comprise a repeating code having a different order of characters when read in one direction than when read in the other. The code is sensed to determine the direction of rotation of the shaft. The at least one 1 in each character is sensed to produce a clock pulse and these are counted to provide position information. The count is incremented or decremented in accordance with the direction information.

Abstract: A digital automatic gain control (AGC) circuit in a digital communication receiver generates a gain adjusted output signal (104) having nominally constant output power by controllably attenuating an input signal (101). Attenuation is accomplished by employing a coarse analog attenuator (106, 107) and a fine digital attenuator (108) under control of a digital control circuit (60). Attenuation adjustments to the analog attenuator (106, 107) alone perturb the gain adjusted output signal (104) causing processing errors in the digital receiver. The digital attenuator (108) is controllably adjusted, in a predetermined manner, to minimize the number of subsequent adjustments made to the analog attenuator (106, 107) following a first adjustment. Adjusting the digital attenuator to a prescribed intermediate attenuation setting (G.sub.O) between predetermined maximum and minimum attenuation settings (T.sub.HI,T.sub.

Abstract: A system for providing digital data representative of a selected analog signal on the data lines of a programmable controller using a central processing unit. The system employs a conversion circuit which converts the input analog signal to digital data on output data terminals upon receipt of a conversion signal simultaneously with an analog signal and which creates a completion signal when the conversion is completed. The system can use at least two analog inputs that receive at least two analog conditions and convert a selected one of the analog conditions to an analog signal. Upon actuation of one of the input modules, the selected analog signal of the selected module is directed to the conversion circuit. After conversion, the conversion completion signal of a conversion circuit then deactivates the actuated input module for the next conversion cycle.

Abstract: An equalizer bias signal removal system for adjusting an analog input signal toward being symmetrical about a reference signal level where said analog input signal, combined with a correction signal, is to be converted by an analog-to-digital converter and provided to a transversal filter equalizer.

Abstract: In a method for converting input analog signals to time signals and the time signals thus obtained to digital values, an arbitrary value is preset in a scaler as an offset prior to effecting a conversion and counting and the conversion and counting is effected by the time signals. A value the same as the preset value is digitally added, after the conversion and counting, to a counter in a direction in that the preset value is cancelled. The differential non-linearity is actually improved by varying the preset value every conversion and counting.

Abstract: A digital-to-analog converter consisting of capacitors for a weighted charge distribution corresponding to the digits of an n-digit binary number that is to be converted to analog form comprises n weighted capacitors. These capacitors are integrated with charging switches for the n-digits of the binary number, discharging switches, charge distributing switches and a reference voltage source being also provided.