Patents Examined by Thuan Du
  • Patent number: 8433939
    Abstract: A method applied in a display apparatus is provided. The display apparatus includes a first screen, a second screen, power signal means. The first screen is volatile. The second screen is non-volatile. The power signal means generate a power off signal in response to a user operation. The method includes: determining whether a power off signal is received; displaying a user interface on the first screen if the power off signal is received; controlling the display on the second screen in response to a user selection on the operation interface; generating a shutdown signal; and powering off the first screen, and the second screen when receiving the shutdown signal.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: April 30, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Ping-Yang Chuang
  • Patent number: 8429435
    Abstract: An automation system including a plurality of peripheral devices, each configured to perform at least one function relating to energy consumption in a facility and an automation controller in communication with the plurality of peripheral devices and providing for the control of the performance of the function by each device, wherein the automation controller includes a compiler configured to take high level rules and information about the peripheral devices and produce at least one program that will respond to data from the peripheral devices and to timer, calendar, clock, and preprogrammed events and a server component that provides the data as input to the at least one program and takes actions based on the output of the program.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: April 23, 2013
    Assignee: Autani Corporation
    Inventors: Randy Clayton, Kenneth Noppinger
  • Patent number: 8429390
    Abstract: A method for performing a quick boot and a general boot at a basic input output system (BIOS) stage is described. A computer is powered on. An embedded controller firmware or a BIOS determines whether a quick boot key is pressed. If the quick boot key is not pressed, a boot flag is changed from Quick Boot to General Boot. If the quick boot key is pressed, the BIOS determines whether the boot flag is set to Quick Boot. If it is determined that the boot flag is set to Quick Boot, an initialization of drivers preset by the quick boot is performed, and uninitialized drivers are initialized at a stage when an operating system is started. If it is determined that the boot flag is set to General Boot, an initialization of all drivers is performed.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: April 23, 2013
    Assignee: Insyde Software Corp.
    Inventors: David Yu, Lawrence Chiu, Jeremy Wang, Sam Lo, Giant Liang, Susan Su
  • Patent number: 8429437
    Abstract: A system includes a plurality of storage devices and a controller. The plurality of storage devices are bus-connected to one clock signal line and one data signal line connected to the controller. Each of the plurality of storage devices stores identification information in advance to distinguish the storage devices from each other. The controller transmits data using an identification information transmission period in which one storage device is selected from the plurality of storage devices by transmitting the identification information of the one storage device to the plurality of storage devices via the data signal line and a data transmission period in which the data is transmitted to the one selected storage device. A frequency of a clock signal during the identification information transmission period is set to be lower than a frequency of the clock signal during the data transmission period.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: April 23, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Noboru Asauchi
  • Patent number: 8423755
    Abstract: A multi-processor system includes a first processor, a second processor communicable with the first processor, a first non-volatile memory for storing first codes and second codes to respectively boot the first and second processors, the first memory communicable with the first processor, a second volatile memory designated for the first processor, a third volatile memory designated for the second processor, and a fourth volatile memory shared by the first and second processors.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Jae Byun, Young Min Lee, Yun-Tae Lee, Gyoo-Cheol Hwang
  • Patent number: 8417971
    Abstract: Disclosed is a data processing device, which comprises: an input device for generating first input information; a central processor; an embedded controller, connected to the power supply, the input device and the central processor. When the data processing device is powered on, the embedded controller is adapted to control the power supply to supply power to the input device and the central processor; process the first input information as second information, which can be identified by the central processor; and send the second information to the central processor.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: April 9, 2013
    Assignee: Lenovo (Beijing) Limited
    Inventors: Zhen Huang, Zhongqing Li
  • Patent number: 8407513
    Abstract: This disclosure relates to providing an information signal to one or more sub-systems within a wireless communications device, where the information signal enables the sub-systems to operate based on virtually corrected reference frequency clock signal(s).
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: March 26, 2013
    Assignee: Infineon Technologies AG
    Inventor: Michael Meixner
  • Patent number: 8402292
    Abstract: Implementations of the present invention may involve methods and systems to improve the combined power consumption and thermal response of individual components of a computer system as the components are stressed concurrently during simulation or testing of the system. A group of operating system-level instruction sets for several individual components of the computer system may be designed to stress the components and executed concurrently while power and thermal measurements are taken. The instruction sets may utilize one or more software threads of the computer system or hardware threads such that minimal interference between components occurs as the system is tested. Further, the system components may be partitioned between separate instruction sets. By minimizing the interference between the components while the system is operating, a more accurate power consumption and thermal effect measurements may be taken on the computer system to better approximate the performance of the system.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: March 19, 2013
    Assignee: Oracle America, Inc.
    Inventors: Alok Parikh, Amandeep Singh
  • Patent number: 8397054
    Abstract: Problem solution speed may be increased by dynamically changing processing device computational hardware configuration in concert with respective mathematical phases of an algorithm to match accuracy demands at various phases of computation. Smaller but faster hardware structures may be increased in size using real-time partial or full reconfiguration of a processing device to apply the smallest and fastest possible computational structure for the needed accuracy during each of multiple computational phases.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: March 12, 2013
    Assignee: L-3 Communications Integrated Systems L.P.
    Inventors: Antone L. Kusmanoff, Matthew P. DeLaquil, Deepak Prasanna
  • Patent number: 8392738
    Abstract: A method and system for power source management of a portable device. A power source used to supply electrical energy for a portable device should ideally operate with a constant terminal voltage. However, the terminal voltage of a cell or group of cells used as a source of electrical energy can be expected to reduce in amplitude over its operational lifetime. Near the end of operational lifetime, the terminal voltage of such a source can be expected to decrease rapidly. Furthermore, the source terminal voltage will also exhibit significant variations in amplitude in response to changes in electric current demands on the source. Such source voltage variations can impair or even prevent proper operation of the electronic circuits within the portable device. Power management for proper operation of a portable device is necessary to ensure proper device operation and to prevent loss of data.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: March 5, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: John S. LeFevre, Keith Yamanaka, Jeffry Harlow Loucks
  • Patent number: 8381004
    Abstract: A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Heather L. Hanson, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8381010
    Abstract: A circuit for switching clocks includes a first input intended to receive a first clock signal at a frequency alternately equal to a first value or a second value, a second input intended to receive a second clock signal, synchronous with the first clock signal, at a third frequency and an output intended to deliver a third clock signal at a frequency alternately equal to the first value or the third value.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: February 19, 2013
    Assignee: Thales
    Inventors: Sebastien Geairon, Pascal Commun, Pierre Saint Ellier
  • Patent number: 8375200
    Abstract: A file change notification method of an embedded device that includes a first operating system (OS) and a second OS. The first OS corresponds to a first central processing unit (CPU) and connects to a storage system, the second OS corresponds to a second CPU for sharing with the configuration file via a network file system (NFS). The method monitors the configuration file stored in the storage system, determines whether the configuration file has been modified, and generates a notification message to notify a first application program that the configuration file has been changed. The method further sends the notification message from the first OS to the second OS through a communication network, and notifies a second application program that the configuration file has been changed when the notification message is received from the first OS.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: February 12, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chien-Hua Chen, Yi-Hsiu Tseng
  • Patent number: 8375238
    Abstract: A memory controller takes in the first to (N?1)th pieces of data respectively in synchronization with the second to Nth return read clocks. The memory controller takes in the Nth piece of data from stop of output of the Nth read clock and before a first predetermined time. The memory controller sets an output period of the Nth read clock to be longer than an output period of each of the first to (N?1)th read clocks.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: February 12, 2013
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Patent number: 8370663
    Abstract: A central processing unit (CPU) can specify an initial (e.g., baseline) frequency for a clock signal used by a device to perform a task. The CPU is then placed in a reduced power mode. The device performs the task after the CPU is placed in the reduced power mode until a triggering event causes the device to send an interrupt to the CPU. In response to the interrupt, the CPU awakens to dynamically adjust the clock frequency. If the clock frequency is reset to the baseline value, then the CPU is again placed in the reduced power mode.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: February 5, 2013
    Assignee: NVIDIA Corporation
    Inventors: Aleksandr Frid, Parthasarathy Sriram
  • Patent number: 8359463
    Abstract: There is provided a computer-implemented method for selecting from a plurality of full configurations of a storage system an operational configuration for executing an application. An exemplary method comprises obtaining application performance data for the application on each of a plurality of test configurations. The exemplary method also comprises obtaining benchmark performance data with respect to execution of a benchmark on the plurality of full configurations, one or more degraded configurations of the full configurations and the plurality of test configurations. The exemplary method additionally comprises estimating a metric for executing the application on each of the plurality of full configurations based on the application performance data and the benchmark performance data. The operational configuration may be selected from among the plurality full configurations based on the metric.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: January 22, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Arif A. Merchant, Ludmila Cherkasova
  • Patent number: 8356203
    Abstract: An asynchronous interface circuit for transferring a data stream between different clock domains, the asynchronous interface circuits includes a data holding circuit for sequentially receiving and transferring data of the data stream in synchronism with a first clock signal, and holding the received data until an input of a next data, an asynchronous memory for sequentially receiving the data held in the data holding circuit in synchronism with the first clock signal and for outputting the data in the order of inputting in synchronism with a second clock signal. The asynchronous interface circuit further includes a monitor for detecting an operating state of the asynchronous memory, and a selector for selecting one of the data output from the asynchronous memory and the data output from the data holding circuit on the basis of a detecting result of the monitor.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: January 15, 2013
    Assignee: Fujitsu Limited
    Inventors: Atsushi Uchida, Yuji Hanaoka, Terumasa Haneda, Yoko Kawano, Emi Narita
  • Patent number: 8352767
    Abstract: The invention relates to systems and or methodologies for intelligent and adaptive power management in mobile devices. A peripheral power management component can set peripheral devices to active or inactive based on one or more schemas. The schemas can be predetermined or generated by the peripheral power management component. In addition, an adaptive component can modify the schemas to reflect actual usage or changing trends for each peripheral device.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: January 8, 2013
    Assignee: Symbol Technologies, Inc.
    Inventors: Chi Zhang, Charles Bolen
  • Patent number: 8347136
    Abstract: An image forming apparatus and a control method thereof includes an image forming unit to form images, a main control unit to control operations of the image forming unit; a switching unit to selectively supply an operating voltage to the main control unit according to a level of the voltage control, a power mode selecting unit to convert an on state or an off state according to a user's operation, a first voltage determining unit to determine a level of the control voltage according to the state of the power mode selecting unit, and a second voltage determining unit to determine the level of the control voltage in parallel with the first voltage determining unit, according to the control signal output from the main control unit.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seog-ho Song
  • Patent number: 8335940
    Abstract: A microcomputer system according to the present invention includes multiple backup power supplies that are used instead of the main power supply in response to a voltage drop of a main power supply. The microcomputer system further includes a backup power supply monitoring circuit that monitors charge amount of the multiple backup power supplies and determines whether the charge amount is lower than a predetermined charge amount, a backup power supply charging circuit that charges the backup power supply from the main power supply, where the backup power supply is determined by the backup power supply monitoring unit that the charge amount thereof is lower than the predetermined charge amount, and a power supply switching unit that switches to the backup power supply selected according to a predetermined rule if a voltage of the main power supply is reduced.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: December 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tomoaki Umezu