Abstract: A semiconductor device includes a first device formed over a substrate. The first device includes a first device formed over a substrate, and the first device includes a first gate stack structure encircling a plurality of first nanostructures. The semiconductor device includes a first epitaxy structure wrapping an end of one of the first nanostructures, and a second device formed over the first device, wherein the second device includes a second gate stack structure encircling a plurality of second nanostructures. The semiconductor device includes a second epitaxy structure wrapping an end of one of the second nanostructures, and the second epitaxy structure is directly above the first epitaxy structure.

Abstract: A semiconductor structure includes a semiconductor device, a plurality of through semiconductor vias (TSV), a first seal ring, and a second seal ring. The TSVs are in the semiconductor device. Each of the TSVs has a first surface and a second surface opposite to the first surface. The first seal ring is located in proximity to an edge of the semiconductor structure and is physically connected to the first surface of each of the TSVs. The second seal ring is physically connected to the second surface of each of the TSVs.

Abstract: Examples of an integrated circuit with FinFET devices and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a substrate, a fin extending from the substrate, a gate disposed on a first side of the fin, and a gate spacer disposed alongside the gate. The gate spacer has a first portion extending along the gate that has a first width and a second portion extending above the first gate that has a second width that is greater than the first width. In some such examples, the second portion of the gate spacer includes a gate spacer layer disposed on the gate.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: Ophthalmic compositions including compatible solute components and/or polyanionic components are useful in treating eyes, for example, to relieve dry eye syndrome, to protect the eyes against hypertonic insult and/or the adverse effects of cationic species on the ocular surfaces of eyes and/or to facilitate recovery from eye surgery.

Abstract: A semiconductor device package includes a display device, an encapsulation layer disposed in direct contact with the display device, and a reinforced structure surrounded by the encapsulation layer. The reinforced structure is spaced apart from a surface of the display device. A method of manufacturing a semiconductor device package is also disclosed.

Abstract: A device includes a channel layer, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, and a sidewall spacer. The channel layer is over a substrate. The gate structure wraps around the channel layer. The first source/drain epitaxial structure and the second source/drain epitaxial structure are on opposite sides of the channel layer. The sidewall spacer is on a sidewall of the first source/drain epitaxial structure and includes a first dielectric layer and a second dielectric layer over the first dielectric layer and in contact with first source/drain epitaxial structure. The first dielectric layer and the second dielectric layer include different materials.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: Examples of an integrated circuit with gate cut features and a method for forming the integrated circuit are provided herein. In some examples, a workpiece is received that includes a substrate and a plurality of fins extending from the substrate. A first layer is formed on a side surface of each of the plurality of fins such that a trench bounded by the first layer extends between the plurality of fins. A cut feature is formed in the trench. A first gate structure is formed on a first fin of the plurality of fins, and a second gate structure is formed on a second fin of the plurality of fins such that the cut feature is disposed between the first gate structure and the second gate structure.

Abstract: A semiconductor device include: a first bus waveguide; a first silicon ring optically coupled to the first bus waveguide; a backup silicon ring optically coupled to the first bus waveguide; a first heater and a second heater configured to heat the first silicon ring and the backup silicon ring, respectively; and a first switch, where the first switch is configured to electrically couple the first silicon ring to a first radio frequency (RF) circuit when the first switch is at a first switching position, and is configured to electrically couple the backup silicon ring to the first RF circuit when the first switch is at a second switching position.

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes at least two active strip regions, a hybrid fin structure, and a gate stack. The hybrid fin structure is disposed between the at least two active strip regions. The gate stack is across the at least two active strip regions and the hybrid fin structure. A portion of the hybrid fin structure exposed by the gate stack is free of a high dielectric constant material.

Abstract: A cover structure of a control box is disclosed. The control box includes a base with a limiting part, the cover structure includes a cover body, a knob and a torsion spring, the cover body is connected to the base, the knob is rotatably connected to the cover body and has a stop arm stopped at the limiting part, two ends of the torsion spring are fixed to the cover body and the knob respectively to generate a pre-torque. When the knob is rotated by an external force, the stop arm is released from the limiting part to unlock the cover structure from the base, and when the external force is removed, the knob restores to original position by the pre-torque. Therefore, the cover structure may be removed from the base quickly to facilitate an operator's use and maintenance.

Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.

Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.

Abstract: A semiconductor device includes a substrate, a first source/drain feature and a second source/drain feature over the substrate, a first semiconductor layer and a second semiconductor layer between the first and the second source/drain features, and a gate between the first and the second source/drain features. A portion of the gate is further between the first and the second semiconductor layers. Moreover, the semiconductor device includes a first inner spacer and a second inner spacer. The first inner spacer is between the first and the second semiconductor layers and further between the portion of the gate and a portion of the first source/drain feature. Furthermore, the portion of the first source/drain feature is between the first semiconductor layer and the second semiconductor layer. The first inner spacer has a U-shaped profile. Additionally, the second inner spacer is between the first inner spacer and the portion of the first source drain feature.

Abstract: A time-division multiplexing (TDM) scheduler determines a service order for serving N packet transmission requesters. The TDM scheduler includes: N current count value generators configured to serve the N packet transmission requesters respectively, and generate N current count values according to parameters of the N packet transmission requesters, a previous scheduling result generated by the EDD scheduler previously, and a predetermined counting rule; and an earliest due date (EDD) scheduler configured to generate a current scheduling result for determining the service order according to the N current count values and a predetermined urgency decision rule, wherein an extremum of the N current count values relates to one of the N packet transmission requesters, and the EDD scheduler selects this requester as the one to be served preferentially.

Abstract: A semiconductor device include: a first bus waveguide; a first silicon ring optically coupled to the first bus waveguide; a backup silicon ring optically coupled to the first bus waveguide; a first heater and a second heater configured to heat the first silicon ring and the backup silicon ring, respectively; and a first switch, where the first switch is configured to electrically couple the first silicon ring to a first radio frequency (RF) circuit when the first switch is at a first switching position, and is configured to electrically couple the backup silicon ring to the first RF circuit when the first switch is at a second switching position.

Abstract: Embodiments of an ion cryo-implantation process utilize a post implantation heating stage to heat the implanted wafer while under the heavy vacuum used during cryo-implantation. The implanted wafer is then transferred to load locks which are held at a lesser vacuum than the heavy vacuum.

Abstract: A portable electronic device and an operation method are provided. The portable electronic device includes a body, a screen, a camera, an image sensor and a main system. The image sensor continually captures a first image outside the body with a first resolution and a first power consumption. The camera is turned on in the first state of the portable electronic device by the main system to capture a second image outside the body with a second power consumption and a second resolution only when the face image information appeared for over two seconds on the screen is detected by the image sensor from the first image. The second resolution is higher than the first resolution, and the second power consumption is higher than the first power consumption.

Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.