Abstract: An integrated circuit package and a method of forming the same are provided. The integrated circuit package includes a photonic integrated circuit die. The photonic integrated circuit die includes an optical coupler. The integrated circuit package further includes an encapsulant encapsulating the photonic integrated circuit die, a first redistribution structure over the photonic integrated circuit die and the encapsulant, and an opening extending through the first redistribution structure and exposing the optical coupler.

Abstract: A semiconductor device includes an optical connector element and an optical coupler. The optical connector element includes a base structure, a first polymer via and a cladding layer. The base structure has a first surface and a second surface opposite to the first surface. The first polymer via passes through the base structure from the first surface to the second surface. The cladding layer is surrounding the first polymer via, wherein a refractive index of the cladding layer is different than a refractive index of the first polymer via. The optical coupler is disposed over the optical connector element, wherein the optical coupler receives optical signals from the first polymer via.

Abstract: An anti-stick titanium cookware and a method of manufacturing the same are provided. The anti-stick titanium cookware includes a titanium cookware body, a titanium cladding element, a heat-conducting element and an anti-stick layer. The titanium cookware body and the titanium cladding element are made of plate bodies, the titanium cladding element is welded on the lower surface of the titanium cookware body, and an interlayer space is formed between the titanium cladding element and the titanium cookware body. The heat-conducting element is accommodated in the interlayer space and contacts the lower surface of the titanium cookware body. The anti-stick layer is formed on the upper surface of the titanium cookware body. The heat-conducting element is fixed on the lower surface of the titanium cookware body through the titanium cladding element. The anti-stick layer is a titanium oxide film formed on the upper surface of the titanium cookware body.

Abstract: A manufacturing method of a semiconductor package includes the following steps. A supporting layer is formed over a redistribution structure. A first planarization process is performed over the supporting layer. A lower dielectric layer is formed over the supporting layer, wherein the lower dielectric layer includes a concave exposing a device mounting region of the supporting layer. A first sacrificial layer is formed over the supporting layer, wherein the sacrificial layer filling the concave. A second planarization process is performed over the lower dielectric layer and the first sacrificial layer. A transition waveguide provided over the lower dielectric layer. The first sacrificial layer is removed. A semiconductor device is mounted over the device mounting region, wherein the semiconductor device includes a device waveguide is optically coupled to the transition waveguide.

Abstract: Photonic devices and methods of manufacture are provided. In embodiments a fill material and/or a secondary waveguide are utilized in order to protect other internal structures such as grating couplers from the rigors of subsequent processing steps. Through the use of these structures at the appropriate times during the manufacturing process, damage and debris that would otherwise interfere with the manufacturing process of the device or operation of the device can be avoided.

Abstract: A light source for EUV radiation is provided. The light source includes a target droplet generator, a laser generator, and a controller. The target droplet generator is configured to provide target droplets to a source vessel. The laser generator is configured to provide a plurality of first laser pulses according to a control signal to irradiate the target droplets in the source vessel to generate plasma as the EUV radiation. The controller is configured to provide the control signal according to the temperature of the source vessel and droplet positions of the target droplets. When the temperature of the source vessel exceeds a temperature threshold value and a standard deviation of the droplet positions of the target droplets exceeds a first standard deviation threshold value, the controller is configured to provide the control signal to the laser generator, so as to stop providing the first laser pulses.

Abstract: A board-like connector, a dual-arm bridge of a board-like connector, and a wafer testing assembly are provided. The board-like connector includes a plurality of dual-arm bridges spaced apart from each other and an insulating layer. Each of the dual-arm bridges includes a carrier, a first cantilever, a second cantilever, a first abutting column, and a second abutting column, the latter two of which extend from the first and second cantilevers along two opposite directions. The first cantilever and the second cantilever extend from and are coplanar with the carrier. The insulating layer connects the carriers of the dual-arm bridges. The first abutting column and second abutting column of each of the dual-arm bridges respectively protrude from two opposite sides of the insulating layer, and are configured to abut against two boards, respectively.

Abstract: A dust collector apparatus includes a housing, an airflow generation module and a filter. The housing has one side formed at least one intake vent-hole and another side formed of at least one exhaust vent-hole. An inner side of the housing has an airflow channel formed between the intake vent-hole and the exhaust vent-hole. The airflow generation module comprises an airflow drawing unit for drawing an airflow in order to form the airflow channel between the intake vent-hole and the exhaust vent-hole, a control module for controlling the airflow drawing unit, and a power module. The filter is detachably arranged at the intake end and used for filtering dust in the air sucked by the airflow drawing unit. The dust collector apparatus of the present invention allows the dust particles to be properly collected by the filter without secondary scattering, and guides the airflow to be exhausted smoothly.

Abstract: An extreme ultraviolet (EUV) photolithography system detects debris travelling from an EUV generation chamber to a scanner. The photolithography system includes a detection light source and a sensor. The detection light source outputs a detection light across a path of travel of debris particles from the EUV generation chamber. The sensor senses debris particles by detecting interaction of the debris particles with the detection light.

Abstract: A first package is bonded to a first substrate with first external connections and second external connections. The second external connections are formed using materials that are different than the first external connections in order to provide a thermal pathway from the first package. In a particular embodiment the first external connections are solder balls and the second external connections are copper blocks.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: A semiconductor device includes an interposer disposed on a substrate. A first major surface of the interposer faces the substrate. A system on a chip is disposed on a second major surface of the interposer. The second major surface of the interposer opposes the first major surface of the interposer. A plurality of first passive devices is disposed in the first major surface of the interposer. A plurality of second passive devices is disposed on the second major surface of the interposer. The second passive devices are different devices than the first passive devices.

Abstract: Supersonic gas jets are provided near the immediate focus of a lithography apparatus in order to deflect tin debris generated by the lithography process away from a scanner side and towards a debris collection device. The gas jets can be positioned in a variety of useful orientations, with adjustable gas flow velocity and gas density in order to prevent up to nearly 100% of the tin debris from migrating to the reticle on the scanner side.

Abstract: A semiconductor structure is provided. A logic cell includes a first transistor in a first active region, a second gate electrode and a third gate electrode on opposite sides of the first transistor, a second transistor in a second active region, and a first isolation structure and a second isolation structure on opposite edges of the second active region. The first transistor includes a first gate electrode extending in a first direction. The second and third gate electrodes extend in the first direction, and the first and second isolation structures extend in the first direction. The second transistor and the first transistor share the first gate electrode. The first isolation structure is aligned with the second gate structure in the first direction, and the second isolation structure is aligned with the third gate structure in the first direction.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a cell array having a plurality of rows. The cell array includes a plurality of first logic cells arranged in at least one first row, and a plurality of second logic cells arranged in at least one second row. The first logic cells share a first active region. Each of the second logic cells has a second active region, and the second active regions of two adjacent second logic cells are separated from each other by an isolation structure. The first logic cells of the first row are in contact with the second logic cells of the second row.

Abstract: A package structure including a first semiconductor die, a second semiconductor die, first conductive pillars and a first insulating encapsulation is provided. The first semiconductor die includes a semiconductor substrate, an interconnect structure and a first redistribution circuit structure. The semiconductor substrate includes a first portion and a second portion disposed on the first portion. The interconnect structure is disposed on the second portion, the first redistribution circuit structure is disposed on the interconnect structure, and the lateral dimension of the first portion is greater than the lateral dimension of the second portion. The second semiconductor die is disposed on the first semiconductor die. The first conductive pillars are disposed on the first redistribution circuit structure of the first semiconductor die. The first insulating encapsulation is disposed on the first portion.

Abstract: A lithography system is provided capable of deterring contaminants, such as tin debris from entering into the scanner. The lithography system in accordance with various embodiments of the present disclosure includes a processor, an extreme ultraviolet light source, a scanner, and a hollow connection member. The light source includes a droplet generator for generating a droplet, a collector for reflecting extreme ultraviolet light into an intermediate focus point, and a light generator for generating pre-pulse light and main pulse light. The droplet generates the extreme ultraviolet light in response to the droplet being illuminated with the pre-pulse light and the main pulse light. The scanner includes a wafer stage. The hollow connection member includes an inlet that is in fluid communication with an exhaust pump. The hollow connection member provides a hollow space in which the intermediate focus point is disposed.

Abstract: An airtight device includes a tank, a sink and a feedthrough module. The sink is disposed inside the tank, and an opening is formed on the sink. The feedthrough module is disposed on the opening. The feedthrough module includes a base, a sealing component, a covering component, a transmission component and a plurality of fixing components. A groove is formed on the base. A part of the sealing component is disposed inside the groove. The covering component is assembled with the base and adapted to press the sealing component. A plurality of fixing holes is formed on the covering component. The transmission component is assembled with the covering component. The plurality of fixing components is adapted to insert into the plurality of fixing holes and engage with the base for pressing the sealing component by shortening a distance between the base and the covering component.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.