Abstract: A method includes: removing debris on a collector of a lithography equipment by changing physical structure of the debris with a cleaner, the cleaner being at a temperature less than about 13 degrees Celsius; forming a cleaned collector by exhausting the removable debris from the collector; and forming openings in a mask layer on a substrate by removing regions of the mask layer exposed to radiation from the cleaned collector.

Abstract: An electronic device includes a display panel, a gate driving circuit and a control unit. The display panel includes a display scan line and a dummy scan line. The gate driving circuit includes a first output unit for providing a display scan signal to the display scan line, and a second output unit for providing a test scan signal to the dummy scan line. The control unit is electrically connected to the gate driving circuit for receiving the test scan signal, updating a driving voltage according to the test scan signal, and driving the gate driving circuit according to the updated driving voltage.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.

Abstract: An antimicrobial and adhesion-proof titanium tableware and a manufacturing method of the same are provided. The antimicrobial and adhesion-proof titanium tableware is made of a titanium substrate, and includes a contact portion and an oxidation layer structure. The contact portion is used for contacting foods, food ingredients, drinking water, beverages, or body parts of a user. The oxidation layer structure is formed on one part of a surface of the titanium substrate corresponding to the contact portion. The titanium substrate is made of titanium in ? phase, and the oxidation layer structure is a titanium dioxide film in a rutile crystalline form. The oxidation layer structure has a roughened surface and an oxygen diffusion layer formed at an interface of the oxidation layer structure and the titanium substrate.

Abstract: The present invention provides a photocuring device, comprising a housing and an ultraviolet (UV) light module, wherein the housing comprises an electroluminescent layer and/or a touch layer and a control module connected to the electroluminescent layer and/or the touch layer by an electrical means. The photocuring device of the invention not only features a low material cost and low production cost, but also allows its display interface and/or operation interface to be provided at any position of the housing of the photocuring device, without limitations in size, shape, or angle. Furthermore, the photocuring device of the invention allows its display interface and/or operation interface to be simplified as needed to facilitate operation and viewing by a manicurist or one who is receiving a manicure.

Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.

Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.

Abstract: Some implementations described herein include systems and techniques for fabricating a semiconductor die package that includes a cooling interface region formed in surface of an integrated circuit die. The cooling interface region, which includes a combination of channel regions and pillar structures, may be directly exposed to a fluid above and/or around the semiconductor die package.

Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.

Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.

Abstract: In one embodiment, a flow cytometer is disclosed having a compact light detection module. The compact light detection module includes an image array with a transparent block, a plurality of micro-mirrors in a row coupled to a first side of the transparent block, and a plurality of filters in a row coupled to a second side of the transparent block opposite the first side. Each of the plurality of filters reflects light to one of the plurality of micro-mirrors and passes light of a differing wavelength range and each of the plurality of micro-mirrors reflects light to one of the plurality of filters, such that incident light into the image array zigzags back and forth between consecutive filters of the plurality of filters and consecutive micro-mirrors of the plurality of micro-mirrors. A radius of curvature of each of the plurality of micro-mirrors images the fiber aperture onto the odd filters and collimates the light beam on the even filters.

Abstract: A device and method of manufacture is provided that utilize a dummy pad feature adjacent contact pads. The contact pads may be contact pads in an integrated fan-out package in which a molding compound is placed along sidewalls of a die and the contact pads extend over the die and the molding compound. The contact pads are electrically coupled to the die using one or more redistribution layers. The dummy pad features are electrically isolated from the contact pads. In some embodiments, the dummy pad features partially encircle the contact pads and are located in a corner region of the molding compound, a corner region of the die, and/or an interface region between an edge of the die and the molding compound.

Abstract: A drink container and a lid assembly thereof are provided. The drink container includes a container body and the lid assembly, the lid assembly includes a first lid and a second lid, the first lid is screwed at an opening end of the container body through screw threads, the first lid has a top portion, and the top portion of the first lid has an opening portion. The second lid is disposed above the first lid, the second lid includes a plunger component, and a bottom portion of the plunger can be engaged with the opening portion and sealed with the opening portion. The plunger component is connected to a connection arm, and one side of the connection arm corresponding to the plunger component is pivotally connected to a pivot portion of the first lid. The plunger component has a second accommodating space configured to accommodate a straw.

Abstract: A photonic integrated circuit has a central region and a peripheral region surrounding the central region. The photonic integrated circuit includes a semiconductor layer, a seal ring structure, and a plurality of silicon waveguides. The seal ring structure is disposed on the semiconductor layer. The seal ring structure is located in the peripheral region and has at least one recess recessing towards the central region from a top view. The seal ring structure is a continuous structure from the top view. The silicon waveguides are embedded in the semiconductor layer.

Abstract: In an embodiment, a package includes an interposer; a first integrated circuit device attached to the interposer, wherein the first integrated circuit device includes a die and a heat dissipation structure, the die having an active surface facing the interposer and an inactive surface opposite to the active surface, the heat dissipation structure attached to the inactive surface of the die and including a plurality of channels recessed from a first surface of the heat dissipation structure, the first surface of the heat dissipation structure facing away from the die; and an encapsulant disposed on the interposer and laterally around the die and the heat dissipation structure, wherein a top surface of the encapsulant is coplanar with the top surface of the heat dissipation structure.

Abstract: A method includes irradiating debris deposited in an extreme ultraviolet (EUV) lithography system with laser, controlling one or more of a wavelength of the laser or power of the laser to selectively vaporize the debris and limit damage to the EUV) lithography system, and removing the vaporized debris.

Abstract: A semiconductor device includes an interposer disposed on a substrate. A first major surface of the interposer faces the substrate. A system on a chip is disposed on a second major surface of the interposer. The second major surface of the interposer opposes the first major surface of the interposer. A plurality of first passive devices is disposed in the first major surface of the interposer. A plurality of second passive devices is disposed on the second major surface of the interposer. The second passive devices are different devices than the first passive devices.