Abstract: A method includes performing a first post Chemical Mechanical Polish (CMP) cleaning on a wafer using a first brush. The first brush rotates to clean the wafer. The method further includes performing a second post-CMP cleaning on the wafer using a second brush. The second brush rotates to clean the wafer. The first post-CMP cleaning and the second post-CMP cleaning are performed simultaneously.

Abstract: The present invention features a compound of formula I: or a pharmaceutically acceptable salt thereof, where R1, R2, R3, W, X, Y, Z, n, o, p, and q are defined herein, for the treatment of CFTR mediated diseases, such as cystic fibrosis. The present invention also features pharmaceutical compositions, method of treating, and kits thereof.

Abstract: A femur supporting device includes a femoral stem having a plurality of inclined passages. The femoral stem includes an inner side and an outer side. Each inclined passage includes an outlet in the inner side and an inlet in the outer side. Each inclined passage inclines upward from the inlet to the outlet. A plurality of supporting rods extends through the inclined passages. A first engaging end of each supporting rod extends out of the outlet of one of the inclined passages. A second engaging end of each supporting rod extends out of the inlet of one of the inclined passages. The first engaging end of each supporting rod is engaged with one of a plurality of first engaging portions in a trochanter head. The second engaging end of each supporting rod is engaged with one of a plurality of second engaging portions of a fixing unit.

Abstract: A mandibular fixation device overcomes the low operability of the conventional mandibular fixation device. The mandibular fixation device includes a sleeve, a first screw rod, a second screw rod and two positioning members. The sleeve includes two ends respectively provided with first and second screw holes. The first and second screw holes have opposite spiral directions. The first screw rod has a first threaded portion and a first assembly portion. The first threaded portion is threadedly engaged with the first screw hole, and the first assembly portion is located outside of the sleeve. The second screw rod has a second threaded portion and a second assembly portion. The second threaded portion is threadedly engaged with the second screw hole, and the second assembly portion is located outside of the sleeve. The two positioning members are coupled with the first and second assembly portions, respectively.

Abstract: An interconnect layer is disposed over a substrate. The interconnect layer includes a plurality of dielectric segments interleaved with a plurality of metal components. A plurality of vias is disposed below, and electrically coupled to, a first group of the metal components. A plurality of dielectric components is disposed underneath a second group of the metal components. The dielectric components interleave with the vias. A conductive liner is disposed below a bottom surface and on sidewalk of the vias. A dielectric barrier layer is disposed below a bottom surface and on sidewalls of the dielectric segments. The dielectric barrier layer and the dielectric segments have different material compositions.

Abstract: Methods are herein provided for decision support in diagnosis of a disease in a subject, and for extracting features from a multi-slice data set. Systems for computer-aided diagnosis are provided. The systems take as input a plurality of medical data and produces as output a diagnosis based upon this data. The inputs may consist of a combination of image data and clinical data. Diagnosis is performed through feature selection and the use of one or more classifier algorithms.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a gate metal layer, a via, a first source metal layer, a drain metal layer, and a second source metal layer. The source electrode, the drain electrode, and the gate electrode are present on the active layer. The first insulating layer is present on the source electrode, the drain electrode, and the gate electrode. The gate metal layer, the first source metal layer, the second source metal layer, and the drain metal layer are present on the first insulating layer. The gate metal layer includes a narrow portion and a wider portion. The via is present between the metal gate layer and the gate electrode. The second source metal layer is present between the gate metal layer and the drain metal layer.

Abstract: The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF3) and ammonia (NH3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.

Abstract: A method for manufacturing a semiconductor device comprises forming a first fin and a second fin on a first active region and a second active region of a semiconductor substrate, respectively. A first dummy gate is formed over the first fin and a second dummy gate is formed over the second fin, wherein the first dummy gate has a first gate width along a lengthwise direction of the first fin, the second dummy gate has a second gate width along the lengthwise direction of the second fin, the first gate width is different from the second gate width. At least one of the first dummy gate and the second dummy gate is removed. A ferroelectric layer is then formed over the semiconductor substrate, in which the first dummy gate and/or the second dummy gate is removed. At least one metal gate electrode is formed on the ferroelectric layer.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The method includes forming a stop layer over the first layer. The method includes forming a second layer over the stop layer. The method includes performing a first planarization process over the second layer until the stop layer is exposed. The method includes performing an etching process to remove the second layer, the stop layer, and an upper portion of the first layer. The method includes performing a second planarization process over the first layer.

Abstract: In a method of manufacturing a gate-all-around field effect transistor, a trench is formed over a substrate. Nano-tube structures are arranged into the trench, each of which includes a carbon nanotube (CNT) having a gate dielectric layer wrapping around the CNT and a gate electrode layer over the gate dielectric layer. An anchor layer is formed in the trench. A part of the anchor layer is removed at a source/drain (S/D) region. The gate electrode layer and the gate dielectric layer are removed at the S/D region, thereby exposing a part of the CNT at the S/D region. An S/D electrode layer is formed on the exposed part of the CNT. A part of the anchor layer is removed at a gate region, thereby exposing a part of the gate electrode layer of the gate structure. A gate contact layer is formed on the exposed part of the gate electrode layer.

Abstract: An optical communication module contains: a lens element, a fixer, and at least one optical fiber. The lens element includes a groove, a body, a top face, a light input face, at least one collimator lens, and a reflective bevel face. The at least one collimator lens is located within an orthographic projection range of a vertical viewing angle of the reflective bevel face, and the body has a light output face. The fixer is mounted beside the body and includes an accommodation recess and at least one focus face, wherein the at least one focus face corresponds to an orthographic projection range of a horizontal viewing angle of the light output face. The at least one optical fiber is inserted into the accommodation recess, and a glue is filled into the accommodation recess so that the at least one optical fiber is adhered in the lens element.

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, and a first drain pad. The source electrode, the drain electrode, and the gate electrode are disposed, on an active region of the active layer. The first insulating layer is disposed on the source electrode, the drain electrode, and the gate electrode. The first source pad and the first drain pad are disposed on the first insulating layer and the active region. The first source pad includes a first source body and a first source branch. The first source branch is electrically connected to the first source body and disposed on the source electrode. The first drain pad includes a first drain body and a first drain branch. The first drain branch is electrically connected to the first drain body and disposed on the drain electrode.

Abstract: A control method for network communication system comprises of obtaining an item of neighbor base station identification information of a neighbor base station by a first base station; obtaining a first base station neighbor information from the first base station by a first MEC platform; producing an item of first platform neighbor information by the first MEC platform; determining whether a request signal matches the first platform neighbor information after receiving the request signal from a second MEC platform; providing the first platform identification information to the second MEC platform while determining that the request signal matches the first platform neighbor information.

Abstract: A photolithography model used in an optical proximity correction process modifies an image output intensity of a point disposed along a two dimensional plane and having coordinates (x,y) in accordance with a gradient of a convolution of a mask value at the point and a sampling pattern function selected at the point. The sampling pattern function includes, in part, a first subset of sampling patterns and a second subset of sampling patterns. The first subset of sampling patterns includes first and second nodes. The second subset of sampling patterns include first and second antinodes. The gradient of the convolution of the mask value and the first and second nodes of the first subset are scaled by a first coefficient. The gradient of the convolution of the mask value and the first and second antinodes of the second subset are scaled by a second coefficient.

Abstract: A control method for network communication system including base station network management server comprises of obtaining an item of neighbor base station identification information of a neighbor base station by a first base station; providing the first base station identification information to a base station network management server by the first base station; obtaining a first base station neighbor information from the base station network management server by a first MEC platform; producing an item of first platform neighbor information by the first MEC platform; determining whether a request signal matches the first platform neighbor information after receiving the request signal from a second MEC platform; providing the first platform identification information to the second MEC platform while determining that the request signal matches the first platform neighbor information.

Abstract: A FinFET device and method of forming the same are disclosed. The method includes forming a gate dielectric layer and depositing a metal oxide layer over the gate dielectric layer. The method also includes annealing the gate dielectric layer and the metal oxide layer, causing ions to diffuse from the metal oxide layer to the gate dielectric layer to form a doped gate dielectric layer. The method also includes forming a work function layer over the doped gate dielectric layer, and forming a gate electrode over the work function layer.

Abstract: A method of forming a gate dielectric material includes forming a high-K dielectric material in a first region over a substrate, where forming the high-K dielectric material includes forming a first dielectric layer comprising hafnium over the substrate, and forming a second dielectric layer comprising lanthanum over the first dielectric layer.

Abstract: A cleaning robot including a processor, a first sensor and a second sensor is provided. The first sensor and a second sensor are disposed on one side of a machine body of the cleaning robot. The processor executes a plurality of operation including: when the cleaning robot operated in an automatic charging mode, controlling the cleaning robot to move forward, and determining whether an optical signal transmitted from a charging station is sensed by the first sensor and the second sensor; when the first sensor senses the optical signal, determining the cleaning robot is located in the light emission range of the optical signal; when the second sensor senses the optical signal, determining the one side of the cleaning robot faces a charging station; controlling the cleaning robot to move forward, so that the power receiving portion of the cleaning robot contacts a power supply portion of the charging station.