Patents by Inventor Fu Tsai

Fu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11676959
    Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: June 13, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fu Tsai, Tzu-Heng Chang, Yu-Ti Su, Kai-Ping Huang
  • Patent number: 11670593
    Abstract: An electronic device and a manufacturing method thereof are provided. The method includes at least the following steps. An insulating encapsulant is formed to encapsulate a multi-layered structure and a semiconductor die, where the multi-layered structure includes a first conductor, a diffusion barrier layer on the first conductor, and a metallic layer on the diffusion barrier layer, and the insulating encapsulant at least exposes a portion of the semiconductor die and a portion of the first conductor. A redistribution structure is formed over the insulating encapsulant, the semiconductor die, and the first conductor. The metallic layer is removed to form a recess in the insulating encapsulant. A second conductor is formed in the recess over the diffusion barrier layer, where the first conductor, the diffusion barrier layer, and the second conductor form a conductive structure that is electrically coupled to the semiconductor die through the redistribution structure.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Hou-Ju Huang, Shih-Ting Lin, Szu-Wei Lu, Hung-Wei Tsai
  • Publication number: 20230133328
    Abstract: A health care device includes a health care body for positioning a body part of a user, so as to maintain a first specific positional relationship with the body part, wherein the body part has an acupoint; an acupoint work piece for performing a health care work onto the use through the acupoint; and a work piece holder having a first end connected to the health care body and a second end for fixing the acupoint work piece, so that under the first specific positional relationship, the acupoint work piece performs the health care work under the condition that the acupoint work piece has a second specific positional relationship with the acupoint. A health care body, method and system are also provided.
    Type: Application
    Filed: April 30, 2020
    Publication date: May 4, 2023
    Applicant: TAO MINING CO., LTD.
    Inventor: Ching-Fu TSAI
  • Publication number: 20230123064
    Abstract: A health care device includes a health care body for positioning a body part of a user, so as to maintain a first specific positional relationship with the body part, wherein the body part has an acupoint; an acupoint work piece for performing a health care work onto the use through the acupoint; and a work piece holder having a first end connected to the health care body and a second end for fixing the acupoint work piece, so that under the first specific positional relationship, the acupoint work piece performs the health care work under the condition that the acupoint work piece has a second specific positional relationship with the acupoint. A health care body, method and system are also provided.
    Type: Application
    Filed: August 24, 2022
    Publication date: April 20, 2023
    Applicant: TAO MINING CO., LTD.
    Inventor: Ching-Fu TSAI
  • Patent number: 11632053
    Abstract: An isolated switched-mode power converter converts power from an input source into power for an output load. A digital controller senses a secondary-side voltage, such as a rectified voltage, of the power converter. The secondary-side voltage is divided down using a high-impedance voltage divider. The resultant divided-down voltage is provided to a voltage sensor within the digital controller. The voltage sensor level shifts the provided voltage, and buffers the resulting level-shifted voltage. The buffered, level-shifted voltage is provided to a tracking analog-to-digital converter (ADC) for digitization. The buffered signal provided to the tracking ADC has a high current capability, such that the voltage input to the tracking ADC may quickly converge before the tracking ADC outputs a digital value for the sensed secondary-side voltage.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: April 18, 2023
    Assignee: Infineon Technologies Austria AG
    Inventors: Sujata Sen, Ronald Hulfachor, Sue Perranoski, Cha-Fu Tsai
  • Publication number: 20230114056
    Abstract: A method for determining an initial rotor position of a permanent magnet synchronous motor (PMSM) includes: generating a plurality of transient currents by applying a plurality of voltages to each phase stator winding of a three phase stator winding of the PMSM; generating three phase current differences according to the plurality of transient currents; determining a first zone in which the initial rotor position of the PMSM is located according to the three phase current differences, wherein angles between 0-360 degrees are divided into a plurality of zones, and the first zone is selected from the plurality of zones; calculating three line current differences according to the three phase current differences; and determining the initial rotor position of the PMSM according to the first zone and the three line current differences.
    Type: Application
    Filed: October 6, 2021
    Publication date: April 13, 2023
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Shih-Chieh Wang, Yong-Yi Jhuang, Ming-Fu Tsai
  • Publication number: 20230105593
    Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 6, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ken-Hao Fan, Yu-Ti Su, Tzu-Cheng Kao, Ming-Fu Tsai, Chia-Lin HSU
  • Publication number: 20230075735
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai
  • Publication number: 20230068649
    Abstract: A semiconductor device includes a first doped zone and a second doped zone in a first semiconductor material, the first doped zone being separated from the second doped zone; an isolation structure between the first doped zone and the second doped zone; and a first line segment over a top surface of the first doped zone, where the ends of the first line segment and the ends of the second line are over the isolation structure. The first line segment and the second line segment have a first width; and a dielectric material is between the first line segment and the second line segment and over the isolation structure. The first width is substantially similar to a width of a gate electrode in the semiconductor device.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Li-Wei CHU, Wun-Jie LIN, Yu-Ti SU, Ming-Fu TSAI, Jam-Wem LEE
  • Publication number: 20230057113
    Abstract: A package structure includes a semiconductor die, a first insulating encapsulant, a plurality of first conductive features, an interconnect structure and bump structures. The semiconductor die includes a plurality of conductive pillars made of a first material. The first insulating encapsulant is encapsulating the semiconductor die. The first conductive features are disposed on the semiconductor die and electrically connected to the conductive pillars. The first conductive features include at least a second material different from the first material. The interconnect structure is disposed on the first conductive features, wherein the interconnect structure includes a plurality of connection structures made of the second material. The bump structures are electrically connecting the first conductive features to the connection structures, wherein the bump structures include a third material different from the first material and the second material.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Ying-Ching Shih, Szu-Wei Lu
  • Publication number: 20230032291
    Abstract: A package structure including an interposer, at least one semiconductor die and an insulating encapsulation is provided. The interposer includes a semiconductor substrate and an interconnect structure disposed on the semiconductor substrate, the interconnect structure includes interlayer dielectric films and interconnect wirings embedded in the interlayer dielectric films, the semiconductor substrate includes a first portion and a second portion disposed on the first portion, the first interconnect structure is disposed on the second portion, and a first maximum lateral dimension of the first portion is greater than a second maximum lateral dimension of the second portion. The at least one semiconductor die is disposed over and electrically connected to the interconnect structure. The insulating encapsulation is disposed on the first portion, wherein the insulating encapsulation laterally encapsulates the least one semiconductor die and the second portion.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kung-Chen Yeh, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih
  • Publication number: 20230018359
    Abstract: A package assembly may include a package substrate, a package lid attached to the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot extending from the plate portion inside the outer foot, and an adhesive that adheres the outer foot to the package substrate and the inner foot to the package substrate.
    Type: Application
    Filed: February 23, 2022
    Publication date: January 19, 2023
    Inventors: Tsung-Fu Tsai, Pu Wang, Ying-Ching Shih, Szu-Wei Lu
  • Patent number: 11557895
    Abstract: An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 17, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Ken-Hao Fan, Yu-Ti Su, Tzu-Cheng Kao, Ming-Fu Tsai, Chia-Lin Hsu
  • Publication number: 20220406627
    Abstract: A pickup apparatus for separating a semiconductor die adhered on an adhesive film therefrom includes a frame, an UV light emitting element, and a collector element. The frame is configurated to hold the adhesive film adhered with the semiconductor die thereon. The UV light emitting element is disposed inside the frame, where the adhesive film is disposed between the semiconductor die and the UV light emitting element. The collector element is disposed over the frame.
    Type: Application
    Filed: January 17, 2022
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Jung Chen, Tsung-Fu Tsai, Szu-Wei Lu
  • Publication number: 20220406676
    Abstract: A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) layer, and a lid structure. The package structure is disposed on the substrate. The TIM layer is disposed on the package structure. The TIM layer includes a liquid state metal material. The lid structure is disposed on the substrate and the TIM layer. The lid structure includes a trench facing the package structure. At least a portion of the TIM layer is located in the trench.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Hsieh, Pu Wang, Tsung-Fu Tsai, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20220401299
    Abstract: A health care device includes a health care body for positioning a body part of a user, so as to maintain a first specific positional relationship with the body part, wherein the body part has an acupoint; an acupoint work piece for performing a health care work onto the use through the acupoint; and a work piece holder having a first end connected to the health care body and a second end for fixing the acupoint work piece, so that under the first specific positional relationship, the acupoint work piece performs the health care work under the condition that the acupoint work piece has a second specific positional relationship with the acupoint. A health care body, method and system are also provided.
    Type: Application
    Filed: August 24, 2022
    Publication date: December 22, 2022
    Applicant: TAO MINING CO., LTD.
    Inventor: Ching-Fu TSAI
  • Patent number: 11521905
    Abstract: A package structure includes a package substrate, a first semiconductor package and a second semiconductor package, an underfill material, a gap filling structure and a heat dissipation structure. The first semiconductor package and the second semiconductor package are electrically bonded to the package substrate. The underfill material is disposed to fill a first space between the first semiconductor package and the package substrate and a second space between the second semiconductor package and the package substrate. The gap filling structure is disposed over the package substrate and in a first gap laterally between the first semiconductor package and the second semiconductor package. The heat dissipation structure is disposed on the package substrate and attached to the first semiconductor package and the second semiconductor package through a thermal conductive layer.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Li-Hui Cheng, Szu-Wei Lu, Tsung-Fu Tsai
  • Patent number: 11508692
    Abstract: A package structure including an interposer, at least one semiconductor die and an insulating encapsulation is provided. The interposer includes a semiconductor substrate and an interconnect structure disposed on the semiconductor substrate, the interconnect structure includes interlayer dielectric films and interconnect wirings embedded in the interlayer dielectric films, the semiconductor substrate includes a first portion and a second portion disposed on the first portion, the first interconnect structure is disposed on the second portion, and a first maximum lateral dimension of the first portion is greater than a second maximum lateral dimension of the second portion. The at least one semiconductor die is disposed over and electrically connected to the interconnect structure. The insulating encapsulation is disposed on the first portion, wherein the insulating encapsulation laterally encapsulates the least one semiconductor die and the second portion.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kung-Chen Yeh, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih
  • Patent number: 11499700
    Abstract: A light string is comprised of a housing assembly, a light emitting source, a first conductive lead wire and a second conductive lead wire. The housing assembly is comprised of a light cap extending from a housing. A spacer plug secures a first and second conductive lead wire, and an light emitting source to the housing assembly. A first conductive lead wire and a second conductive lead wire each extend into the housing and are secured within the housing via the spacer plug. An insulative projection of the spacer plug is seated between the first conductive lead wire and the second conductive lead wire within the housing so as to prevent a direct electrical short between the first conductive lead wire and the second conductive lead wire. Glue is used to fill the housing to create a waterproof electrical connection.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: November 15, 2022
    Inventor: Chang Fu Tsai
  • Publication number: 20220359487
    Abstract: A package structure includes a circuit substrate, a semiconductor package, a lid structure and a plurality of first spacer structures. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package, wherein the lid structure is attached to the circuit substrate through an adhesive material. The plurality of first spacer structures is surrounding the semiconductor package, wherein the first spacer structures are sandwiched between the lid structure and the circuit substrate, and includes a top portion in contact with the lid structure and a bottom portion in contact with the circuit substrate.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Chin-Fu Kao, Pu Wang, Szu-Wei Lu