Patents by Inventor Fu Wang

Fu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130254
    Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes a first electrode, a second electrode on one side of the first electrode, and a resistive switching film between the first electrode and the second electrode. The first electrode, the resistive switching film and the second electrode are arranged along the first direction. The second semiconductor structure includes a first via and a first metal layer on the first via along a second direction and electrically connected to the first via. The first direction is perpendicular to the second direction. An upper surface of the first electrode, an upper surface of the second electrode, an upper surface of the resistive switching film and an upper surface of the first metal layer are coplanar.
    Type: Application
    Filed: December 5, 2022
    Publication date: April 18, 2024
    Inventors: Yen-Min TING, Chuan-Fu WANG, Yu-Huan YEH
  • Patent number: 11961716
    Abstract: A deposition method including following steps is provided. A first precursor is injected into a chamber along a first direction, and a bias power supply is turned on to attract the first precursor to a substrate. A second precursor is injected into the chamber along a second direction perpendicular to the first direction, and the bias power supply is turned on to attract the second precursor to the substrate. A first inert gas is injected into the chamber along the first direction, and the bias power supply is turned off to purge an unnecessary part of the first precursor or an unnecessary part of the second precursor or a by-product. A second inert gas is injected the chamber along the second direction, and the bias power supply is turned off to purge the unnecessary part of the first precursor or the unnecessary part of the second precursor or the by-products.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hsuan-Fu Wang, Fu-Ching Tung, Ching-Chiun Wang
  • Publication number: 20240113197
    Abstract: An electronic device and a method for manufacturing the same are provided. The electronic device includes a substrate and a gate structure. The substrate includes a fin. The fin includes a source region and a drain region spaced apart from the source region. The gate structure is located between the source region and the drain region. The gate structure includes a work function layer. The work function layer includes a compound of a metal material and a Group VIA material.
    Type: Application
    Filed: January 16, 2023
    Publication date: April 4, 2024
    Inventors: JER-FU WANG, CHAO-CHING CHENG, HUNG-LI CHIANG, IULIANA RADU
  • Patent number: 11950521
    Abstract: A resistive random-access memory (RRAM) device includes a bottom electrode, a high work function layer, a resistive material layer, a top electrode and high work function spacers. The bottom electrode, the high work function layer, the resistive material layer and the top electrode are sequentially stacked on a substrate, wherein the resistive material layer includes a bottom part and a top part. The high work function spacers cover sidewalls of the bottom part, thereby constituting a RRAM cell. The present invention also provides a method of forming a RRAM device.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: April 2, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Hung Yu, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240107901
    Abstract: Provided is a resistive random access memory (RRAM). The resistive random access memory includes a plurality of unit structures disposed on a substrate. Each of the unit structures includes a first electrode, and a first metal oxide layer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. In addition, the resistive random access memory includes a second electrode. The second electrode is disposed on the plurality of unit structures and connected to the plurality of unit structures.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Kai Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240107902
    Abstract: A resistive memory device includes a dielectric layer, a via connection structure, a stacked structure, and an insulating structure. The via connection structure is disposed in the dielectric layer. The stacked structure is disposed on the via connection structure and the dielectric layer. The insulating structure penetrates through the stacked structure in a vertical direction and divides the stacked structure into a first memory cell unit and a second memory cell unit. The first memory cell unit includes a first bottom electrode, and the second memory cell unit includes a second bottom electrode separated from the first bottom electrode by the insulating structure. The via connection structure is electrically connected with the first bottom electrode and the second bottom electrode.
    Type: Application
    Filed: October 20, 2022
    Publication date: March 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Jen Wang, Yu-Huan Yeh, Chuan-Fu Wang
  • Publication number: 20240094145
    Abstract: A method and system for detecting the location of a surface defect on a transparent film with respect to whether the surface defect is at a front or back surface of the film. By illuminating the surface defect with a light source from an oblique angle and capturing an image of the surface defect using a camera which is positioned along an axis where the light illuminates after unobstructedly reflected from the test surface of the film, and using the reflected light, an image of the surface defect is obtained. A computer executes an evaluation logic to determine whether the image of the defect contains any dark area. If there is a dark area present, the defect is judged to be on the front surface of the film. If there is no dark area present, the defect is judged to be on the back surface of the film.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Hsien-Te HSIAO, Hsuan-Fu WANG
  • Publication number: 20240083555
    Abstract: A waste collection apparatus for collecting waste in water is provided. The waste collection apparatus includes a floating device and a waste collection device coupled to the floating device. The waste collection device includes a fluid ejection element, and the flow out of the fluid ejection element flows toward a space where waste is collected.
    Type: Application
    Filed: May 12, 2023
    Publication date: March 14, 2024
    Inventors: Wei-Chun LIU, Ching-Fu WANG, Cheng-Che HO, Huan-Fu LIN
  • Publication number: 20240084536
    Abstract: A waste collection apparatus for collecting waste in water is provided. The waste collection apparatus includes a floating device and a waste collection device coupled to the floating device. The floating device includes a plurality of floating units. The waste collection device is coupled to the floating device. Each of the floating units includes a base and a pillar connected to the base, and the density of the base is greater than the density of the pillar.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 14, 2024
    Inventors: Wei-Chun LIU, Ching-Fu WANG, Cheng-Che HO
  • Patent number: 11929115
    Abstract: A memory device and an operation method thereof are provided. The memory device includes memory cells, each having a static random access memory (SRAM) cell and a non-volatile memory cell. The SRAM cell is configured to store complementary data at first and second storage nodes. The non-volatile memory cell is configured to replicate and retain the complementary data before the SRAM cell loses power supply, and to rewrite the replicated data to the first and second storage nodes of the SRAM cell after the power supply of the SRAM cell is restored.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jer-Fu Wang, Hung-Li Chiang, Yi-Tse Hung, Tzu-Chiang Chen, Meng-Fan Chang
  • Publication number: 20240077425
    Abstract: A detection method and system for inspecting a defect on a semi-reflective film by way of different light sources illuminated on the semi-reflective film along the same axis. More specifically, a P-polarized light source and an S-polarized light source are used to illuminate the defect on the semi-reflective film, with an illumination direction that is between 5-45 degrees relative to the semi-reflective film. A camera module captures an image to be inspected through the phenomenon that the P-polarized light will partially pass through the semi-reflective film, and the S-polarized light will be almost completely reflected by the semi-reflective film. During the detection, the defect is determined to be located on the front surface of the semi-reflective film when the S-polarized light is present in the image, and the defect is determined to be located on the back surface of the semi-reflective film when the P-polarized light is present in the image and no S-polarized light has entered the camera module.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 7, 2024
    Inventors: Hsien-Te HSIAO, Hsuan-Fu WANG
  • Publication number: 20240074335
    Abstract: A RRAM device includes a bottom electrode, a resistive material layer, atop electrode, a hard mask and high work function sidewall parts. The bottom electrode, the resistive material layer, the top electrode and the hard mask are sequentially stacked on a substrate. The high work function sidewall parts cover sidewalls of the top electrode and sidewalls of the hard mask, thereby constituting a RRAM cell. A method of forming the RRAM device is also provided.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Applicant: UNITED MICROELCTRONICS CORP.
    Inventors: Wen-Jen Wang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240074338
    Abstract: A resistive random access memory (RRAM) structure includes a RRAM cell, spacers and a dielectric layer. The RRAM cell is disposed on a substrate. The spacers are disposed beside the RRAM cell, wherein widths of top surfaces of the spacers are larger than or equal to widths of bottom surfaces of the spacers. The dielectric layer blanketly covers the substrate and sandwiches the RRAM cell, wherein the spacers are located in the dielectric layer. A method for forming the resistive random access memory (RRAM) structure is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Jen Wang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240057487
    Abstract: An RRAM includes a bottom electrode, a resistive switching layer and a top electrode. The bottom electrode includes an inverted T-shaped profile. The resistive switching layer covers the bottom electrode. The top electrode covers the resistive switching layer. The inverted T-shaped profile includes a bottom element and a vertical element. The vertical element is disposed on the bottom element. The shape of the vertical element includes a rectangle or a trapezoid.
    Type: Application
    Filed: September 6, 2022
    Publication date: February 15, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kai-Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Patent number: 11903334
    Abstract: A method of forming a memory device includes the following operations. A first conductive plug is formed within a first dielectric layer over a substrate. A treating process is performed to transform a portion of the first conductive plug into a buffer layer, and the buffer layer caps the remaining portion of the first conductive plug. A phase change layer and a top electrode are sequentially formed over the buffer layer. A second dielectric layer is formed to encapsulate the top electrode and the underlying phase change layer. A second conductive plug is formed within the second dielectric layer and in physical contact with the top electrode. A filamentary bottom electrode is formed within the buffer layer.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Jer-Fu Wang, Chao-Ching Cheng, Tzu-Chiang Chen
  • Publication number: 20240045919
    Abstract: A system for adding an external function to a webpage includes: one or more processors; and memory communicably connected to the one or more processors and storing instructions that, when executed by the one or more processors, cause the one or more processors to: receive code associated with the webpage from a remote server; identify a plurality of images in the code; filter the plurality of images to identify a first type of image different from other images of the plurality of images; and append the external function to the first type of image to display a modified webpage including the external function on a display device of a first user.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 8, 2024
    Inventors: Kristine Elizabeth Locker, Jerry Jen-Fu Wang, Kevin Chun-Hsin Lin
  • Patent number: 11882773
    Abstract: Provided are a resistive random access memory (RRAM) and a manufacturing method thereof. The resistive random access memory includes multiple unit structures disposed on a substrate. Each of the unit structures includes a first electrode, a first metal oxide layer, and a spacer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. The spacer is disposed on sidewalls of the first electrode and the first metal oxide layer. In addition, the resistive random access memory includes a second metal oxide layer and a second electrode. The second metal oxide layer is disposed on the unit structures and is connected to the unit structures. The second electrode is disposed on the second metal oxide layer.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 23, 2024
    Assignee: United Microelectronics Corp.
    Inventors: Kai Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240021226
    Abstract: In some aspects of the present disclosure, a memory array structure is disclosed. In some embodiments, the memory array structure includes a word array. In some embodiments, the word array stores an N-bit word. In some embodiments, the word array includes a plurality of first memory structures and a plurality of second memory structures. In some embodiments, each first memory structure includes a first transistor and a first memory element. In some embodiments, each second memory structure includes a second transistor and a plurality of second memory elements, each second memory element includes a first end and a second end, the first end of each second memory element is coupled to a corresponding bit line, and the second end of each second memory element is coupled to a first end of the second transistor.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Hung-Li Chiang, Jer-Fu Wang, Tzu-Chiang Chen, Meng-Fan Chang
  • Publication number: 20240011597
    Abstract: The present disclosure provides an accessory for a handheld device. The accessory includes a first base, a second base, a first flexible element and a second flexible element. The first flexible element and the second flexible element are respectively disposed at the first base. The first flexible element has a first track. The second flexible element has a second track. The second base has a fastener for engaging with the first track and the second track. The first flexible element is flexed based on sliding of the fastener along the first track. The second flexible element is flexed based on sliding of the fastener along the second track.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Inventors: CHING-FU WANG, JUI-CHEN LU, PO-WEN HSIAO, CHIA-HO LIN
  • Patent number: 11871685
    Abstract: A RRAM device includes a bottom electrode, a resistive material layer, a high work function layer, a top electrode, a hard mask and high work function sidewall parts. The bottom electrode, the resistive material layer, the high work function layer, the top electrode and the hard mask are sequentially stacked on a substrate. The high work function sidewall parts cover sidewalls of the top electrode and sidewalls of the hard mask, thereby constituting a RRAM cell. A method of forming said RRAM device is also provided.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: January 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Jen Wang, Chun-Hung Cheng, Chuan-Fu Wang