Abstract: Disclosed is a valve apparatus, including: one housing where a fluid is introduced and discharged; a first valve part provided inside the housing and configured to control flow of the fluid; a second valve part provided inside the housing such that the fluid is introduced into the second valve part from the first valve part, and configured to control flow of the fluid introduced from the first valve part; and a connection part configured to introduce the fluid discharged from the first valve part in the housing into the second valve part, wherein respective valve shaft directions of the first and second valve parts respectively are non-parallel to each other, and any one of respective valve shafts of the first and second valve parts is parallel to an axial direction of the connection part.

Abstract: A method of preparing a sintered solid electrolyte includes (a) coprecipitating a mixed solution including a lanthanum precursor, a zirconium precursor, a gallium precursor, a complexing agent, and a pH adjuster to provide a solid electrolyte precursor; (b) washing and drying the solid electrolyte precursor to provide a washed and dried solid electrolyte precursor; (c) mixing the washed and dried solid electrolyte precursor with a lithium source to provide a mixture; (d) calcining the mixture to provide a calcined solid electrolyte, which is a gallium (Ga)-doped lithium lanthanum zirconium oxide (LLZO), as represented by Chemical Formula 1 below, LixLayZrzGawO12,??Chemical Formula 1 where 5?x?9, 2?y?4, 1?z?3, and 0<w?4; and (e) sintering the calcined solid electrolyte at a temperature ranging from 1,000° C. to 1,300° C. to provide the sintered solid electrolyte, wherein a ratio (M1:M2) of moles (M1) of lithium element to moles (M2) of gallium element ranges from 6.7:0.1 to 5.8:0.4.

Abstract: A semiconductor die may include a first delay circuit formed on a substrate and configured to delay a test signal, the first delay circuit including first delay stages connected in series, a second delay circuit formed on the substrate and configured to delay the test signal, the second delay circuit including second delay stages connected in series, at least one through silicon via connected to at least one output terminal of output terminals of the first delay stages, the at least one through silicon via penetrating through the substrate, and a load determinator configured to compare a first delay signal output from one of the first delay stages with a second delay signal output from one of the second delay stages and determine a load of the at least one through silicon via.

Abstract: Materials for fabricating a thin film that has improved quality and productivity are provided. The materials may include a Group 5 element precursor of formula (1): M1 may be a Group 5 element, each of R1 to R10 independently may be a hydrogen atom, a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms, or f7onnula (2), R11 may be a substituted or unsubstituted alkyl group having 1 to 10 carbon atoms, and L1 may be an alkyl group, an alkylamino group, an alkoxy group or an alkylsilyl group, each of which may have 1 to 5 carbon atoms and may be substituted or unsubstituted. Formula (2) may have a structure of Each of Ra to Rc independently may be a substituted or unsubstituted alkyl group having 1 to 5 carbon atoms.

Abstract: A display device for a vehicle includes a stretchable display panel and a touch sensor on a first surface of the stretchable display panel and configured to sense a user's touch. The stretchable display panel includes a plurality of pixels and has a button display area and a display area adjacent the button display area. The stretchable display panel is integrally arranged on a center fascia of the vehicle that as a plurality of curved surfaces, and a step is defined between the button display area and the adjacent display area.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: A method of manufacturing a semiconductor device, the method including providing a metal precursor on a substrate to form a preliminary layer that includes a first metal; providing a reducing agent on the preliminary layer, the reducing agent including a compound that includes a second metal; and providing a reactant on the preliminary layer to form a metal-containing layer, wherein the second metal has multiple oxidation states, the second metal in the reducing agent having a lower oxidation state among the multiple oxidation states prior to providing the reducing agent on the preliminary layer.

Abstract: A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.

Abstract: A memory device includes a control logic circuit, a write data strobe signal divider, a data transceiver, and a memory cell array. The control logic circuit generates a reset signal before a write data strobe signal provided from a memory controller starts to toggle. The write data strobe signal divider generates internal write data strobe signals that toggle depending on toggling of the write data strobe signal, the internal write data strobe signals toggling with different phases, respectively. The control logic circuit initializes the internal write data strobe signals to given values in response to the reset signal. The data transceiver receives write data provided from the memory controller based on the internal write data strobe signals. The memory cell array stores the received write data.

Abstract: The present invention provides a strain of Pseudozyma churashimaensis RGJ1, which is isolated from a pepper plant and leads to induced systemic resistance against plant pathogens or plant viruses; a microbial preparation for controlling plant diseases or increasing plant yields, including, as an active ingredient, the strain or a culture thereof; a method for preparing the microbial preparation, including a step of culturing the strain; and a method for controlling plant diseases, including a step of performing dipping treatment, soil drenching treatment or spraying treatment onto aerial foliage for a plant seedling with the strain or the culture thereof.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: A method of manufacturing a semiconductor device includes providing a metal precursor on a substrate, and providing a reactant and a co-reactant to form a metal nitride layer by reaction with the metal precursor, the reactant being a nitrogen source, the co-reactant being an organometallic compound represented by Chemical Formula 1: M2?L1)n??[Chemical Formula 1] In Chemical Formula 1, M2 may be selected from Sn, In, and Ge, n may be 2, 3, or 4, and each L1 may independently be hydrogen, a halogen, or a group represented by Chemical Formula 2. In Chemical Formula 2, x may be 0, 1, 2, 3, 4, or 5 and y may be 0 or 1. When x is 0, y may be 1. R1, R2, R3, and R4 may each independently be hydrogen, an alkyl group having 1 to 5 carbons, or an aminoalkyl group having 1 to 5 carbons.

Abstract: A gas injector includes first and second gas introduction passages extending in a first direction toward a central axis of a process chamber respectively, a first bypass passage extending from the first gas introduction passage in a second direction that is substantially perpendicular to the first direction, a second bypass passage extending from the second gas introduction passage in a reverse direction to the second direction, a first distribution passage isolated from the first bypass passage in the first direction and extending from an outlet of the first bypass passage in the reverse direction to the second direction, a second distribution passage isolated from the second bypass passage in the first direction and extending from an outlet of the second bypass passage in the second direction, and a plurality of spray holes in an outer surface of the first and second distribution passages and configured to spray the process gas.

Abstract: A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.

Abstract: A method of manufacturing a semiconductor device includes forming first and second pattern structures on first and second regions of a substrate, respectively; forming a preparatory first interlayer insulating layer covering the first pattern structure on the first region; forming a preparatory second interlayer insulating layer covering the second pattern structure on the second region, the preparatory second interlayer insulating layer including first colloid; and converting the preparatory first and second interlayer insulating layers into first and second interlayer insulating layers, respectively, by annealing the preparatory first and second interlayer insulating layers.

Abstract: A method for processing medical examination data performed by a computing device, including determining a time interval that is last increased in a first repeating as an optimal time interval, configuring a feature matrix having a time axis according to the optimal time interval, and by using the feature matrix, setting a look-back window size to a predetermined initial size to obtain a performance evaluation result of the trained RNN-based model, second repeating increasing the look-back window size and then obtaining a second performance evaluation result of the RNN-based model trained according to the increased look-back window size until the second performance evaluation result is no longer improved, determining the look-back window size that is last increased in the second repeating as an optimal look-back window size and training the RNN-based model according to the optimal look-back window size by using the feature matrix having the optimal time interval.

Abstract: A method for treating a substrate includes a mixing step of preparing an ozone treatment fluid containing an ozone gas and a substrate treating step of treating a surface of the substrate using the ozone treatment fluid. In the substrate treating step, light is irradiated to the substrate by a lamp.

Abstract: A semiconductor die may include a first delay circuit formed on a substrate and configured to delay a test signal, the first delay circuit including first delay stages connected in series, a second delay circuit formed on the substrate and configured to delay the test signal, the second delay circuit including second delay stages connected in series, at least one through silicon via connected to at least one output terminal of output terminals of the first delay stages, the at least one through silicon via penetrating through the substrate, and a load determinator configured to compare a first delay signal output from one of the first delay stages with a second delay signal output from one of the second delay stages and determine a load of the at least one through silicon via.

Abstract: The present invention relates to new antibody-drug conjugates (ADCs) targeting ROR1, active metabolites of such ADCs, methods for preparation of such ADCs, uses for such ADCs in treatment and/or prevention of illnesses, and uses for such ADCs in production of drugs for treatment and/or prevention of diseases, more specifically diseases associated with over-expression of ROR1, for example cancer. More specifically, the present invention relates to an antibody-drug conjugate comprising an antibody that binds to ROR1 or an antigen-binding fragment thereof, and a pharmaceutical composition comprising the same.

Abstract: An electronic device is provided. The electronic device includes a memory and at least one processor configured to execute a first application among at least one application stored in the memory, determine whether to permit to provide meta information including information for accessing first data related to a first function of the first application stored in the memory based on first user information with which the first application is executed, and perform control as to whether to provide a virtual file system with the meta information about the first data.