Patents by Inventor Min Ryu

Min Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10916525
    Abstract: A semiconductor die may include a first delay circuit formed on a substrate and configured to delay a test signal, the first delay circuit including first delay stages connected in series, a second delay circuit formed on the substrate and configured to delay the test signal, the second delay circuit including second delay stages connected in series, at least one through silicon via connected to at least one output terminal of output terminals of the first delay stages, the at least one through silicon via penetrating through the substrate, and a load determinator configured to compare a first delay signal output from one of the first delay stages with a second delay signal output from one of the second delay stages and determine a load of the at least one through silicon via.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: February 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: SeungHan Woo, Je Min Ryu, Reum Oh, Moonhee Oh, BumSuk Lee
  • Publication number: 20210032621
    Abstract: The present disclosure relates to: an extended guide RNA and a composition for base editing, comprising the same; and a method for base editing and a method for producing genetically modified animals or plants, both methods using the composition for base editing.
    Type: Application
    Filed: January 23, 2019
    Publication date: February 4, 2021
    Inventors: Jin-Soo KIM, Ka Yeong LIM, Beum-Chang KANG, Seuk Min RYU
  • Patent number: 10882873
    Abstract: A tin compound, tin precursor compound for atomic layer deposition (ALD), a method of forming a tin-containing material film, and a method of synthesizing a tin compound, the tin compound being represented by Chemical Formula (I): wherein R1, R2, Q1, Q2, Q3, and Q4 are each independently a C1 to C4 linear or branched alkyl group.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: January 5, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., DNF Co., Ltd.
    Inventors: Seung-min Ryu, Youn-soo Kim, Jae-soon Lim, Youn-joung Cho, Myong-woon Kim, Kang-yong Lee, Sang-ick Lee, Sang-yong Jeon
  • Publication number: 20200385753
    Abstract: Provided are a base editing composition comprising deaminase and target-specific nuclease, a base editing method using the base editing composition, and a method for producing a genetically modified animal. The base editing composition has a base editing activity in mammalian embryos.
    Type: Application
    Filed: December 22, 2017
    Publication date: December 10, 2020
    Inventors: Jin-Soo KIM, Kyoung Mi KIM, Seuk Min RYU
  • Patent number: 10854754
    Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: December 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Soo Kim, Dong Hyun Roh, Koung Min Ryu, Sang Jin Hyun
  • Publication number: 20200361970
    Abstract: Described herein are metal compounds and methods of fabricating semiconductor devices using the same. The metal compounds include a material of Chemical Formula 1.
    Type: Application
    Filed: April 24, 2020
    Publication date: November 19, 2020
    Applicants: Samsung Electronics Co., Ltd., Adeka Corporation
    Inventors: SEUNG-MIN RYU, AKIO SAITO, TAKANORI KOIDE, ATSUSHI YAMASHITA, KAZUKI HARANO, GYU-HEE PARK, SOYOUNG LEE, JAESOON LIM, YOUNJOUNG CHO
  • Publication number: 20200357798
    Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 12, 2020
    Inventors: Sung Soo KIM, Gi Gwan PARK, Jung Hun CHOI, Koung Min RYU, Sun Jung LEE
  • Publication number: 20200350429
    Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Soo KIM, Dong Hyun ROH, Koung Min RYU, Sang Jin HYUN
  • Patent number: 10818657
    Abstract: There is provided a semiconductor device capable of adjusting profiles of a gate electrode and a gate spacer using a hybrid interlayer insulating film. The semiconductor device includes a gate electrode on a substrate, a gate spacer being on a sidewall of the gate electrode and including an upper portion and a lower portion, a lower interlayer insulating film being on the substrate and overlapping with the lower portion of the gate spacer, and an upper interlayer insulating film being on the lower interlayer insulating film and overlapping with the upper portion of the gate spacer, wherein the lower interlayer insulating film is not interposed between the upper interlayer insulating film and the upper portion of the gate spacer.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun-Ki Min, Koung-Min Ryu, Sang-Koo Kang
  • Patent number: 10768824
    Abstract: A stacked memory includes a logic semiconductor die, a plurality of memory semiconductor dies stacked with the logic semiconductor die, a plurality of through-silicon vias (TSVs) electrically connecting the logic semiconductor die and the memory semiconductor dies, a global processor disposed in the logic semiconductor die and configured to perform a global sub process corresponding to a portion of a data process, a plurality of local processors respectively disposed in the memory semiconductor dies and configured to perform local sub processes corresponding to other portions of the data process and a plurality of memory integrated circuits respectively disposed in the memory semiconductor dies and configured to store data associated with the data process.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: September 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hak-Soo Yu, Je-Min Ryu, Reum Oh, Pavan Kumar Kasibhatla, Seok-In Hong
  • Patent number: 10763254
    Abstract: A semiconductor device includes a substrate including a first region, and a second region, a first gate structure and a second gate structure on the substrate of the first region, a third gate structure and a fourth gate structure on the substrate of the second region, a first interlayer insulating film on the substrate of the first region and including a first lower interlayer insulating film and a first upper interlayer insulating film, a second interlayer insulating film on the substrate of the second region and including a second lower interlayer insulating film and a second upper interlayer insulating film, a first contact between the first gate structure and the second gate structure and within the first interlayer insulating film, and a second contact formed between the third gate structure and the fourth gate structure and within the second interlayer insulating film.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: September 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Soo Kim, Gi Gwan Park, Jung Hun Choi, Koung Min Ryu, Sun Jung Lee
  • Publication number: 20200273747
    Abstract: A method of manufacturing a semiconductor device, the method including providing a metal precursor on a substrate to form a preliminary layer that includes a first metal; providing a reducing agent on the preliminary layer, the reducing agent including a compound that includes a second metal; and providing a reactant on the preliminary layer to form a metal-containing layer, wherein the second metal has multiple oxidation states, the second metal in the reducing agent having a lower oxidation state among the multiple oxidation states prior to providing the reducing agent on the preliminary layer.
    Type: Application
    Filed: December 12, 2019
    Publication date: August 27, 2020
    Inventors: Seung-min RYU, Younsoo KIM, Gyu-hee PARK, Jaesoon LIM, Younjoung CHO
  • Publication number: 20200257365
    Abstract: Provided is an information output apparatus including one or more information output units, wherein each information output unit includes a coil arranged to be connected to a power source, such that a current flows in the coil; a base unit configured to accommodate the coil; and a driving indicator, which is arranged in the base unit to be apart from and close to the coil to be driven by a current flowing in the coil and is configured to move in a first direction toward the coil and a direction opposite thereto to rotate while being connected to the base unit and to move in a second direction crossing the first direction to be recognized by a user.
    Type: Application
    Filed: August 8, 2018
    Publication date: August 13, 2020
    Inventors: Dong Soo KWON, Han Byeol KIM, Dong Bum PYO, Se Min RYU, Byoung Kil HAN, Joon Yeong KIM, Ju Yoon KIM, Ji Ho KIM, Hyeon Cheol PARK
  • Patent number: 10727349
    Abstract: A semiconductor device includes an active fin on a substrate, a device isolation film covering a lower portion of the active fin, a gate structure covering the active fin and the device isolation film, and a gate spacer on a side wall of the gate structure, wherein a side wall of the gate structure disposed on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate structure to a bottom of the gate structure, and an inner side wall of the gate spacer on the device isolation film is inclined at a uniform inclination from a point higher than a half of a height of the gate spacer to a bottom of the gate spacer while forming an acute angle with a bottom surface of the gate spacer.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: July 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Soo Kim, Dong Hyun Roh, Koung Min Ryu, Sang Jin Hyun
  • Publication number: 20200231610
    Abstract: A tin compound, a tin precursor compound for forming a tin-containing layer, and a method of forming a thin layer, the tin compound being represented by Formula 1: wherein R1, R2, R3, R4, R5, R6, and R7 are each independently hydrogen, a linear alkyl group having 1 to 4 carbon atoms, or a branched alkyl group having 3 or 4 carbon atoms.
    Type: Application
    Filed: August 29, 2019
    Publication date: July 23, 2020
    Applicants: SAMSUNG ELECTRONICS CO., LTD., DNF Co., Ltd.
    Inventors: Seung-Min RYU, Myong Woon KIM, Younsoo KIM, Sang Ick LEE, Jaesoon LIM, Younjoung CHO, Jun Hee CHO, Won Mook CHAE
  • Publication number: 20200210003
    Abstract: A display device for a vehicle includes a stretchable display panel and a touch sensor on a first surface of the stretchable display panel and configured to sense a user's touch. The stretchable display panel includes a plurality of pixels and has a button display area and a display area adjacent the button display area. The stretchable display panel is integrally arranged on a center fascia of the vehicle that as a plurality of curved surfaces, and a step is defined between the button display area and the adjacent display area.
    Type: Application
    Filed: June 21, 2019
    Publication date: July 2, 2020
    Inventors: Jong Ho Hong, Da Young Ju, Keun Kyu Song, Jae Min Shin, Young Hoon Oh, Joon Hak Oh, Ji Min Ryu, So Yon Jeong, Hye Jin Joo, Ju Yeong Kwon
  • Patent number: 10671464
    Abstract: A memory device includes a command decoder and a status circuit. The command decoder decodes a command. The status circuit sequentially stores operation information of the memory device determined based on the decoded command and outputs at least one of the sequentially stored operation information in response to an output control signal.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moonhee Oh, Je Min Ryu, Reum Oh, Jaeyoun Youn
  • Patent number: 10651031
    Abstract: A tantalum compound, a method of forming a thin film, and a method of fabricating an integrated circuit device, the tantalum compound being represented by the following General Formula (I):
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: May 12, 2020
    Assignees: Samsung Electronics Co., Ltd., Adeka Corporation
    Inventors: Seung-min Ryu, Takanori Koide, Naoki Yamada, Jae-soon Lim, Tsubasa Shiratori, Youn-joung Cho
  • Publication number: 20200095317
    Abstract: The present disclosure relates to antibody-drug conjugates (ADCs) wherein one or more active agents are conjugated to an anti-CD19 antibody through a linker. The linker may comprise a unit that covalently links active agents to the antibody. The disclosure further relates to monoclonal antibodies and antigen binding fragments, variants, multimeric versions, or bispecifics thereof that specifically bind CD19, as well as methods of making and using these anti-CD19 antibodies and antigen-binding fragments thereof in a variety of therapeutic, diagnostic and prophylactic indications.
    Type: Application
    Filed: May 9, 2019
    Publication date: March 26, 2020
    Inventors: Ho Young Song, Yun Hee Park, Sung Min Kim, Hyoung Rae Kim, Ji Hye Oh, Hyun Min Ryu, Jeiwook Chae, Yeong Soo Oh, Yong Zu Kim, Maureen Deehan, Nicolas Fischer
  • Publication number: 20200091275
    Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.
    Type: Application
    Filed: July 24, 2019
    Publication date: March 19, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Youn-soo Kim, Seung-min Ryu, Chang-su Woo, Hyung-suk Jung, Kyu-ho Cho, Youn-joung Cho