Abstract: A semiconductor device a method of forming the same are provided. A semiconductor device includes a gate stack over a substrate. A first dielectric layer is over the gate stack. The first dielectric layer includes a first material. A second dielectric layer is over the first dielectric layer. The second dielectric layer includes a second material different from the first material. A first conductive feature is adjacent the gate stack. A second conductive feature is over and in physical contact with a topmost surface of the first conductive feature. A bottommost surface of the second conductive feature is in physical contact with a topmost surface of the second dielectric layer.

Abstract: A method includes forming a dummy gate stack on a semiconductor fin, forming gate spacers on sidewalls of the dummy gate stack, forming a first inter-layer dielectric, with the gate spacers and the dummy gate stack being in the first inter-layer dielectric, removing the dummy gate stack to form a trench between the gate spacers, forming a replacement gate stack in the trench, and depositing a dielectric capping layer. A bottom surface of the dielectric capping layer contacts a first top surface of the replacement gate stack and a second top surface of the first inter-layer dielectric. A second inter-layer dielectric is deposited over the dielectric capping layer. A source/drain contact plug is formed and extends into the second inter-layer dielectric, the dielectric capping layer, and the first inter-layer dielectric.

Abstract: A pixel package includes a base material, a circuit structure, light-emitting semiconductor elements, a non-light-emitting semiconductor element, and a light-transmitting adhesive layer. The base material has an upper surface, a lower surface, and a side surface. The circuit structure is buried in the base material and includes an first circuit layer exposed from the upper surface, bottom electrodes exposed from the lower surface, and a middle circuit layer between the upper circuit layer and the plurality of bottom electrodes and covered by the base material. The light-emitting semiconductor elements are on the upper surface and electrically connected to the circuit structure. The non-light-emitting semiconductor element is buried in the base material and directly connected to the middle circuit layer, and at least one outside surface is exposed. The light-transmitting adhesive layer covers the light-emitting semiconductor elements and is in direct contact with the base material.

Abstract: A semiconductor device including an embedded channel structure, a sidewall channel structure and a gate electrode structure is provided. The embedded channel structure is disposed on a substrate. The sidewall channel structure is disposed on the substrate, and located at a lateral side of the embedded channel structure. The gate electrode structure is disposed on the substrate, encircles the embedded channel structure and is located between the embedded channel structure and the sidewall channel structure.

Abstract: In an embodiment, a device includes: a first interconnect structure including metallization patterns; a second interconnect structure including a power rail; a device layer between the first interconnect structure and the second interconnect structure, the device layer including a first transistor, the first transistor including an epitaxial source/drain region; and a conductive via extending through the device layer, the conductive via connecting the power rail to the metallization patterns, the conductive via contacting the epitaxial source/drain region.

Abstract: A semiconductor device includes a substrate, nanostructures vertically suspended above the substrate, a metal gate structure wrapping each of the nanostructures, an epitaxial feature having a first sidewall in physical contact with end portions of the nanostructures, and an air gap disposed between the epitaxial feature and the metal gate structure. The air gap exposes the first sidewall of the epitaxial feature and the end portions of the nanostructures.

Abstract: Disclosed are a computer-implemented method, a system and a computer program product for model exploration. Model feature importance of each model of a plurality of models can be obtained, the plurality of models can be grouped into a plurality of model clusters based on the model feature importance of each model, and the model feature importance can be presented by box-plot or confidence interval.

Abstract: Techniques for automatically manufacturing mechanical parts are described. A first estimate of manufacturing cost for a first mechanical part is generated using a first machine learning model. In response to determining that the first estimate of manufacturing cost for the first mechanical part falls within a range of effectivity for the first machine learning model, a second estimate of manufacturing cost for the first mechanical part is generated using a second machine learning model. An expected cost error in the second estimate of manufacturing cost for the first mechanical part is determined, and upon determining that the expected cost error falls within a pre-determined acceptable range, automatic manufacturing of the first mechanical part is facilitated.

Abstract: A device includes a first semiconductor strip protruding from a substrate, a second semiconductor strip protruding from the substrate, an isolation material surrounding the first semiconductor strip and the second semiconductor strip, a nanosheet structure over the first semiconductor strip, wherein the nanosheet structure is separated from the first semiconductor strip by a first gate structure including a gate electrode material, wherein the first gate structure partially surrounds the nanosheet structure, and a first semiconductor channel region and a semiconductor second channel region over the second semiconductor strip, wherein the first semiconductor channel region is separated from the second semiconductor channel region by a second gate structure including the gate electrode material, wherein the second gate structure extends on a top surface of the second semiconductor strip.

Abstract: An interconnection structure includes a first conductive feature disposed in a dielectric material, a first etch stop layer disposed over the dielectric material, a first dielectric layer disposed over the first etch stop layer, and a second conductive feature extending through the first dielectric layer and the first etch stop layer and in electrical contact with the first conductive feature. The first etch stop layer includes a boron-based layer, and an oxygen-rich boron-containing layer in contact with the boron-based layer.

Abstract: A semiconductor structure includes a source/drain (S/D) feature disposed in a semiconductor layer, a metal gate stack (MG) disposed in a first interlayer dielectric (ILD) layer and adjacent to the S/D feature, a second ILD layer disposed over the MG, and an S/D contact disposed over the S/D feature. The semiconductor structure further includes an air gap disposed between a sidewall of a bottom portion of the S/D contact and the first ILD layer, where a sidewall of a top portion of the S/D contact is in direct contact with the second ILD layer.

Abstract: The invention generally relates to methods of removing potassium, rubidium, and/or cesium, selectively or in combination, from brines using tetrafluoroborates. Also disclosed are methods of producing potassium, rubidium, and/or cesium chlorides using ionic liquids and exchange media. This invention also generally relates to treated geothermal brine compositions containing reduced concentrations of silica, iron, and potassium compared to the untreated brines. Exemplary compositions of the treated brine contain a concentration of silica ranging from about 0 mg/kg to about 15 mg/kg, a concentration of iron ranging from about 0 mg/kg to about 10 mg/kg, and a concentration of potassium ranging from about 300 mg/kg to about 8500 mg/kg. Other exemplary compositions of the treated brines also contain reduced concentrations of elements like rubidium, cesium, and lithium.

Abstract: A head-mounted display device assembly and an external adjustment module are provided. The head-mounted display device assembly includes a head-mounted display device and the external adjustment module. The head-mounted display device has a first lens and a second lens corresponding to both eyes, and also has a driven mechanism. The first lens and the second lens are respectively coupled to the driven mechanism. The external adjustment module is used for assembling and electrically connecting to the head-mounted display device, and includes a driving element and a transmission element. In a coupling state, the transmission element is coupled to the driving element and the driven mechanism, and the driving element drives the driven mechanism via the transmission element to adjust a distance between the first lens and the second lens. In a separation state, at least one of the driving element and the driven mechanism is separated from the transmission element.

Abstract: An IC structure includes a source epitaxial structure, a drain epitaxial structure, a first silicide region, a second silicide region, a source contact, a backside via rail, a drain contact, and a front-side interconnection structure. The first silicide region is on a front-side surface, a first sidewall of the source epitaxial structure, and a second sidewall of the source epitaxial structure. The second silicide region is on a front-side surface of the drain epitaxial structure. The source contact is in contact with the first silicide region and has a protrusion extending past a backside surface of the source epitaxial structure. The backside via rail is in contact with the protrusion of the source contact. The drain contact is in contact with the second silicide region. The front-side interconnection structure is on a front-side surface of the source contact and a front-side surface of the drain contact.

Abstract: New platform technologies to actuate and sense force propagation in real-time for large sheets of cells are provided. In certain embodiments the platform comprises a device for the measurement of mechanical properties of cells or other moieties, where device comprises a transparent elastic or viscoelastic polymer substrate disposed on a rigid transparent surface; and a plurality of micromirrors disposed on or in said polymer substrate, wherein the reflective surfaces of the micromirrors are oriented substantially parallel to the surface of said polymer substrate. In certain embodiments the device comprises more than about 1,000,000, or more than about 10,000,000 micromirrors. In certain embodiments the micromirrors comprise a magnetic layer and/or a diffraction grating.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: Examples described herein provide a computer-implemented method that includes determining a kernel width for the machine learning model. The method further includes building a local interpretable linear model using the kernel width. The method further includes computing a contribution and confidence for a feature of the local interpretable linear model. The method further includes updating the local interpretable linear model to generate a final model and computing an overall confidence for the final model.

Abstract: In various embodiments, a Laser-actuated Supercritical Injector (LASI) is provided. This device provides high-speed fluidic jet injection into biological samples, such as cells, organs, and tissues (including skin). In certain embodiments the LASI devices exploit high-speed fluidic jets that are pushed by rapid bubble expansion in a fluid. The bubbles are formed when liquid confined in microcavities or holes are heated up to above the supercritical temperature of the fluid. This leads to the formation of a short but ultra-high vapor pressure (supercritical) fluid that ejects the fluid (and any cargo contained therein) out through microchannels. This jet penetrates a cell, organ or tissue juxtaposed to a surface containing the microchannels and the jet provide sufficient force to penetrate into the cell, tissue, or organ leading to effective deliver of a cargo.

Abstract: A semiconductor device including an etch stop layer and a method of forming is provided. The semiconductor device may include a source/drain region and a gate structure, wherein a first etch stop layer is over a conductive plug to a source/drain region and a second etch stop layer is over the gate structure. The first etch stop layer and the second etch stop layer may have different thicknesses. A dielectric layer may be formed over the first etch stop layer and the second etch stop layer, and contacts may be formed through the dielectric layer and the first and second etch stop layers.

Abstract: A method, computer program, and computer system are provided for training a machine learning model. A feature associated with training data derived from a dataset is identified. A machine learning model is generated based on the training data. At least a portion of the training data associated with maximizing an importance value associated with the identified feature is selected. The importance value corresponds to a need associated with the machine learning model. One or more weight values is assigned to the selected portion of the training data. The machine learning model is updated based on the assigned weight values.