Abstract: This application relates to novel bicyclic substituted sulfonylurea compounds and analogues, their manufacture, pharmaceutical compositions comprising them, and their use as medicaments for treating a disease associated with modulation of cytokines such as IL-1? and IL-18, modulation of NLRP3, or inhibition of the activation of NLRP3 or related components of the inflammatory process.

Abstract: An atomizing device and an aerosol generating device. The atomizing device comprises an oil storage bin, an atomizing mounting assembly, a heating atomizing assembly and a liquid intake adjusting member. The oil storage bin is internally provided with an air guide channel and an oil storage cavity used for storing an atomizable liquid. The heating atomizing assembly is mounted in the atomizing mounting assembly and is accommodated in the oil storage bin. A liquid guide channel is arranged between the heating atomizing assembly and the oil storage cavity. The liquid intake adjusting member is provided at a position in the liquid guide channel that is close to the heating atomizing assembly, is a thermosensitive metal sheet, and deforms upon sensing a change in the temperature of the heating atomizing assembly, so as to automatically adjust the magnitude of a liquid intake amount.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a first interconnect layer over a substrate, the first interconnect layer including a first conductive feature and a second conductive feature, forming a patterned mask on the first interconnect layer, one or more openings in the patterned mask overlaying the second conductive feature, recessing the second conductive feature through the one or more openings in the patterned mask, and forming a second interconnect layer over the first interconnect layer. The second interconnect layer includes a first via in contact with the first conductive feature and a second via in contact with the second conductive feature.

Abstract: Some embodiments relate to a semiconductor structure including a method for forming a semiconductor structure. The method includes forming a lower conductive structure within a first dielectric layer over a substrate. An upper dielectric structure is formed over the lower conductive structure. The upper dielectric structure comprises sidewalls defining an opening over the lower conductive structure. A first liner layer is selectively deposited along the sidewalls of the upper dielectric structure. A conductive body is formed within the opening and over the lower conductive structure. The conductive body has a bottom surface directly overlying a middle region of the lower conductive structure. The first layer is laterally offset from the middle region of the lower conductive structure by a non-zero distance.

Abstract: A semiconductor device structure and method for manufacturing the same are provided. The method includes forming a first resistive element over a substrate, and the first resistive element has a first sidewall extending in a first direction and a second sidewall opposite to the first sidewall and extending in the first direction. The method further includes forming a first conductive feature and a second conductive feature over and electrically connected to the first resistive element and forming a second resistive element over the first resistive element and spaced apart from the first resistive element in a second direction. In addition, the second resistive element is located between the first sidewall and the second sidewall of the first resistive element in a top view, and the first resistive element and the second resistive element are made of different nitrogen-containing materials.

Abstract: A preparation method for a corrosion-resistant coating of a reinforcing steel for marine concrete, comprising the steps: (1) pretreating the surface of a reinforcing steel; (2) preparing self-repairing corrosion microcapsules; (3) preparing a cathodic electrophoresis coating; (4) carrying out cathodic electrophoresis; and (5) curing. The electrophoresis coating of the present invention contains the self-repairing corrosion microcapsules, metal powder, and graphene oxide powder. The corrosion resistance of the coating is improved under the co-action of the self-repairing properties of the self-repairing microcapsules and cathodic protection. The corrosion-resistant coating has excellent adhesion and corrosion resistance, prolonging the service life of reinforcing steel. It is widely used for the protection of reinforcing steels for marine concrete, and also for the protection of metal structures in general environment.

Abstract: The invention discloses a corrosion resistant coating for marine engineering concrete and a preparation method thereof, the corrosion resistant coating being sprayed or brushed on the concrete surface after being uniformly mixed by component A and component B,wherein the component A is calculated by weight including: waterborne non-ionic epoxy resin, C10-C12 alkyl glycidyl ether, polyhedral oligomeric silsesquioxane, metal powder, magnesium aluminum hydrotalcite powder,dispersant,defoamer; and the component B is calculated by weight including: modified aromatic amine curing agent, C10-C12 alkyl glycidyl ether, self-healing micro capsules, leveling agent, antioxidant, adhesion promoter, and other additives.

Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.

Abstract: The present disclosure relates to the technical field of genetic engineering, in particular to a siRNA of an angiopoietin like 3 (ANGPTL3) and a use thereof. The inventor of the present disclosure targets to ANGPTL3 by designing an appropriate specific small interfering RNA sequence and a siRNA conjugate, and reduce the expression of an ANGPTL3 protein by degrading a transcript of an ANGPTL3 gene in a cell. Therefore, the siRNA provided in the present disclosure may be used to prevent and/or treat a dyslipidemia disease.

Abstract: A method of preparing a calcined hydrogenolysis/hydrogenation catalyst includes mixing a copper-containing material, manganese-containing material, sodium aluminate, and water to obtain an aqueous slurry; contacting the aqueous slurry with a caustic material to form a precipitate in a caustic aqueous slurry; removing the precipitate from the caustic aqueous slurry; and removing residual water from the precipitate to form a dried precipitate; calcining the dried precipitate to form the calcined hydrogenolysis/hydrogenation catalyst exhibiting a Brunauer-Emmett-Teller (“BET”) surface area of about 5 m2/g to about 75 m2/g. The calcined hydrogenolysis/hydrogenation catalyst may include a spinel structure crystallite size of about 15 nm or less. The calcined hydrogenolysis/hydrogenation catalyst may include a tenorite crystallite size of about 20 nm to 30 nm.

Abstract: An atomizing unit, an atomizing assembly and an atomizing device having high strength. The atomizing unit comprises a support and a heating member. The heating member comprises a heating portion, one side of the heating portion is concave and the other side thereof is arched. The concave side of the heating portion and a cavity of the support define a containing chamber for accommodating a liquid conducting member, so as to allow an airflow to be blown to the arched side of the heating portion to take atomized gas out. In the atomizing unit, the atomizing assembly and the atomizing device, the arched side of the heating member is better adapted to the airflow flowing, so that heat from an atomizing surface can be more uniform, the heating member is not easily deformed, and a liquid conducting material is in good direct contact with the heating member.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate including a semiconductor material. The semiconductor device includes a conduction channel of a transistor disposed above the substrate. The conduction channel and the substrate include a similar semiconductor material. The semiconductor device includes a source/drain region extending from an end of the conduction channel. The semiconductor device includes a dielectric structure. The source/drain region is electrically coupled to the conduction channel and electrically isolated from the substrate by the dielectric structure.

Abstract: A semiconductor device includes a substrate, a dielectric layer, a source region, a drain region, and a metal structure. The substrate has a trench therein, and the dielectric layer is conformally formed over the substrate and the trench. The source region and the least one drain region are in the substrate. The metal structure is filled in the trench and surrounded by the dielectric layer, and the metal structure is disposed between the source region and the drain region. Moreover, the metal structure has a first metal portion and a second metal portion which has a height greater than a height of the first metal portion, and the first metal portion is disposed between the drain region and the second metal portion.

Abstract: An integrated circuit includes a trench gate MOSFET including MOSFET cells. Each MOSFET cell includes an active trench gate in an n-epitaxial layer oriented in a first direction with a polysilicon gate over a lower polysilicon portion. P-type body regions are between trench gates and are separated by an n-epitaxial region. N-type source regions are located over the p-type regions. A gate dielectric layer is between the polysilicon gates and the body regions. A metal-containing layer contacts the n-epitaxial region to provide an anode of an embedded Schottky diode. A dielectric layer over the n-epitaxial layer has metal contacts therethrough connecting to the n-type source regions, to the p-type body regions, and to the anode of the Schottky diode.

Abstract: The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

Abstract: A polishing pad conditioning apparatus includes a base, a fiber, and a polymer protruding from a surface of the base and encompassing the fiber.

Abstract: Disclosed are a pyrazolo[1,5-a]pyridine compound, a preparation method therefor and a use thereof. Also disclosed is a pharmaceutical composition containing the compound as an active ingredient or a pharmaceutically acceptable salt thereof. The present invention further relates to the use of a compound of formula (I) for treating and preventing diseases that can be treated with wild-type, gene fusion-type and mutant (including but not limited to G804 and G810) RET kinase inhibitors, including diseases or conditions mediated by an RET kinase.

Abstract: An electrical female terminal for mating with a connector assembly generally including a main body, a two-bodied spring, and a wire fastening portion. A protrusion extends from an unattached end portion of the lever member, the protrusion having faces angled relative to each other to efficiently deflect the lever member upwards when the protrusion interacts with an internal protrusion of a housing or a connector assembly. A top portion of the retainer member of the electrical female terminal, located above the two-bodied spring, has a dimple portion. The terminal face or leading end portion of the electrical female terminal is prevented from damaging or cutting a silicone seal. The overstress feature of the tang member of the lever is improved upon by relocating and reshaping the protruding member thereof. The configuration or shape of the cross-section across the upper portion and the support member at the front end portion of the main body of the electrical female terminal is substantially U-shaped.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

Abstract: A bidirectional electrostatic discharge protection device includes a first transient voltage suppressor chip, a second transient voltage suppressor chip, a first conductive wire, and a second conductive wire. The first transient voltage suppressor chip includes a first diode and a first bipolar junction transistor. The first diode and the first bipolar junction transistor are electrically connected to a first pin. The second transient voltage suppressor chip includes a second diode and a second bipolar junction transistor. The second diode and the second bipolar junction transistor are electrically connected to a second pin. The first conductive wire is electrically connected between the first diode and the second bipolar junction transistor. The second conductive wire is electrically connected between the second diode and the first bipolar junction transistor.