Patents by Inventor Rajesh

Rajesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080181043
    Abstract: Various embodiments of the invention may use one or more programmable non-volatile registers in each memory device to provide a separate device address for that device. These registers may be programmed at various points in the manufacturing and distribution cycle, such as but not limited to the memory chip factory, an original equipment manufacturer (OEM), or in the field. In some embodiments, other types of information (e.g., configuration information for the memory device) may also be programmed in this manner.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventor: Rajesh Sundaram
  • Patent number: 7406396
    Abstract: The present invention is an online methodology for end point detection for use in a chemical mechanical planarization process which is both robust and inexpensive while overcoming some of the drawbacks of the existing end point detection approaches currently known in the art. The present invention provides a system and method for identifying a significant event in a chemical mechanical planarization process including the steps of decomposing coefficient of friction data acquired from a chemical mechanical planarization process using wavelet-based multiresolution analysis, and applying a sequential probability ratio test for variance on the decomposed data to identify a significant event in the chemical mechanical planarization process.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: July 29, 2008
    Assignee: University of South Florida
    Inventors: Tapas K Das, Rajesh Ganesan, Arun K Sikder, Ashok Kumar
  • Patent number: 7406583
    Abstract: An autonomic computing environment is provided by sequestering one of a plurality of processor resources, partitioning a memory, and hiding an input/output (I/O) device. One processor resource is sequestered such that the sequestered processor resource is not exposed to the remaining processor resources as a processor resource. A memory region is partitioned to provide a service processing portion such that the sequestered processor resource has access to all of the memory region and the remaining processor resources have access to at least a portion of the memory region but do not have access to the service processing portion. A first I/O device is hidden such that the sequestered processor resource has access to the first I/O device and the remaining processor resources do not have access to the first I/O device.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: July 29, 2008
    Assignee: Intel Corporation
    Inventors: Ulhas Warrier, Rajesh S. Madukkarumukumana
  • Patent number: 7406098
    Abstract: A method and apparatus for allocating and using a resource to transmit wireless information signals to a plurality of subscriber units wherein application flows are selected based on associated Quality of Service (QoS) requirements. Compensation factors are evaluated for a plurality of QoS requirements. For a violation of a given QoS requirement, the corresponding compensation factor is calculated and applied to an adaptive weight, else the compensation factor is set to a default value.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: July 29, 2008
    Assignee: QUALCOMM Incorporated
    Inventors: Mukesh Taneja, Rajesh Pankaj
  • Patent number: 7405806
    Abstract: A maskless lithography system is disclosed that includes a spatial light modulator, first and second imaging areas, and first folding optics. The spatial light modulator receives illumination from an illumination source and provides a modulated illumination beam having a first cross-sectional line length in a length-wise direction and a first cross-sectional width in a width-wise direction that is substantially smaller than said first cross-sectional length. The first imaging area receives a first portion of the modulated illumination beam. The first folding optics provides a second portion of the modulated illumination beam that is adjacent the first portion of the modulated illumination beam in the length-wise direction at a second imaging area that is not adjacent the first imaging area in the length-wise direction.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: July 29, 2008
    Assignee: Massachusetts Institute of Technology
    Inventors: Rajesh Menon, Henry I. Smith
  • Publication number: 20080175243
    Abstract: The present invention relates to a method for configuring a policy management protocol for a web crawler, the method further comprising the steps of determining a web space that is to be crawled by a web crawler, wherein the web space is comprised of an IP address and/or a range of IP addresses, and determining additional hostnames that are associated with the IP address and/ range of IP addresses. The method further comprises the steps of configuring the web crawler to crawl the IP address and/ range of IP addresses, and determine additional hostnames that are associated with the IP address or range of IP addresses, and performing a web crawling function upon the determined additional hostnames by the web crawler.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 24, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Varun Bhagwan, Rajesh M. Desai, Piyoosh Jalan
  • Publication number: 20080176760
    Abstract: A method is provided for identifying and isolating peptides capable of binding of inorganic materials such as silica, silver, germanium, cobalt, iron, or oxides thereof, or other materials on a nanometric scale such as carbon nanotubes, using a combinatorial phage display peptide library and a polymerase-chain reaction (PCR) step to obtain specific amino acids sequences. In the method of the invention, a combinatorial phage display library is used to isolate and select the desired binding peptides by a series of steps of target binding of phage with the nanometric material of interest, elution and purification of the bound phages, and amplification using PCR to determine the sequences of phages producing the desired binding peptides. The binding peptides of the invention are particularly advantageous in that they may be used as templates to guide the development of useful structures on a nanometric scale.
    Type: Application
    Filed: March 27, 2008
    Publication date: July 24, 2008
    Inventors: Rajesh R. Naik, Morley O. Stone, Daniel C. Carter
  • Publication number: 20080176371
    Abstract: A method forms a nonvolatile memory device using a semiconductor substrate. A charge storage layer is formed overlying the semiconductor substrate and a layer of gate material is formed overlying the charge storage layer to form a control gate electrode. A protective layer overlies the layer of gate material. Dopants are implanted into the semiconductor substrate and are self-aligned to the control gate electrode on at least one side of the control gate electrode to form a source and a drain in the semiconductor substrate on opposing sides of the control gate electrode. The protective layer prevents the dopants from penetrating into the control gate electrode. The protective layer that overlies the layer of gate material is removed. Electrical contact is made to the control gate electrode, the source and the drain. In one form a select gate is also provided in the memory device.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: Rajesh Rao, Ramachandran Muralidhar
  • Publication number: 20080175162
    Abstract: In one embodiment, a router examines an incoming packet for a flow monitoring request. The router may examine every packet for the flow monitoring request, or preferably may only examine packets including a lifetime value indicating that the packet should be dropped and not forwarded or may only examine packets having a predetermined message format. When the flow monitoring request is included, the router performs detailed flow analysis or other monitoring according to the flow monitoring request.
    Type: Application
    Filed: January 24, 2007
    Publication date: July 24, 2008
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Daniel G. Wing, Robert J. Biskner, Rajesh Kumar, Mohamed S. Mostafa
  • Publication number: 20080177978
    Abstract: Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.
    Type: Application
    Filed: November 5, 2007
    Publication date: July 24, 2008
    Applicant: Virident Systems Inc.
    Inventors: Vijay Karamcheti, Kenneth A. Okin, Kumar Ganapathy, Ashish Singhai, Rajesh Parekh
  • Publication number: 20080176770
    Abstract: A composition for treating a portion of a wellbore or a portion of a subterranean formation is provided, the composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted to be within an appropriate range for the type of activator. A method for treating a portion of a wellbore or a portion of a subterranean formation, the method comprising the steps of: forming or providing a composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted within an appropriate range for the type of activator; and introducing the composition through a wellbore to treat a portion of a wellbore or a portion of a subterranean formation. The activator can be a water-soluble alkanoyl-donor compound or a chelated transition metal. Preferably, the composition further comprises an iron chelating agent.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: Michael W. Sanders, Jeffrey L. Mundy, Fong Fong Foo, Rajesh K. Saini
  • Publication number: 20080173452
    Abstract: A composition for treating a portion of a wellbore or a portion of a subterranean formation is provided, the composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted to be within an appropriate range for the type of activator. A method for treating a portion of a wellbore or a portion of a subterranean formation, the method comprising the steps of: forming or providing a composition comprising: (a) water; (b) a source of hydrogen peroxide, and (c) an activator for the source of hydrogen peroxide; wherein the pH of the composition is adjusted within an appropriate range for the type of activator; and introducing the composition through a wellbore to treat a portion of a wellbore or a portion of a subterranean formation. The activator can be a water-soluble alkanoyl-donor compound or a chelated transition metal. Preferably, the composition further comprises an iron chelating agent.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: Michael W. Sanders, Jeffrey L. Mundy, Fong Fong Foo, Rajesh K. Saini
  • Patent number: 7403970
    Abstract: A virtual address is configured. A destination address and a capability information associated with each destination entity of a set of destination entities associated with a destination party are configured. Each destination entity from the set of destination entities is a push-capable, text-message-capable entity. Each destination entity from the set of destination entities is associated with a virtual address. The virtual address defines a destination remote from the destination party and remote from premises associated with the destination party.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: July 22, 2008
    Assignee: Verisign, Inc.
    Inventors: Sanjay Kamble, Vikas Sanathana Murthy, Julian Philips, Rajesh Tanamala Srinivas Reddy
  • Patent number: 7402524
    Abstract: The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region, wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer, and subjecting the exposed nitridated, high voltage dielectric to a high vacuum to remove the accelerant residue.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: July 22, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, Rajesh Khamankar, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery, Mark H. Somervell
  • Publication number: 20080171362
    Abstract: The present invention provides polynucleotides encoding clot-specific streptokinase proteins possessing altered plasminogen characteristics, including enhanced fibrin selectivity. The kinetics of plasminogen activation by these proteins are distinct from those of natural streptokinase, in that there is a temporary delay or lag in the initial rate of catalytic conversion of plasminogen to plasmin. Also disclosed are processes for preparing the proteins.
    Type: Application
    Filed: July 23, 2007
    Publication date: July 17, 2008
    Inventors: Girish Sahni, Rajesh Kumar, Chiati Roy, Kammara Rajagopal, Deepak Nihalani, Vasudha Sundaram, Mahavir Yadav
  • Publication number: 20080171359
    Abstract: The invention provides isolated Y. lipolytica cells and substantially pure cultures of Y. lipolytica cells containing exogenous nucleic acids encoding EH polypeptides, e.g., enantioselective EH polypeptides. Also featured by the invention are methods for the production of the EH polypeptides and methods for hydrolysing epoxides and for producing optically active vicinal diols and/or optically active epoxides. Also embodied by the invention are efficient integrative expression vectors.
    Type: Application
    Filed: October 15, 2007
    Publication date: July 17, 2008
    Applicant: Oxyrane (UK) Ltd.
    Inventors: Adriana Leonora Botes, Michel Labuschagne, Robyn Roth, Robin Kumar Mitra, Jeanette Lotter, Rajesh Lalloo, Deepak Ramduth, Neeresh Rohitlall, Clinton Simpson, Petrus Van Zyl
  • Publication number: 20080169282
    Abstract: Apparatus and methods for achieving uniform heating or cooling of a substrate during a rapid thermal process are disclosed. More particularly, apparatus and methods for controlling the temperature of an edge ring supporting a substrate and/or a reflector plate during a rapid thermal process to improve temperature uniformity across the substrate are disclosed, which include a thermal mass or plate adjacent the edge ring to heat or cool the edge ring.
    Type: Application
    Filed: March 25, 2008
    Publication date: July 17, 2008
    Inventors: KHURSHED SORABJI, Alexander N. Lerner, Joseph M. Ranish, Aaron M. Hunter, Bruce Adams, Mehran Behdjat, Rajesh S. Ramanujam
  • Publication number: 20080170842
    Abstract: The present invention provides apparatus and methods for achieving uniform heating to a substrate during a rapid thermal process. More particularly, the present invention provides apparatus and methods for controlling the temperature of an edge ring supporting a substrate during a rapid thermal process to improve temperature uniformity across the substrate.
    Type: Application
    Filed: January 15, 2007
    Publication date: July 17, 2008
    Inventors: AARON MUIR HUNTER, Bruce E. Adams, Mehran Behdjat, Rajesh S. Ramanujam, Joseph M. Ranish
  • Publication number: 20080172716
    Abstract: Customizable software provides assurances about the ability of an IP network to satisfy security, regulatory and availability requirements by comprehensive vulnerability and compliance assessment of IP networks through automated analysis of configurations of devices such as routers, switches, and firewalls. The solution comprises three main approaches for testing of IP device configurations to eliminate errors that result in vulnerabilities or requirements compliance issues. The first two fall in to the “static constraint validation” category since they do not change significantly for each IP network, while the last approach involves incorporation of each specific IP network's policies/requirements. These approaches are complementary, and may be used together to satisfy all the properties described above. The first approach involves checking the configurations of devices for conformance to Best-Current-Practices provided by vendors (e.g.
    Type: Application
    Filed: September 12, 2007
    Publication date: July 17, 2008
    Inventors: Rajesh Talpade, Sanjai Narain, Yuu-Heng Cheng, Alexander Poylisher
  • Publication number: 20080172189
    Abstract: A method includes receiving a first set of parameters associated with a subset of a plurality of die on a wafer subjected to testing. The first set of data is expanded to generate estimated values for the first set of parameters for at least one untested die not included in the subset. A die health metric is determined for at least a portion of the plurality of die based on the first set of parameters including the estimated values.
    Type: Application
    Filed: January 16, 2007
    Publication date: July 17, 2008
    Inventors: Daniel Kadosh, Gregory A. Cherry, Carl Bowen, Luis De La Fuente, Rajesh Vijayaraghavan