Patents by Inventor Sang-Don Lee

Sang-Don Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7888206
    Abstract: A method for manufacturing a semiconductor device includes forming a recess with a device separating film and a first hard mask layer so that a pad nitride film for defining a recess gate region may remain with a conventional mask. The method additionally the recess gate region to facilitate a subsequent process for etching a gate electrode without a step difference between the device separating film.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: February 15, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Publication number: 20110008941
    Abstract: A method for fabricating a semiconductor device, including (a) etching a semiconductor substrate to form a first trench defining an active region; (b) forming a first spacer on sidewalls of the first trench; (c) etching a bottom of the first trench to form a second trench; (d) etching a sidewall of the second trench to form a third trench including an undercut space; (e) forming a device isolation structure that fills the first, second and third trenches; (f) etching the semiconductor substrate of a gate region to form a recess; and (g) forming a gate that fills the recess.
    Type: Application
    Filed: September 13, 2010
    Publication date: January 13, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sang Don LEE, Jae Goan Jeong
  • Publication number: 20100322754
    Abstract: Disclosed are a substrate alignment apparatus precisely and automatically aligning a mask on a substrate by sequentially moving the substrate and the mask horizontally on a susceptor being driven up and down, a substrate processing apparatus including the same, and a substrate alignment method. The substrate alignment apparatus includes a position fixing unit protruding from an upper surface of the susceptor driven up and down in a chamber so as to form a reference line for alignment of the substrate and the mask, a horizontal transfer unit connected at outer surfaces of two sidewalls of the chamber and extended into the chamber to align the substrate and the mask according to the up and down movement of the susceptor until the substrate and the mask are stopped by the position fixing unit from horizontally moving, and a control unit adapted to control the susceptor and the horizontal transfer unit.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 23, 2010
    Inventors: Sang Don LEE, Chi Wook YU
  • Publication number: 20100300221
    Abstract: A method and apparatus for generating a standardized surface contaminated by an aerosol deposited on its surface is described. Aerosols are propelled horizontally onto a vertical surface. The standardized contaminated surface is used to evaluate the effectiveness of cleaning and removing techniques.
    Type: Application
    Filed: June 2, 2009
    Publication date: December 2, 2010
    Inventors: Sang Don Lee, Shawn P. Ryan, Emily G. Snyder
  • Patent number: 7816730
    Abstract: A semiconductor device comprises a fin-type active region defined by a semiconductor substrate having a device isolation structure, a recess formed over the fin-type active region, and a gate electrode including a silicon germanium (Si1-xGex) layer for fill the recess (where 0<X<1 and X is a Ge mole fraction).
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: October 19, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Patent number: 7795670
    Abstract: The semiconductor device includes an active region, a recess channel region, a storage node junction region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate, wherein a lower part of sidewalls of the active region is recessed. The recess channel is formed in the semiconductor substrate under the active region, wherein the recess channel has a vertical channel region and a horizontal channel region. The storage node junction region is formed over the device isolation structure and the semiconductor substrate. The gate insulating film is formed over the active region including the recess channel region. The gate electrode is formed over the gate insulating film to fill up the recess channel region.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: September 14, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sang Don Lee, Jae Goan Jeong
  • Patent number: 7785969
    Abstract: A method for forming a semiconductor device of the present invention solves problems in a process for forming a fin type gate including a recess region, such as, a complicated process, low production margin, and difficulty in forming an accurate fin shape. In a process for forming an isolation dielectric film defining an active region, a nitride film pattern is formed in such a manner that the size of the nitride film is adjusted according to line width of a fin portion in a fin type active region formed in a subsequent process step, and an isolation dielectric film is formed in every region except for the nitride film pattern of a semiconductor substrate. Then, a recess is etched, and the isolation dielectric film is removed from a region where the line width of the nitride film pattern was reduced to a certain degree.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: August 31, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Publication number: 20100197123
    Abstract: A semiconductor device includes a device isolation structure formed on a semiconductor substrate to define an active region. A first Si-based epitaxial pattern is formed over the active region corresponding to a bit line contact region and a portion of a gate region at both sides adjacent to the bit line contact region. A second Si-based epitaxial layer is formed over the semiconductor substrate which is stepped up on the first Si-based epitaxial pattern. A stepped gate pattern is formed over the stepped second Si-based epitaxial layer.
    Type: Application
    Filed: January 25, 2010
    Publication date: August 5, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Publication number: 20100190305
    Abstract: A method for forming a semiconductor device of the present invention solves problems in a process for forming a fin type gate including a recess region, such as, a complicated process, low production margin, and difficulty in forming an accurate fin shape. In a process for forming an isolation dielectric film defining an active region, a nitride film pattern is formed in such a manner that the size of the nitride film is adjusted according to line width of a fin portion in a fin type active region formed in a subsequent process step, and an isolation dielectric film is formed in every region except for the nitride film pattern of a semiconductor substrate. Then, a recess is etched, and the isolation dielectric film is removed from a region where the line width of the nitride film pattern was reduced to a certain degree.
    Type: Application
    Filed: April 6, 2010
    Publication date: July 29, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Sang Don Lee
  • Patent number: 7718493
    Abstract: A method for forming a semiconductor device of the present invention solves problems in a process for forming a fin type gate including a recess region, such as, a complicated process, low production margin, and difficulty in forming an accurate fin shape. In a process for forming an isolation dielectric film defining an active region, a nitride film pattern is formed in such a manner that the size of the nitride film is adjusted according to line width of a fin portion in a fin type active region formed in a subsequent process step, and an isolation dielectric film is formed in every region except for the nitride film pattern of a semiconductor substrate. Then, a recess is etched, and the isolation dielectric film is removed from a region where the line width of the nitride film pattern was reduced to a certain degree.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: May 18, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Publication number: 20100117149
    Abstract: The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower part of sidewalls thereof and a recess channel region formed in the semiconductor substrate under the active region. A method for fabricating the semiconductor device includes forming a device isolation structure in a semiconductor substrate to form an active region having a recess region at a lower part of sidewalls thereof, a gate insulating film formed over the semiconductor substrate including the recess channel region, and a gate electrode formed over the gate insulating film to fill up the recess channel region.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Patent number: 7711290
    Abstract: A developer agitator of an image forming device capable of improving the electrification rate of a developer is disclosed. The developer agitator includes a rotatable shaft and an agitating wing disposed on the circumferential surface of the shaft. The agitating wing has an uneven part formed to increase the contact area with a developer. The developer agitator can obtain an electrification rate of the developer required for high speed printing, thereby allowing the image forming device to be operated at a high speed.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-don Lee, Jin-geun Kwak
  • Patent number: 7692251
    Abstract: Disclosed herein is a transistor for a semiconductor device and a method of forming the same. According to the present invention, a novel transistor structure combining a plane channel transistor and a fin-type channel transistor formed on the semiconductor substrate is provided to secure a sufficient channel width as compared to that of the plane channel transistor, thereby satisfying drive current regulated for the transistor.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: April 6, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Patent number: 7691699
    Abstract: Disclosed herein is a transistor for a semiconductor device and a method of forming the same. According to the present invention, a recess channel region is formed on a cell region to increase a channel length and a fin-type channel region is simultaneously formed on a peripheral circuit region to increase a channel area so as to simplify process steps, thereby improving the yield and productivity for manufacturing a semiconductor device.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: April 6, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Publication number: 20100072541
    Abstract: The semiconductor device includes an active region, a recess channel region including vertical channel structures, a gate insulating film, and a gate structure. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess channel region is formed in the active region. The vertical silicon-on-insulator (SOI) channel structures are disposed at sidewalls of both device isolation structures in a longitudinal direction of a gate region. The gate insulating film is disposed over the active region including the recess channel region. The gate structure is disposed over the recess channel region of the gate region.
    Type: Application
    Filed: September 21, 2009
    Publication date: March 25, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sung Woong Chung, Sang Don Lee
  • Patent number: 7683406
    Abstract: The present invention is related to semiconductor device and method for manufacturing the same. In accordance with the semiconductor device and method for manufacturing the same, at least one opening extending between LDD regions and exposing a buried insulating layer is formed so that a gate electrode surrounds the surface of a channel region. This structure allows the formation of a relatively a thick channel region and decreases the sensitivity of characteristics of the device dependent upon the thickness of the channel region.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: March 23, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Patent number: 7675112
    Abstract: The semiconductor device includes a device isolation structure, a surrounded channel structure, and a gate electrode. The device isolation structure is formed in a semiconductor substrate to define an active region. The surrounded channel structure connecting source/drain regions is separated from the semiconductor substrate under the active region by a given distance. The gate electrode surrounds the surrounded channel structure.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 9, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sang Don Lee
  • Publication number: 20100048008
    Abstract: A method for manufacturing a semiconductor device includes forming a recess with a device separating film and a first hard mask layer so that a pad nitride film for defining a recess gate region may remain with a conventional mask. The method additionally the recess gate region to facilitate a subsequent process for etching a gate electrode without a step difference between the device separating film.
    Type: Application
    Filed: October 26, 2009
    Publication date: February 25, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventor: Sang Don LEE
  • Publication number: 20100025740
    Abstract: A method for fabricating a semiconductor device comprises forming a partial-insulated substrate comprising an insulating region located below both a channel region of a cell transistor and one of a storage node contact region and a bit line contact region, and forming a cell transistor comprising a fin region on the partial-insulated substrate.
    Type: Application
    Filed: December 29, 2008
    Publication date: February 4, 2010
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventor: Sang Don Lee
  • Publication number: 20100027362
    Abstract: A semiconductor memory device includes a first cell array including a plurality of unit cells and a bit line sense amplifying unit for sensing and amplifying data signals stored in the unit cells. Each unit cell is provided with a PMOS transistor and a capacitor. Therefore, the semiconductor memory device efficiently operates with low voltage without any degradation of operation speed.
    Type: Application
    Filed: October 13, 2009
    Publication date: February 4, 2010
    Inventors: Hee-Bok KANG, Jin-Hong AHN, Sang-Don LEE