Abstract: A collapsible hammock frame having approximately parallel and spaced apart base members and pivotably attached uprights that define head and foot suspension points from which a hammock may be suspended. The uprights and base members fold into a completely collapsible configuration that can be easily carried and transported, and unfolded into a working configuration without the assembly of separate parts.

Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.

Abstract: A downloadable postage rate calculating device including a platform for receiving a parcel and providing a weight for the parcel, and a processor configured to receive current rates information downloaded from a computer or other similar device. The processor calculates a postage amount for the parcel based on at least a portion of the current rates information and the weight of the parcel. The processor can also compare the postage amount for a first carrier and shipping method, with that of a second carrier and shipping method, or between two shipping methods offered by the same carrier.

Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

Abstract: The invention includes a method of forming a conductive interconnect. An electrical node location is defined to be supported by a silicon-containing substrate. A silicide is formed in contact with the electrical node location. The silicide is formed by exposing the substrate to hydrogen, TiCl4 and plasma conditions to cause Ti from the TiCl4 to combine with silicon of the substrate to form TiSix. Conductively doped silicon material is formed over the silicide. The conductively doped silicon material is exposed to one or more temperatures of at least about 800° C. The silicide is also exposed to the temperatures of at least about 800° C.

Abstract: A capacitor structure is formed over a semiconductor substrate by atomic layer deposition to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided.

Abstract: An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same are disclosed. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element. An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.

Abstract: A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

Abstract: Various aspects of the invention provide methods of manufacturing probe cards and test systems which may test microelectronic components using such probe cards. In one specific example, a probe card may be manufactured by forming a plurality of blind holes in a substrate, with each hole having a closed bottom spaced from a back of the substrate by a back thickness. An electrically conductive metal may be deposited on the substrate to fill the holes and define an overburden on the substrate. The metal in each hole may define a conductor. At least a portion of the overburden may be removed to electrically isolate each of the conductors from one another. A portion of the substrate including the back thickness is removed to define an array of pins extending outwardly from a remaining thickness of the substrate, with each pin being an exposed length of one of the conductors.

Abstract: The invention includes atomic layer deposition methods and chemical vapor deposition methods. In a particular aspect of the invention, a source of microwave radiation is provided proximate a reaction chamber. At least a fragment of a precursor material is chemisorbed on a substrate within the reaction chamber while not exposing the precursor material to microwave radiation from the source. Excess precursor material is removed from the chamber, and the chemisorbed material is subsequently exposed to microwave radiation from the source within the reaction chamber.

Abstract: A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal signal transmission system, and a physical structure for supporting a terminal contact system of the package component. The package component also includes an encapsulant on the base die encapsulating the interconnect contacts, an underfill layer between the dice, and terminal contacts configured for flip chip mounting the package component to a supporting substrate. A method for fabricating the package component includes the steps of providing a base wafer containing a plurality of base dice, and flip chip mounting the secondary dice to the base dice on the base wafer.

Abstract: This invention pertains to a method of fabricating a trenchless MRAM structure and to the resultant MRAM structure. The MRAM structure of the invention has a pinned layer formed within protective sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.

Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.

Abstract: A method and system of providing access to a shared memory interconnected to a first controller and a second controller via a bus, the bus having control signals associated therewith for data transfer control and communication between the first and the second controllers. The second controller transmits an access request to the first controller for control of the bus to access the memory. The first controller selectively grants the access request and transmits an acknowledge to the second controller; and upon receiving the acknowledge, the second controller accesses the memory for data transfer. The first controller has a first priority for accessing the memory, and the second controller has a second priority for accessing the memory, the second priority being lower than the first priority such that upon request the first controller selectively grants control of the bus to the second controller for memory access, otherwise the first controller maintains control of the bus for memory access.

Abstract: Search functions of a physical layout tool are performed by converting a given physical layout name and selected searching layout names from string representations into numerical representations and comparing the converted numerical representation of the given physical layout name with the converted numerical representations of searching physical layout names until a match occurs. In one embodiment, metal and via layer numbers included in string representations of physical layout names are converted to integer values by selecting number characters from predetermined positions in a string, such as number characters that identify the metal or via layer.

Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first deposition precursor is fed to the chamber under first vacuum conditions effective to form a first monolayer on the substrate. The first vacuum conditions are maintained at least in part by a first non-roughing vacuum pump connected to the chamber and through which at least some of the first deposition precursor flows. After forming the first monolayer, a purge gas is fed to the chamber under second vacuum conditions maintained at least in part by a second non-roughing vacuum pump connected to the chamber which is different from the first non-roughing vacuum pump and through which at least some of the purge gas flows. An atomic layer deposition apparatus is disclosed.

Abstract: Disclosed is a process for isolating and purifying paclitaxel from a natural resource of taxanes, comprising the steps of (a) washing a raw material comprising paclitaxel with water in order to remove soluble impurities from the raw material; (b) extracting with an organic solvent a wet raw material comprising paclitaxel; (c) contacting the wet raw material with a salt to obtain a biomass by precipitation, isolation, and drying; (d) removing resin and natural pigments from the dried biomass by dissolving the biomass in acetone or an acetone-hexane mixture, and adding at least one polar solvent until a paclitaxel-enriched oil phase is obtained; and (e) chromatography purifying the paclitaxel-enriched oil phase in a volatile solvent to obtain a purified solution, followed by crystallization.

Abstract: A coalescing assembly for coalescing entrained oil from a high temperature, high velocity gas stream comprises a coalescing element of compacted high temperature polyamide fibers, such as those available under the trademark Nomex®, rigidly held by concentric cylindrical support structures of a dense fibrous material such as stainless steel. The coalescing assembly forms a component of an oil coalescer having a unique hole configuration in its outer shell to prevent coalesced oil from being re-entrained into the gas stream. The oil coalescer is a component of an oil separator for use in aircraft operational environments and features high durability and longevity of 10 years or more.