Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of depositing tungsten nitride using a source gas comprising silicon
    Patent number: 6730954
    Abstract: A method for depositing tungsten nitride uses a source gas mixture having a silicon based gas for depositing the tungsten nitride to overlie a deposition substrate. A non-planar storage capacitor has a tungsten nitride capacitor electrode.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: May 4, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Scott Meikle, Trung Doan
  • Methods of forming trench isolation regions
    Publication number: 20040082181
    Abstract: In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then converted, at least some of the silanol, to a compound including at least one of SiOn and RSiOn, where R includes an organic group. An electrically insulative material is formed over the converted silanol to fill the trench. In another aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A first layer of at least one of Si(OH)x and (CH3)ySi(OH)4-y is formed to partially fill the trench. At least some of the Si(OH)x if present is converted to SiO2 and at least some of (CH3)ySi(OH)4-y if present is converted to (CH3)xSiO2-x. Next, a layer of an electrically insulative material is formed to fill the trench.
    Type: Application
    Filed: October 16, 2003
    Publication date: April 29, 2004
    Inventors: Trung Tri Doan, Gurtej S. Sandhu
  • Methods of forming capacitor constructions
    Patent number: 6720272
    Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: April 13, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Method of forming trench isolation regions
    Patent number: 6719012
    Abstract: In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and then converted, at least some of the silanol, to a compound including at least one of SiOn and RSiOn, where R includes an organic group. An electrically insulative material is formed over the converted silanol to fill the trench. In another aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A first layer of at least one of Si(OH)x and (CH3)ySi(OH)4-y is formed to partially fill the trench. At least some of the Si(OH)x if present is converted to SiO2 and at least some of (CH3)ySi(OH)4-y if present is converted to (CH3)xSiO2-x. Next, a layer of an electrically insulative material is formed to fill the trench.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: April 13, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Trung Tri Doan, Gurtej S. Sandhu
  • Low noise amplifier with fixed loss bypass
    Publication number: 20040066230
    Abstract: A low noise amplifier (LNA) has a selectable bypass signal path integrated into the same integrated circuit (IC) as the amplifier components. In a normal mode of operation, an integrated mode switch allows an appropriate biasing signal to be applied LNA transistors, which function to amplify an input signal and produce an amplified output signal. In an attenuation mode, which is activated to handle large input signals, the LNA transistors are switched off and the input signal is attenuated by a voltage divider, which provides an attenuated output on a signal path that bypasses the LNA amplifier. An attenuation switching signal not only operates the mode switch in the LNA, but also selects between the normal and bypass outputs of the LNA, for further amplification downstream of the LNA.
    Type: Application
    Filed: July 30, 2003
    Publication date: April 8, 2004
    Inventors: William R. Goyette, Harry S. Harberts, Trung H. Lam
  • Atomic layer deposition methods and atomic layer deposition tools
    Publication number: 20040065258
    Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.
    Type: Application
    Filed: October 8, 2002
    Publication date: April 8, 2004
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Contention-based methods for generating reduced number of interrupts
    Patent number: 6718413
    Abstract: Contention-based method and system are provided for generating reduced number of interrupts upon completing one or more commands. Each interrupt indicates the availability of data for transfer from a host adapter to a processor. The host adapter is coupled to one or more I/O devices over a bus. One or more I/O commands are received for transferring data between the processor and one or more I/O devices. Then, the contention for the bus among the I/O devices is monitored to determine how many devices are arbitrating for the bus.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: April 6, 2004
    Assignee: Adaptec, Inc.
    Inventors: Andrew W. Wilson, Darren R. Busing, B. Arlen Young, Trung S. Luu
  • Defect tracking by utilizing real-time counters in network computing environments
    Publication number: 20040060018
    Abstract: Disclosed are novel methods and apparatus for manipulating and generating a real-time counter in network computing environments. In an embodiment, a method of tracking a defect is disclosed. The method includes providing a defect abstract, the defect abstract including information to identify the defect; identifying a component having the defect; assigning a user to resolve the defect; and assigning a defect number to identify the defect, the defect number obtained by incrementing a counter value stored in a file, the file being accessible by a single user at a time.
    Type: Application
    Filed: September 25, 2002
    Publication date: March 25, 2004
    Inventors: Trung M. Tran, Sze Tom, Alan C. Folta
  • Reorganizing data in log files for data tracking management
    Publication number: 20040059707
    Abstract: Disclosed are novel methods and apparatus for reorganizing data in a log file. In an embodiment, a method of reorganizing data in an original log file is disclosed. The method includes: obtaining a data record from the original log file; examining the data record; if the data record includes a single-value entry, inserting the data record in a single-value storage linked list; if the data record includes a multiple-values entry, inserting the data record in a multiple-values linked list; and utilizing data from the multiple-values and single-value linked lists to write data to a new log file.
    Type: Application
    Filed: September 25, 2002
    Publication date: March 25, 2004
    Inventors: Trung M. Tran, Sze Tom, Alan C. Folta
  • Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
    Publication number: 20040053494
    Abstract: A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.
    Type: Application
    Filed: August 8, 2003
    Publication date: March 18, 2004
    Inventors: Gurtej S. Sandhu, Trung T. Doan, Tyler A. Lowrey
  • Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
    Publication number: 20040053493
    Abstract: A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.
    Type: Application
    Filed: August 8, 2003
    Publication date: March 18, 2004
    Inventors: Gurtej S. Sandhu, Trung T. Doan, Tyler A. Lowrey
  • Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
    Publication number: 20040053486
    Abstract: A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.
    Type: Application
    Filed: August 8, 2003
    Publication date: March 18, 2004
    Inventors: Gurtej S. Sandhu, Trung T. Doan, Tyler A. Lowrey
  • Low-resistance contact to silicon having a titanium silicide interface and an amorphous titanium carbonitride barrier layer
    Publication number: 20040053492
    Abstract: A contact structure incorporating an amorphous titanium nitride barrier layer formed via low-pressure chemical vapor deposition (LPCVD) utilizing tetrakis-dialkylamido-titanium, Ti(NMe2)4, as the precursor. The contact structure is fabricated by etching a contact opening through an dielectric layer down to a diffusion region to which electrical contact is to be made. Titanium metal is deposited over the surface of the wafer so that the exposed surface of the diffusion region is completely covered by a layer of the metal. At least a portion of the titanium metal layer is eventually converted to titanium silicide, thus providing an excellent conductive interface at the surface of the diffusion region. A titanium nitride barrier layer is then deposited using the LPCVD process, coating the walls and floor of the contact opening. Chemical vapor deposition of polycrystalline silicon or of a metal follows.
    Type: Application
    Filed: August 8, 2003
    Publication date: March 18, 2004
    Inventors: Gurtej S. Sandhu, Trung T. Doan, Tyler A. Lowrey
  • Method, computer product and computer system to manage software-tool access over a network
    Publication number: 20040054716
    Abstract: Provided are a method, a computer product and a computer system to manage software-tool access over a network. The network is employed to develop multiple integrated circuit designs, each of which is considered a project. To that end, multiple software design tools are accessed over the network. To reduce the computational power required to manage access to the design tools, the present method associates the multiple projects with a reference file. Tool information, such as tool name and tool version, is associated with each of the multiple projects. The tool information for all of the projects is stored in one or more tool files. The reference file is provided with data indicating a location of the tool files, defining location data. As a result, project information may be obtained as a function of the tool name, the project name and the like.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 18, 2004
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Trung M. Tran, Alan C. Folta
  • Methods of treatment with CETP inhibitors and antihypertensive agents
    Publication number: 20040053842
    Abstract: This invention relates to cholesterol ester transfer protein (CETP) inhibitors, pharmaceutical compositions containing such inhibitors, and the use of such inhibitors to treat certain disease/conditions optionally in combination with certain therapeutic agents e.g., antihypertensive agents.
    Type: Application
    Filed: June 10, 2003
    Publication date: March 18, 2004
    Applicant: Pfizer Inc.
    Inventors: Tu Trung Nguyen, James H. Revkin, Roger B. Ruggeri, Charles L. Shear
  • Method and apparatus for controlling component list in issue tracking system
    Publication number: 20040054688
    Abstract: A method for controlling a component list of an issue tracking system, including (a) maintaining a component list in a database, (b) providing access to the component list to an authorized user, the providing access including permitting the authorized user to download the component list, modify the component list, and upload the modified component list back to the database, (c) providing access to the system to a submitter of an issue report relating to a component, the providing the access to the system including permitting the submitter to download the component list from the database, and (d) updating the downloaded component list for the submitter without terminating the access to the system.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Applicant: Sun Microsystems, Inc., a Delaware Corporation
    Inventor: Trung M. Tran
  • &agr;-Substituted &bgr;-aminoethyl phosphonate derivatives
    Patent number: 6706698
    Abstract: The present invention relates to novel &agr;-substituted-&bgr;-aminoethylphosphonate and &agr;-substituted-&bgr;-aminovinylphosphonate derivatives and their uses for lowering plasma levels of apo (a), Lp(a), apo B, apo B associated lipoproteins (low density lipoproteins and very low density lipoproteins) and for lowering plasma levels of total cholesterol.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: March 16, 2004
    Assignee: Ilex Products, Inc.
    Inventors: Hieu Trung Phan, Lan Mong Nguyen, Vinh Van Diep, Raymond Azoulay, Harald Eschenhof, Eric Joseph Niesor, Craig Leigh Bentzen, Robert John Ife
  • Method and apparatus for variable pop hardware return address stack
    Publication number: 20040049666
    Abstract: A system and method for correcting a hardware return address stack is disclosed. A set of digital comparators examines several locations near the top of the stack and compares them with a calculated return address. If a match is detected, the slot number corresponding to the match is overwritten into the hardware stack pointer register. The updated contents of the hardware stack pointer register may be a more accurate predictor of future returns from function calls.
    Type: Application
    Filed: September 11, 2002
    Publication date: March 11, 2004
    Inventors: Murali M. Annavaram, Trung A. Diep, John Shen
  • Semiconductor component with backside contacts and method of fabrication
    Publication number: 20040041260
    Abstract: A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Inventors: Alan G. Wood, Trung Tri Doan
  • Systems for electrolytic removal of metals from substrates
    Publication number: 20040040863
    Abstract: A method and an apparatus for electrochemically removing a metal from a substrate surface with an electrolyte and an electrode that has a surface defining a shape suitable to cause substantially uniform removal of a metal-containing surface.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Whonchee Lee, Scott Meikle, Trung Doan, Eugene P. Marsh