Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.

Abstract: The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations.

Abstract: The invention includes a method of forming a rugged semiconductor-containing surface. A first semiconductor layer is formed over a substrate, and a second semiconductor layer is formed over the first semiconductor layer. Subsequently, a third semiconductor layer is formed over the second semiconductor layer, and semiconductor-containing seeds are formed over the third semiconductor layer. The seeds are annealed to form the rugged semiconductor-containing surface. The first, second and third semiconductor layers are part of a common stack, and can be together utilized within a storage node of a capacitor construction. The invention also includes semiconductor structures comprising rugged surfaces. The rugged surfaces can be, for example, rugged silicon.

Abstract: A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal signal transmission system, and a physical structure for supporting a terminal contact system of the package component. The package component also includes an encapsulant on the base die encapsulating the interconnect contacts, an underfill layer between the dice, and terminal contacts configured for flip chip mounting the package component to a supporting substrate. A method for fabricating the package component includes the steps of providing a base wafer containing a plurality of base dice, and flip chip mounting the secondary dice to the base dice on the base wafer.

Abstract: A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In addition, the pin contacts are formed by terminal portions of the conductive members. The fabrication method includes the steps of forming the openings and the conductive members, and then thinning and etching the die to form the pin contacts. An alternate embodiment female component includes female conductive members configured to physically and electrically engage pin contacts on a mating component of a stacked assembly.

Abstract: A method of manufacturing semiconductor devices using an improved chemical mechanical planarization process for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved chemical mechanical planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer filling in between the surface irregularities prior to the planarization of the surface through a chemical mechanical planarization process.

Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.

Abstract: A submicron particle forming method includes feeding a first set of precursors to a first energy application zone. Energy is applied to the first set of precursors in the first energy application zone effective to react and form solid particles having maximum diameter of no greater than 100 nanometers from the first set of precursors. The application of any effective energy to the solid particles is ceased, and the solid particles and a second set of precursors are fed to a second energy application zone. Energy is applied to the second set of precursors in the second energy application zone effective to react and form solid material about the solid particles from the second set of precursors with the solid particles with solid material thereabout having maximum diameter of no greater than 100 nanometers. Other aspects are contemplated.

Abstract: The present invention is a tear-back, drink-through lid for a beverage container. The lid includes a tear-back portion. A raised protrusion extends from an upper surface of the tear-back portion and has two opposite side walls that each includes a first latching member. A first recess is formed in a top wall of the lid radially inward from the tear-back portion and has two opposing side walls that each includes a second latching member. To retain the tear-back portion of the lid in an open position, the raised protrusion is inserted within the first recess so that the first latching members are pushed past the second latching members to engage the second latching members.

Abstract: A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

Abstract: The invention includes a method of forming a conductive interconnect. An electrical node location is defined to be supported by a silicon-containing substrate. A silicide is formed in contact with the electrical node location. The silicide is formed by exposing the substrate to hydrogen, TiCl4 and plasma conditions to cause Ti from the TiCl4 to combine with silicon of the substrate to form TiSix. Conductively doped silicon material is formed over the silicide. The conductively doped silicon material is exposed to one or more temperatures of at least about 800° C. The silicide is also exposed to the temperatures of at least about 800° C.

Abstract: A method is disclosed for reducing the effects of buckling, also referred to as cracking or wrinkling in multilayer heterostructures. The present method involves forming a planarization layer superjacent a semiconductor substrate. A barrier film having a structural integrity is formed superjacent the planarization layer. A second layer is formed superjacent the barrier film. The substrate is heated sufficiently to cause the planarization layer to expand according to a first thermal coefficient of expansion, the second layer to expand according to a second thermal coefficient of expansion, and the structural integrity of the barrier film to be maintained. This results in the barrier film isolating the planarization layer from the second layer, thereby preventing the planarization layer and the second layer from interacting during the heating step.

Abstract: An apparatus, such as a reader, adapter, or other device, is described that is capable of receiving at least four different types of memory cards using a single slot. The slot includes a central region having a width to receive a memory card of a first type, first outer regions that extend the width of the central region to a second width to receive a memory card selected from a second type of memory card or a third type of memory card, and second outer regions that extend the width of the central region to a third width to receive a memory card of a fourth type. A plurality of electrically conductive contact areas are disposed within the slot. The apparatus may receive, for example, any of a Smart Media flash memory card, Memory Stick flash memory card, Secure Digital flash memory card, or MultiMedia flash memory card.

Abstract: The present invention provides users with access to Internet-accessible databases via one portal of entry, such that queries need not be repeated multiple times in order to obtain needed information. Advantageously, the present invention will harness a systematic dynamic query profiler, document scoring, and display of retrieved documents via a knowledge-based system that facilitates user editing. Thus, the present invention will aid users so that less of their time and effort are required in order to obtain precisely the desired information for which they are searching.

Abstract: A method for dispensing a chemical, such as an edge bead removal solvent, onto a semiconductor wafer comprising the steps of dispensing the chemical selectively onto the wafer and applying a suction to the area immediately surrounding the location at which the chemical is dispensed onto the wafer. Preferably, the suction is applied substantially simultaneously with the dispensing of the chemical. One specific version of the invention provides an edge bead removal system wherein suction is applied to the area immediately surrounding the solvent dispensing nozzle to remove dissolved coating material and excess solvent from the wafer. In one aspect of this system, an apparatus for removing the edge bead includes a mechanism for dispensing a solvent selectively onto the edge of the wafer, and a mechanism surrounding the dispensing mechanism for vacuuming excess solvent and dissolved coating material from the edge of the wafer.

Abstract: A method for providing a high flux of point of use activated reactive species for semiconductor processing wherein a workpiece is exposed to a gaseous atmosphere containing a transmission gas that is substantially nonattenuating to preselected wavelengths of electromagnetic radiation. A laminar flow of a gaseous constituent is also provided over a substantially planar surface of the workpiece wherein a beam of the electromagnetic radiation is directed into the gaseous atmosphere such that it converges in the laminar flow to provide maximum beam energy in close proximity to the surface of the workpiece, but spaced a finite distance therefrom. The gaseous constituent is dissociated by the beam producing an activated reactive species that reacts with the surface of the workpiece.

Abstract: The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations.