Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030176047
    Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.
    Type: Application
    Filed: January 22, 2003
    Publication date: September 18, 2003
    Inventors: Trung Tri Doan, Lyle D. Breiner, Er-Xuan Ping, Lingyi A. Zheng
  • Publication number: 20030176057
    Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.
    Type: Application
    Filed: January 22, 2003
    Publication date: September 18, 2003
    Inventors: Trung Tri Doan, Lyle D. Breiner, Er-Xuan Ping, Lingyi A. Zheng
  • Patent number: 6620680
    Abstract: Method for forming at least a portion of a top electrode of a container capacitor and at least a portion of a contact plug in one deposition are described. In one embodiment, the top electrode is formed interior to a bottom electrode of the container capacitor. In another embodiment, the top electrode is formed interior to, and exterior and below a portion of the bottom electrode of the container capacitor. The method of forming a top electrode of a container capacitor and a contact plug with a same deposition is particularly well-suited for high-density memory array formation.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: September 16, 2003
    Assignee: Micron Technology, Inc.
    Inventors: D. Mark Durcan, Trung T. Doan, Roger R. Lee, Fernando Gonzalez
  • Publication number: 20030170403
    Abstract: An atomic layer deposition method includes positioning a semiconductor substrate within an atomic layer deposition chamber. A first deposition precursor is fed to the chamber under first vacuum conditions effective to form a first monolayer on the substrate. The first vacuum conditions are maintained at least in part by a first non-roughing vacuum pump connected to the chamber and through which at least some of the first deposition precursor flows. After forming the first monolayer, a purge gas is fed to the chamber under second vacuum conditions maintained at least in part by a second non-roughing vacuum pump connected to the chamber which is different from the first non-roughing vacuum pump and through which at least some of the purge gas flows. An atomic layer deposition apparatus is disclosed.
    Type: Application
    Filed: March 11, 2002
    Publication date: September 11, 2003
    Inventors: Trung Tri Doan, Gurtej S. Sandhu
  • Publication number: 20030172265
    Abstract: A method and apparatus for secure processing of cryptographic keys, wherein a cryptographic key stored on a token is processed in a secure processor mode using a secure memory. A main system processor is initialized into a secure processing mode, which cannot be interrupted by other interrupts, during a power-on sequence. A user enters a Personal Identification Number (PIN) to unlock the cryptographic key stored on the token. The cryptographic key and associated cryptographic program are then loaded into the secure memory. The secure memory is locked to prevent access to the stored data from any other processes. The user is then prompted to remove the token and the processor exits the secure mode and the system continues normal boot-up operations. When an application requests security processing, the cryptographic program is executed by the processor in the secure mode such that no other programs or processes can observe the execution of the program.
    Type: Application
    Filed: February 26, 2003
    Publication date: September 11, 2003
    Inventors: Son Trung Vu, Quang Phan
  • Patent number: 6616691
    Abstract: A two-optic accommodative lens system. The first lens has a negative power and is located posteriorly within the capsular bag and laying against the posterior capsule. The periphery of the first optic contains a pair of generally T-shaped haptics having a generally rectangular slot within the top portion of the “T”. The second optic is located anteriorly to the first optic outside of the capsular bag and is of a positive power. The peripheral edge of the second optic contains a pair of encircling haptics having a notched tab sized and shape to fit within the slots in the haptics on the first optic to lock the second optic onto the first optic. Hinge structures on the encircling haptics allow the second optic to move relative to the first optic along the optical axis of the lens system in reaction to movement of the ciliary muscle.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 9, 2003
    Assignee: Alcon, Inc.
    Inventor: Son Trung Tran
  • Publication number: 20030166379
    Abstract: The invention comprises particle forming methods, laser pyrolysis particle forming methods, chemical mechanical polishing slurries, and chemical mechanical polishing processes. In but one preferred implementation, a particle forming method includes feeding a first set of precursors to a first energy application zone. Energy is applied to the first set of precursors in the first energy application zone effective to react and form solid particles from the first set of precursors. Application of any effective energy to the solid particles is ceased and the solid particles and a second set of precursors are fed to a second energy application zone. Energy is applied to the second set of precursors in the second energy application zone effective to react and form solid material about the solid particles from the second set of precursors. Preferably, at least one of the first and second applied energies comprises laser energy.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 4, 2003
    Inventor: Trung Tri Doan
  • Publication number: 20030166318
    Abstract: A process of forming a capacitor structure over a semiconductor substrate by atomic layer deposition to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided.
    Type: Application
    Filed: March 10, 2003
    Publication date: September 4, 2003
    Inventors: Lingyi A. Zheng, Er-Xuan Ping, Lyle Breiner, Trung T. Doan
  • Patent number: 6613702
    Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: September 2, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Publication number: 20030160826
    Abstract: Provided is a method, apparatus and computer product to organize data on a display to facilitate testing of an integrated circuit design of an integrated circuit undergoing development. The invention includes segmenting the display into a plurality of regions. Displayed in a first of the plurality of regions is information associated with a netlist that is stored on the server. The information includes a plurality of cell names displayed on the client terminal that correspond to a plurality of electrical functions included in the integrated circuit design. In a second of the plurality of regions, a plurality of virtual buttons is displayed. A subset of the virtual buttons operates to cause the client terminal/server to test the electrical functions, of the integrated circuit design, that are associated with the test group.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 28, 2003
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Trung M. Tran, Alan C. Folta
  • Publication number: 20030156467
    Abstract: A removable memory card and an associated read/write device and its method of operation are disclosed. The memory card may be formed of a sheet of chalcogenide glass material which has memory storage locations therein defined by the locations of conductive read/write elements of the read/write device.
    Type: Application
    Filed: February 20, 2002
    Publication date: August 21, 2003
    Inventors: Terry L. Gilton, Trung T. Doan
  • Publication number: 20030157867
    Abstract: The invention comprises particle forming methods, laser pyrolysis particle forming methods, chemical mechanical polishing slurries, and chemical mechanical polishing processes. In but one preferred implementation, a particle forming method includes feeding a first set of precursors to a first energy application zone. Energy is applied to the first set of precursors in the first energy application zone effective to react and form solid particles from the first set of precursors. Application of any effective energy to the solid particles is ceased and the solid particles and a second set of precursors are fed to a second energy application zone. Energy is applied to the second set of precursors in the second energy application zone effective to react and form solid material about the solid particles from the second set of precursors. Preferably, at least one of the first and second applied energies comprises laser energy.
    Type: Application
    Filed: March 11, 2003
    Publication date: August 21, 2003
    Inventor: Trung Tri Doan
  • Patent number: 6608342
    Abstract: Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode (“bottom electrodes”) of the container capacitor structure. The etch provides a recess between proximal pairs of container capacitor structures, which recess is available for forming additional capacitance. Accordingly, a capacitor dielectric and a top electrode are formed on and adjacent to, respectively, both an interior surface and portions of the exterior surface of the first electrode. Advantageously, surface area common to both the first electrode and second electrodes is increased over using only the interior surface, which provides additional capacitance without a decrease in spacing for clearing portions of the capacitor dielectric and the second electrode away from a contact hole location.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: August 19, 2003
    Assignee: Micron Technology, Inc.
    Inventors: D. Mark Durcan, Trung T. Doan, Roger R. Lee, Fernando Gonzalez, Er-Xuan Ping
  • Patent number: 6608523
    Abstract: A distortion reduction system uses upstream signal information, such as the carrier frequencies in an input signal, to adjust at least one frequency for a pilot signal to be injected into the distortion reduction system and to be detected at the output of the distortion reduction system, thereby enabling improved distortion reduction of changing input signals. For example, processing circuitry obtains the traffic frequencies making up a signal to be amplified by a feed forward arrangement. Using the traffic frequencies, the processing circuitry determines at least one frequency for a pilot signal, and the processing circuitry tunes a pilot signal generator to the at least one frequency for the pilot signal. The feed forward arrangement receives the signal to be amplified and provides replicas of the signal on a main signal path and on a feed forward path. The pilot signal is injected into the main signal path at the at least one frequency along with the signal to be amplified.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: August 19, 2003
    Assignee: Lucent Technologies Inc.
    Inventor: Trung Ly
  • Patent number: 6604805
    Abstract: A method of and printing system for printing a multiple page print job on a print medium. A shingling sequence for a first page of the multiple page print job is opened by successively passing a printhead over the print medium and the first page is printed in a steady state mode of the printhead. The steady state mode of the printhead is maintained during a transition between printing the first page and printing a second page of the multiple page print job, such that the second page is printed as a continuation of the shingling sequence for the first page.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: August 12, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Trung Vu Nguyen, Stephen A Smith, Dean C Bayerle
  • Patent number: 6602380
    Abstract: A method and apparatus for releasably attaching a planarizing medium, such as a polishing pad, to the platen of a chemical-mechanical planarization machine. In one embodiment, the apparatus can include several apertures in the upper surface of the platen that are coupled to a vacuum source. When a vacuum is drawn through the apertures in the platen, the polishing pad is drawn tightly against the platen and may therefore be less likely to wrinkle when a semiconductor substrate is engaged with the polishing pad during planarization. When the vacuum is released, the polishing pad can be easily separated from the platen. The apparatus can further include a liquid trap to separate liquid from the fluid drawn by the vacuum source through the apertures, and can also include a releasable stop to prevent the polishing pad from separating from the platen should the vacuum source be deactivated while the platen is in motion.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: August 5, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Trung Tri Doan, Scott E. Moore
  • Publication number: 20030145300
    Abstract: Disclosed are novel methods and apparatus for efficiently providing layout tracking solutions. In an embodiment, a method of tracking a plurality of cell layouts is disclosed. The method includes dividing a circuit layout design into a plurality of cell; providing a list of the plurality of cells; permitting a user to select a cell from the list of cells; permitting the user to enter cell information for the selected cell; providing a first data structure and a second data structure, the first data structure including cellname information regarding the selected cell and the second data structure including cell information for the selected cell; and sequentially storing the entered cell information for the selected cell from the first and second data structures. It is envisioned that the sequentially stored cell information provides data on a status of the plurality of cell layouts.
    Type: Application
    Filed: January 28, 2002
    Publication date: July 31, 2003
    Inventor: Trung M. Tran
  • Publication number: 20030139961
    Abstract: An optimization processor which is parameter driven for generating plural solutions for employee transfer requests and leave requests for an entire enterprise in near real time from which an optimal solution avoiding compromises to future staffing requirements may be selected.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 24, 2003
    Applicant: CALEB Technologies Corp.
    Inventors: Michael Francis Arguello, Niem-Trung Luong Tra
  • Patent number: D478326
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: August 12, 2003
    Assignee: GN Netcom, Inc.
    Inventors: Robert M. Petersen, Trung Phung, Glen Walter
  • Patent number: D478561
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: August 19, 2003
    Assignee: GN Netcom, Inc.
    Inventors: Robert M. Petersen, Trung Phung, Glen Walter