Patents by Inventor Trung (Tim) Trinh

Trung (Tim) Trinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6551893
    Abstract: A capacitor structure is formed over a semiconductor substrate by atomic layer deposition to achieve uniform thickness in memory cell dielectric layers, particularly where the dielectric layer is formed in a container-type capacitor structure. In accordance with several embodiments of the present invention, a process for forming a capacitor structure over a semiconductor substrate is provided. Other embodiments of the present invention relate to processes for forming memory cell capacitor structures, memory cells, and memory cell arrays. Capacitor structures, memory cells, and memory cell arrays are also provided.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: April 22, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Lingyi A. Zheng, Er-Xuan Ping, Lyle Breiner, Trung T. Doan
  • Patent number: 6551451
    Abstract: A rapid method is provided for the on-line spectroscopic determination of lignin content and/or kappa number in wood pulps. Unlike currently available commercial instrumentation, the method enables one to measure lignin content independently of species variations and pulp consistency.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: April 22, 2003
    Assignee: Pulp and Paper Research Institute of Canada
    Inventors: Thanh P. Trung, Denys Leclerc
  • Publication number: 20030073384
    Abstract: A system for polishing a semiconductor wafer, the system comprising a wafer polishing assembly for polishing a face of a semiconductor wafer at a polishing rate and a polishing uniformity, the wafer polishing assembly including a platen subassembly defining a polishing area, and a polishing head selectively supporting a semiconductor wafer and holding a face of the semiconductor wafer in contact with the platen subassembly to polish the wafer face; and a controller selectively adjusting one of a plurality of adjustable polishing parameters during polishing of the wafer.
    Type: Application
    Filed: November 19, 2002
    Publication date: April 17, 2003
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Publication number: 20030073318
    Abstract: An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are diffused into the substrate. Each doping region is chemically separated from adjacent doping regions. A loading assembly is programmed to follow pre-defined transfer sequences for moving semiconductor substrates into and out of the respective adjacent doping regions. According to the number of doping regions provided, a plurality of substrates could be simultaneously processed and run through the cycle of doping regions until a desired doping profile is obtained.
    Type: Application
    Filed: November 22, 2002
    Publication date: April 17, 2003
    Inventors: Gurtej Sandhu, Trung T. Doan
  • Patent number: 6545487
    Abstract: A distortion reduction system uses upstream signal information from carrier frequencies in a signal to be amplified, to determine at least one frequency for the distortion generated by an amplifier amplifying the signal. A sample of an output is taken, and a distortion detection circuitry is used to detect the amplitude of the distortion at least at the one frequency. In response to the amplitude of the distortion at the one frequency, the processing circuitry provides gain and/or phase control signal(s) to adjust the relative phase and/or gain between combining distortion products to reduce the amplitude of the distortion.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: April 8, 2003
    Assignee: Lucent Technologies Inc.
    Inventor: Trung Ly
  • Publication number: 20030063140
    Abstract: A method of and printing system for printing a multiple page print job on a print medium. A shingling sequence for a first page of the multiple page print job is opened by successively passing a printhead over the print medium and the first page is printed in a steady state mode of the printhead. The steady state mode of the printhead is maintained during a transition between printing the first page and printing a second page of the multiple page print job, such that the second page is printed as a continuation of the shingling sequence for the first page.
    Type: Application
    Filed: October 2, 2001
    Publication date: April 3, 2003
    Inventors: Trung Vu Nguyen, Stephen A. Smith, Dean C. Bayerle
  • Patent number: 6541353
    Abstract: An improved atomic layer doping apparatus is disclosed as having multiple doping regions in which individual monolayer species are first deposited and then dopant atoms contained therein are diffused into the substrate. Each doping region is chemically separated from adjacent doping regions. A loading assembly is programmed to follow pre-defined transfer sequences for moving semiconductor substrates into and out of the respective adjacent doping regions. According to the number of doping regions provided, a plurality of substrates could be simultaneously processed and run through the cycle of doping regions until a desired doping profile is obtained.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: April 1, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Trung T. Doan
  • Patent number: 6537915
    Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: March 25, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Moore, Trung Tri Doan
  • Publication number: 20030049944
    Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 13, 2003
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Patent number: 6531352
    Abstract: The invention includes a method of forming a conductive interconnect. An electrical node location is defined to be supported by a silicon-containing substrate. A silicide is formed in contact with the electrical node location. The silicide is formed by exposing the substrate to hydrogen, TiCl4 and plasma conditions to cause Ti from the TiCl4 to combine with silicon of the substrate to form TiSix. Conductively doped silicon material is formed over the silicide. The conductively doped silicon material is exposed to one or more temperatures of at least about 800° C. The silicide is also exposed to the temperatures of at least about 800° C.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: March 11, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Trung Tri Doan, Howard E. Rhodes, Sujit Sharan, Philip J. Ireland, Martin Ceredig Roberts
  • Patent number: 6531401
    Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: March 11, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Moore, Trung Tri Doan
  • Patent number: 6531761
    Abstract: An apparatus and method for attaching a semiconductor die to a lead frame wherein the electric contact points of the semiconductor die are relocated to the periphery of the semiconductor die through a plurality of conductive traces. A plurality of leads extends from the lead frame over the conductive traces proximate the semiconductor die periphery and directly attaches to and makes electrical contact with the conductive traces in an LOC arrangement. Alternately, a connector may contact a portion of the conductive trace to make contact therewith.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: March 11, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Trung T. Doan
  • Publication number: 20030045130
    Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.
    Type: Application
    Filed: August 23, 2002
    Publication date: March 6, 2003
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Publication number: 20030045129
    Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.
    Type: Application
    Filed: August 15, 2002
    Publication date: March 6, 2003
    Inventors: Gurtej S. Sandhu, Trung Tri Doan
  • Patent number: 6528834
    Abstract: Disclosed is a container capacitor structure and method of constructing it. An etch mask and etch are used to expose portions of an exterior surface of electrode (“bottom electrodes”) of the container capacitor structure. The etch provides a recess between proximal pairs of container capacitor structures, which recess is available for forming additional capacitance. Accordingly, a capacitor dielectric and a top electrode are formed on and adjacent to, respectively, both an interior surface and portions of the exterior surface of the first electrode. Advantageously, surface area common to both the first electrode and second electrodes is increased over using only the interior surface, which provides additional capacitance without a decrease in spacing for clearing portions of the capacitor dielectric and the second electrode away from a contact hole location.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: March 4, 2003
    Assignee: Micron Technology, Inc.
    Inventors: D. Mark Durcan, Trung T. Doan, Roger R. Lee, Fernando Gonzalez
  • Patent number: 6529162
    Abstract: A system and technique for phased array antenna beam steering for transmitting and receiving without sending the waveform through an actual (physical) time delay when a time varying frequency is used as the waveform. The inventive system is adapted for use with an antenna having an array of radiating elements and includes a plurality of signal sources. Each source is adapted to provide a signal having a predetermined frequency offset signal for an associated radiating element or set of radiating elements. For transmit a plurality of first mixers is provided. Each of the first mixers is coupled to receive an excitation signal as a first input and the output from a respective one of the sources as a second input. The output of each mixer is coupled to a respective subset of the antenna radiating elements. In effect, each of the sources provides a virtual time delay.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: March 4, 2003
    Inventors: Irwin L. Newberg, Oleg Brovko, Steve I. Hsu, Robert A. Kosmala, Trung T. Nguyen, Ricardo Rico, Jr.
  • Patent number: 6529136
    Abstract: A group notification system and associated method that allow particular activities to be executed based on the group dynamics, such as the dynamics of organizing meetings. The system facilitates the availability of knowledge concerning the proximity and direction of movement of individuals, objects, or groups, and whether this information satisfies preset criteria or rules. One such criterion is that the proximity distance of the group members be less than a predetermined threshold range. The threshold range can be adjustable or programmable.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Kevin Trung Cao, Daniel Alexander Ford, Reiner Kraft
  • Publication number: 20030041154
    Abstract: A system and method for controlling UNIX group access using an LDAP directory are disclosed. The system and method may be used to overcome a limitation on the size of groups that may be encountered in certain UNIX-based operating systems. A directory may be populated with entries for each of a plurality of users. Each entry in the directory may include information such as a user ID, user password, one or more group names, and optionally one or more hostnames. One or more access control lists may be generated from the directory entries. The operating system may check the access control list(s) to restrict access to the appropriate files or directories (i.e., data sources). For each data source which permits access by a particular group name, access may be granted to the data source to the users in the appropriate group access control list. Likewise, access may be denied to users who are not listed in the appropriate group access control list and who are not otherwise entitled to access (e.g.
    Type: Application
    Filed: August 24, 2001
    Publication date: February 27, 2003
    Inventor: Trung M. Tran
  • Patent number: 6525366
    Abstract: An exemplary embodiment of the present invention discloses a method for forming a forming a storage capacitor having a uniform dielectric film, by a the steps of: forming a bottom electrode of the storage capacitor and an insulation material about the bottom electrode, the bottom electrode comprises a nitridation receptive material and the insulation material comprises a nitridation resistive material; depositing a layer of non-doped silicon to a thickness of 20Å or less over the bottom electrode and the insulation material; converting the silicon layer to a silicon nitride compound; depositing a silicon nitride of uniform thickness directly on the silicon nitride compound while using the silicon nitride compound as a nitride-nucleation enhancing surface; exposing the silicon nitride compound and the silicon nitride layer to an oxidation ambient to form a storage capacitor dielectric film; and then forming a top electrode of the storage capacitor over the storage capacitor dielectric film.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: February 25, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Trung Doan
  • Patent number: 6521931
    Abstract: A method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, whereby the upper magnetic layer of the MRAM stack structure is formed between the region defined by the spacers, thereby allowing for self-alignment of the upper magnetic layer over the underlying pinned magnetic layer.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: February 18, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Roger Lee, Dennis Keller, Trung T. Doan, Max F. Hineman, Ren Earl