Abstract: The invention comprises methods of fabricating attenuated phase shift masks. In but one implementation, a method of fabricating an attenuated phase shift mask having a circuitry pattern area and a no-circuitry area includes providing a transparent substrate. A first light shielding layer is formed over the transparent substrate. The first light shielding layer comprises a semi-transparent shifter material. A second light shielding layer is formed over the first light shielding layer. At least some of the second light shielding layer material is removed from the circuitry pattern area prior to forming a circuitry pattern in a photoresist layer in the circuitry pattern area. In one implementation, the first light shielding layer is etched within the circuitry pattern area without using the. second light shielding layer as a mask within the circuitry pattern area during the etching.

Abstract: A method for central storage and retrieval of user passwords in a computer network is provided. The method comprises entering network user ID and password information into a central database, and registering each network application and its associated password with a LDAP server. When user ID and password data is received from an application login, the data is encrypted and sent to a secure layer to identify the register application. The data is then sent to the LDAP server where the user password is decrypted and the application's associated password is retrieved. The supplied password is then authenticated and a response is sent from the LDAP server back to the application indicating whether or not the authentication has been verified. Access to the application is granted only if the authentication is indeed verified.

Abstract: The present invention relates to novel &agr;-substituted-&bgr;-aminoethylphosphonate and &agr;-substituted-&bgr;-aminovinylphosphonate derivatives and their uses for lowering plasma levels of apo (a), Lp(a), apo B, apo B associated lipoproteins (low density lipoproteins and very low density lipoproteins) and for lowering plasma levels of total cholesterol.

Abstract: The present invention relates to novel &bgr;-substituted-&bgr;-aminoethylphosphonate derivatives and their uses for lowering plasma levels of apo (a), Lp(a), apo B, apo B associated lipoproteins (low density lipoproteins and very low density lipoproteins) and for lowering plasma levels of total cholesterol.

Abstract: This invention pertains to a method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, whereby the upper magnetic layer of the MRAM stack structure is formed between the region defined by the spacers, thereby allowing for self-alignment of the upper magnetic layer over the underlying pinned magnetic layer.

Abstract: A method for depositing tungsten nitride uses a source gas mixture having a silicon based gas for depositing the tungsten nitride to overlie a deposition substrate. A non-planar storage capacitor has a tungsten nitride capacitor electrode.

Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: A system and method for enabling bookmark information to be shared among different computer systems. A method for storing bookmark information is described. User input requesting to store bookmark information may be received, wherein the bookmark information specifies a uniform resource locator (URL) and possibly also specifies other information, such as a name to associate with the URL. If the user does not want to store the bookmark information locally, then the bookmark information may be stored on a server computer system. The method may prompt for and receive user input specifying user authentication information and may interface with the server computer system to authenticate the user. The bookmark information may then be sent to the server computer system. The server computer system may store the bookmark information in association with the particular user. A method for obtaining stored bookmark information is also described.

Abstract: Method for forming at least a portion of a top electrode of a container capacitor and at least a portion of a contact plug in one deposition are described. In one embodiment, the top electrode is formed interior to a bottom electrode of the container capacitor. In another embodiment, the top electrode is formed interior to, and exterior and below a portion of the bottom electrode of the container capacitor. The method of forming a top electrode of a container capacitor and a contact plug with a same deposition is particularly well-suited for high-density memory array formation.

Abstract: A method and apparatus for releasably attaching a planarizing medium, such as a polishing pad, to the platen of a chemical-mechanical planarization machine. In one embodiment, the apparatus can include several apertures in the upper surface of the platen that are coupled to a vacuum source. When a vacuum is drawn through the apertures in the platen, the polishing pad is drawn tightly against the platen and may therefore be less likely to wrinkle when a semiconductor substrate is engaged with the polishing pad during planarization. When the vacuum is released, the polishing pad can be easily separated from the platen. The apparatus can further include a liquid trap to separate liquid from the fluid drawn by the vacuum source through the apertures, and can also include a releasable stop to prevent the polishing pad from separating from the platen should the vacuum source be deactivated while the platen is in motion.

Abstract: A method of making a vertical diode is provided, the vertical dioxide having associated therewith a diode opening extending through an insulation layer and contacting an active region on a silicon wafer. A titanium silicide layer covers the interior surface of the diode opening and contacts the active region. The diode opening is initially filled with an amorphous silicon plug that is doped during deposition and subsequently recrystallized to form large grain polysilicon. The silicon plug has a top portion that is heavily doped with a first type dopant and a bottom portion that is lightly doped with a second type dopant. The top portion is bounded by the bottom portion so as not to contact the titanium silicide layer. For one embodiment of the vertical diode, a programmable resistor contacts the top portion of the silicon plug and a metal line contacts the programmable resistor.

Abstract: An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.

Abstract: A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

Abstract: A process for forming vertical contacts in the manufacture of integrated circuits, and devices so manufactured. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process includes the steps of: forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The above process may be repeated one or more times during the formation of multi-level metal integrated circuits.

Abstract: Aminophosphonates alpha substituted by phenol groups, of formula (I) have lipoprotein(a) lowering activity.

Abstract: The present invention provides an implementation of a supply-based management system in a network environment. The system includes a server, which includes a plurality of business process entity beans and a notification manager. The plurality of business process entity beams includes a request-for-quotation process entity bean, a quotation process entity bean, and a purchase order process entity bean. The system also includes a front-end, which includes: a user interface, a controller coupled to the user interface, and a business process router coupled to the controller. In a preferred embodiment, the front end architecture includes Java server pages, a controller, and a business process router. The server side architecture includes a plurality of business processes, which are implemented by a plurality of Enterprise JavaBeans, and a notification manager as a messaging daemon.

Abstract: An endpoint detector and performance monitoring system for quickly and accurately measuring the change in thickness of a wafer and other planarizing parameters in chemical-mechanical polishing processes. In one embodiment, an endpoint detector has a reference platform, a measuring face, and a distance measuring device. The reference platform is positioned proximate to the wafer carrier, and the reference platform and measuring device are positioned apart from one another by a known, constant distance. The measuring face is fixedly positioned with respect to the wafer carrier at a location that allows the measuring device to engage the measuring face when the wafer is positioned on the reference platform. Each time the measuring device engages the measuring surface, it measures the displacement of the measuring face with respect to the measuring device. The displacement of the measuring face is proportional to the change in thickness of the wafer between measurements.

Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an output signal having a frequency that varies in response to (i) a voltage signal and (ii) a load. The second circuit may be configured to generate the load by coupling one or more resistive devices to a reference node in response to a control signal.

Abstract: An improved semiconductor device structure comprises insertion of a semiconductor wafer into a high-pressure heated chamber and the deposition of a low-melting point aluminum material into a contact hole or via and over an insulating layer overlying a substrate of the wafer. The wafer is heated up to the melting point of the aluminum material and the chamber is pressurized to force the aluminum material into the contact holes or vias and eliminate voids present therein. A second layer of material, comprising a different metal or alloy, which is used as a dopant source, is deposited over an outer surface of the deposited aluminum material layer and allowed to diffuse into the aluminum material layer in order to form a homogenous aluminum alloy within the contact hole or via. A semiconductor device structure made according to the method is also disclosed.