Patents by Inventor Tung Lin

Tung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10687095
    Abstract: Systems and methods for saving encoded media streamed using adaptive bitrate streaming in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, a playback device configured to perform adaptive bitrate streaming of media includes a video decoder application and a processor, where the video decoder application configures the processor to select a download stream from a set of alternative streams of video data, measure streaming conditions and request a stream of video data from the alternative streams of video data, receive portions of video data from the requested stream of video data, decode the received video data, save the received video data to memory, when the received video data is from the download stream and separately download and save the corresponding portion of video data from the download stream to memory, when the received video data is not from the download stream.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: June 16, 2020
    Assignee: DIVX, LLC
    Inventors: Ben Ziskind, Song Cen, Tung Lin, Jason Braness, Kourosh Soroushian
  • Patent number: 10686194
    Abstract: A cathode material for a solid oxide fuel cell comprises a perovskite type complex oxide which is represented by Formula 1: Gd1-xMxCoO3-?.In Formula 1, M represents an alkali metal, x is larger than 0 and not more than 0.75, and ? ranges from 0 to 2.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: June 16, 2020
    Assignee: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: Sea-Fue Wang, Yi-Xin Liu, Tung Lin
  • Patent number: 10677641
    Abstract: An examination method comprises: generating a received audio signal according to sound generated from rotation of the fan by an audio receiving device; performing Fourier transform on the received audio signal to obtain a reference frequency domain signal; recognizing a plurality of characteristic bands according to the reference frequency domain signal; adjusting the received audio signal according to the characteristic bands respectively to form a plurality of casting audio signals corresponding to frequency components in the characteristic bands respectively; playing the casting signals sequentially by an audio casting device; and recognizing at least one key band among the characteristic bands according to the transmission rate of the hard drive upon playing the casting signals.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: June 9, 2020
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Yu-Hsien Huang, Tung-Lin Tsai, Wei-Liang Hsu
  • Publication number: 20200155138
    Abstract: A fibrocartilage suturing device is provided to solve the problem where the conventional procedure of the surgery is inconvenient. The fibrocartilage suturing device includes a tube assembly, a tubular member, and an anchor. The tube assembly extends through the tube assembly and includes an insertion section. The movement member is coupled with the tube assembly and includes a thrust rod extending through the tubular member. The anchor is located at one end of the thrust rod and includes a body and at least two wings connected to the body is able to be folded and unfolded relative to the body. The body of the anchor is connected to an end of a thread. Another end of the thread is connected to the tubular member.
    Type: Application
    Filed: September 12, 2019
    Publication date: May 21, 2020
    Inventors: Chen-Chie WANG, Po-Chih Chow, Yue-Jun Wang, Shih-Hua Huang, Chih-Lung Lin, Tung-Lin Tsai, Chun-Chieh Tseng, Li-Wen Weng
  • Patent number: 10658234
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dielectric layer over a semiconductor substrate and forming an opening in the dielectric layer to expose a conductive element. The method also includes forming a conductive layer over the conductive element and modifying an upper portion of the conductive layer using a plasma operation to form a modified region. The method further includes forming a conductive plug over the modified region.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Hsiu Hung, Sung-Li Wang, Pei-Wen Wu, Yida Li, Chih-Wei Chang, Huang-Yi Huang, Cheng-Tung Lin, Jyh-Cherng Sheu, Yee-Chia Yeo, Chi-On Chui
  • Publication number: 20200152763
    Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Inventors: Yu-Wen Cheng, Cheng-Tung Lin, Chih-Wei Chang, Hong-Mao Lee, Ming-Hsing Tsai, Sheng-Hsuan Lin, Wei-Jung Lin, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Wei-Yip Loh, Ya-Yi Cheng
  • Publication number: 20200118935
    Abstract: A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 16, 2020
    Inventors: Hong-Mao LEE, Huicheng CHANG, Chia-Han LAI, Chi-Hsuan NI, Cheng-Tung LIN, Huang-Yi HUANG, Chi-Yuan CHEN, Li-Ting WANG, Teng-Chun TSAI, Wei-Jung LIN
  • Publication number: 20200111887
    Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.
    Type: Application
    Filed: December 9, 2019
    Publication date: April 9, 2020
    Inventors: DE-FANG CHEN, TENG-CHUN TSAI, CHENG-TUNG LIN, LI-TING WANG, CHUN-HUNG LEE, MING-CHING CHANG, HUAN-JUST LIN
  • Patent number: 10608144
    Abstract: Provided is a light emitting diode (LED) mounted on a carrier substrate and including a semiconductor epitaxial structure and at least one electrode pad structure. The semiconductor epitaxial structure is electrically connected to the carrier substrate. The electrode pad structure includes a eutectic layer, a barrier layer and a ductility layer. The eutectic layer is adapted for eutectic bonding to the carrier substrate. The barrier layer is between the eutectic layer and the semiconductor epitaxial structure. The barrier layer blocks the diffusion of the material of the eutectic layer in the eutectic bonding process. The ductility layer is between the eutectic layer and the semiconductor epitaxial structure. The ductility layer reduces the stress on the LED produced by thermal expansion and contraction of the substrate during the eutectic bonding process, so as to prevent the electrode pad structure from cracking, and maintain the quality of the LED.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: March 31, 2020
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Chih-Ming Shen, Sheng-Tsung Hsu, Kuan-Chieh Huang, Jing-En Huang, Shao-Ying Ting
  • Patent number: 10600230
    Abstract: A mesh rendering system, a mesh rendering method and a non-transitory computer readable medium are provided. The mesh rendering system includes a database, a user device and a server. The server obtains preprocessing data of a cloth and a rigidbody according to initial mesh state of the cloth, initial mesh state of the rigidbody and motion of the rigidbody, wherein the cloth and the rigidbody are deformable and motion of the cloth corresponding to the motion of the rigidbody is a small deformation. The server stores the preprocessing data in the database. A finite state machine of the server receives a real-time input data from the user device through a web service and the preprocessing data, and the finite state machine outputs a deformation result of the cloth and the rigidbody to the user device through a handshake mechanism.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: March 24, 2020
    Inventors: Sheng-Yen Lin, Sheng-Wei Lin, Ching-Tung Lin, Jui-Fen Ho
  • Publication number: 20200075821
    Abstract: A light emitting diode chip including an epitaxy stacked layer, first and second electrodes and a first reflective layer is provided. The epitaxy stacked layer includes first-type and second-type semiconductor layers and a light-emitting layer. The first and second electrodes are respectively electrically connected to the first-type and second-type semiconductor layers. An orthogonal projection of the light-emitting layer on the first-type semiconductor layer is misaligned with an orthogonal projection of the first electrode on the first-type semiconductor layer. The first reflective layer is disposed on the epitaxy stacked layer, the first and second electrodes. An orthogonal projection of the first reflective layer on the second-type semiconductor layer is misaligned with an orthogonal projection of the second electrode on the second-type semiconductor layer. Furthermore, a light emitting diode device is also provided.
    Type: Application
    Filed: August 5, 2019
    Publication date: March 5, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
  • Patent number: 10579798
    Abstract: An electronic device and a method for detecting a malicious file are provided. The method includes the following steps: An executable file is searched, and an import table is extracted from the executable file. The import table includes at least a name of a first DDL and a name of a second DDL. A distance between the first DLL and the second DLL is calculated. Whether the distance exceeds a threshold is determined. If the distance exceeds the threshold, then whether a duplicate content of the import table exists in the executable file is checked. The executable file is regarded as a malicious file if the duplicate content of the import table exists in the executable file.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: March 3, 2020
    Assignee: ACER CYBER SECURITY INCORPORATED
    Inventors: Ming-Kung Sun, Chiung-Ying Huang, Tung-Lin Tsai, Gu-Hsin Lai, Chia-Mei Chen, Tzu-Ching Chang
  • Publication number: 20200051308
    Abstract: A mesh rendering system, a mesh rendering method and a non-transitory computer readable medium are provided. The mesh rendering system includes a database, a user device and a server. The server obtains preprocessing data of a cloth and a rigidbody according to initial mesh state of the cloth, initial mesh state of the rigidbody and motion of the rigidbody, wherein the cloth and the rigidbody are deformable and motion of the cloth corresponding to the motion of the rigidbody is a small deformation. The server stores the preprocessing data in the database. A finite state machine of the server receives a real-time input data from the user device through a web service and the preprocessing data, and the finite state machine outputs a deformation result of the cloth and the rigidbody to the user device through a handshake mechanism.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Inventors: Sheng-Yen Lin, Sheng-Wei Lin, Ching-Tung Lin, Jui-Fen Ho
  • Publication number: 20200052159
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Patent number: 10535748
    Abstract: Embodiments disclosed herein relate generally to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. In an embodiment, a structure includes an active area having a source/drain region on a substrate, a dielectric layer over the active area and having a sidewall aligned with the sidewall of the source/drain region, and a conductive feature along the sidewall of the dielectric layer to the source/drain region. The source/drain region has a sidewall and a lateral surface extending laterally from the sidewall of the source/drain region, and the source/drain region further includes a nitrided region extending laterally from the sidewall of the source/drain region into the source/drain region. The conductive feature includes a silicide region along the lateral surface of the source/drain region and along at least a portion of the sidewall of the source/drain region.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Wen Cheng, Cheng-Tung Lin, Chih-Wei Chang, Hong-Mao Lee, Ming-Hsing Tsai, Sheng-Hsuan Lin, Wei-Jung Lin, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Wei-Yip Loh, Ya-Yi Cheng
  • Patent number: 10510664
    Abstract: A semiconductor device and methods of formation are provided. A semiconductor device includes an annealed cobalt plug over a silicide in a first opening of the semiconductor device, wherein the annealed cobalt plug has a repaired lattice structure. The annealed cobalt plug is formed by annealing a cobalt plug at a first temperature for a first duration, while exposing the cobalt plug to a first gas. The repaired lattice structure of the annealed cobalt plug is more regular or homogenized as compared to a cobalt plug that is not so annealed, such that the annealed cobalt plug has a relatively increased conductivity or reduced resistivity.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Hong-Mao Lee, Huicheng Chang, Chia-Han Lai, Chi-Hsuan Ni, Cheng-Tung Lin, Huang-Yi Huang, Chi-Yuan Chen, Li-Ting Wang, Teng-Chun Tsai, Wei-Jung Lin
  • Patent number: 10505014
    Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee, Ming-Ching Chang, Huan-Just Lin
  • Patent number: 10453999
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: October 22, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Publication number: 20190319935
    Abstract: Systems and methods for application identification in accordance with embodiments of the invention are disclosed. In one embodiment, a user device includes a processor and memory configured to store an application, a session manager, an application identifier, and at least one shared library, and the processor is configured by the session manager to communicate the application identifier and the application identifier data to an authentication server and permit the execution of the application in response to authentication of the application by the authentication server.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Applicant: DIVX, LLC
    Inventors: Eric William Grab, Kourosh Soroushian, Tung Lin, Francis Yee-Dug Chan, Evan Wallin, William David Amidei
  • Patent number: 10418271
    Abstract: According to an exemplary embodiment, a method of forming an isolation layer is provided. The method includes the following operations: providing a substrate; providing a vertical structure having a first layer over the substrate; providing a first interlayer dielectric over the first layer; performing CMP on the first interlayer dielectric; and etching back the first interlayer dielectric and the first layer to form the isolation layer corresponding to a source of the vertical structure.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Teng-Chun Tsai, Li-Ting Wang, De-Fang Chen, Cheng-Tung Lin, Chih-Tang Peng, Chien-Hsun Wang, Bing-Hung Chen, Huan-Just Lin, Yung-Cheng Lu