Patents by Inventor Wei Jen

Wei Jen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240235730
    Abstract: Disclosed are systems, methods, and non-transitory computer-readable storage media for monitoring application health via correctable errors. The method includes identifying, by a network device, a network packet associated with an application and detecting an error associated with the network packet. In response to detecting the error, the network device increments a counter associated with the application, determines an application score based at least in part on the counter, and telemeters the application score to a controller. The controller can generate a graphical interface based at least in part on the application score and a timestamp associated with the application score, wherein the graphical interface depicts a trend in correctable errors experienced by the application over a network.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Inventors: Keerthi Manjunathan Swarnamanjunathan, Chih-Tsung Huang, Kelvin Chan, Wei-Jen Huang
  • Patent number: 12033890
    Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: July 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Jen Lo, Po-Cheng Shih, Syun-Ming Jang, Tze-Liang Lee
  • Patent number: 12034500
    Abstract: A communication apparatus comprises a radio transceiver and a modem processor. The radio transceiver is configured to transmit or receive signals. The modem processor is coupled to the radio transceiver and configured to perform operations comprising: performing a beam management, to train a first receiver (Rx) beam; receiving a physical downlink shared channel (PDSCH) according to the first Rx beam; selecting at least one second Rx beam according to a scenario, if a first performance indicator of the first Rx beam is lower than a previous first performance indicator of the first Rx beam by a first threshold; determining at least one second performance indicator of the PDSCH according to a round-robin test; selecting a third Rx beam from the at least one second Rx beam according to the at least one second performance indicator; and receiving the PDSCH according to the third Rx beam.
    Type: Grant
    Filed: November 13, 2022
    Date of Patent: July 9, 2024
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Biwei Chen, Chong-You Lee, Fei Xu, Wei-Jen Chen, Yabo Li
  • Publication number: 20240222306
    Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.
    Type: Application
    Filed: March 19, 2024
    Publication date: July 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Jen WANG, Yi Dao WANG, Tung Yao LIN
  • Publication number: 20240207330
    Abstract: The present invention discloses use of Streptococcus thermophilus ST7 for modulating immunity, comprising using the Streptococcus thermophilus ST7 as an active ingredient for modulating immunity, wherein the Streptococcus thermophilus ST7 are deposited under the accession Nos. BCRC911126 and DSM34255. By administering an effective dose of Streptococcus thermophilus ST7 to an individual, the expression level of IL-12p40 on cells can be increased, the gut microbiota can be modulated and the Firmicutes/Bacteroidetes ratio in the intestine increases to improve immunity and antiviral ability.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 27, 2024
    Inventors: Wei-Jen Chen, Yu-Lun Tsai, Gilbert Aaron Lee
  • Publication number: 20240211025
    Abstract: A control device is provided. The control device is adapted to control an object in a virtual world. The control device includes a display and a controller. The display is configured to display the virtual world. The controller is coupled to the display. The controller is configured to perform the following functions. In the virtual world, a control surface is formed around a user. A first ray is emitted from the object. Based on the first ray, a first control point is formed on the control surface. According to the first control point, a first control is performed on the object.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 27, 2024
    Applicant: HTC Corporation
    Inventor: Wei-Jen Chung
  • Patent number: 12012512
    Abstract: An abrasion resistance fiber includes 90.0 parts by weight to 99.0 parts by weight of a fiber body, 0.5 parts by weight to 7.5 parts by weight of an abrasion agent, 0.1 parts by weight to 0.5 parts by weight of a paraffin-based lubricant, and 0.1 parts by weight to 0.3 parts by weight of an antioxidant. The fiber body includes polyethylene terephthalate (PET). The abrasion agent is attached to a surface of the fiber body and includes silicon dioxide aerogels.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: June 18, 2024
    Assignee: TAIWAN TEXTILE RESEARCH INSTITUTE
    Inventors: Jung Yang, Wei-Jen Lai
  • Patent number: 12015090
    Abstract: A semiconductor structure and a method of forming the same are provided. A semiconductor structure according to the present disclosure includes a first channel member and a second channel member disposed over the first channel member, a first channel extension feature coupled to the first channel member, a second channel extension feature coupled to the second channel member, and an inner spacer feature disposed between the first channel extension feature and the second channel extension feature.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: June 18, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Jen Lai, Wei-Yuan Lu, Chih-Hao Yu, Chia-Pin Lin
  • Patent number: 12009208
    Abstract: The present disclosure provides a semiconductor processing apparatus according to one embodiment. The semiconductor processing apparatus includes a chamber; a base station located in the chamber for supporting a semiconductor substrate; a preheating assembly surrounding the base station; a first heating element fixed relative to the base station and configured to direct heat to the semiconductor substrate; and a second heating element moveable relative to the base station and operable to direct heat to a portion of the semiconductor substrate.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih Yung Hung, Shahaji B. More, Chien-Feng Lin, Cheng-Han Lee, Shih-Chieh Chang, Ching-Lun Lai, Wei-Jen Lo
  • Publication number: 20240186449
    Abstract: The present disclosure provides a semiconductor device including a semiconductor structure, a first metal element-containing structure, and a layer. The semiconductor structure includes a first semiconductor layer having a first material, a second semiconductor layer, an active region between the first semiconductor layer and the second semiconductor layer. The first metal element-containing structure is located on the semiconductor structure and includes a first metal element. The layer has a second material and a second metal element and is located between the first semiconductor layer and the first metal element-containing structure. The first material has a conduction band edge Ec and a valence band edge Ev, and the second material has a work function WF1, when the first semiconductor layer is of an n-type conductivity, the work function WF1 fulfills WF1<(Ec+Ev)/2, and when the first semiconductor layer is of a p-type conductivity, the work function WF1 fulfills WF1>(Ec+Ev)/2.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 6, 2024
    Inventors: Min-Hsun HSIEH, Yu-Tsu LEE, Wei-Jen HSUEH
  • Publication number: 20240173819
    Abstract: A wafer grinding parameter optimization method and an electronic device are provided. The method includes the following. A natural frequency of a grinding wheel spindle of wafer processing equipment is obtained, and a grinding stability lobe diagram is generated accordingly. A grinding speed is selected based on a speed range of the grinding wheel spindle. Multiple grinding parameter combinations are determined based on the grinding speed. Multiple grinding simulation result combinations corresponding to the grinding parameter combinations are generated. A specific grinding parameter combination is selected based on each of the grinding simulation result combinations, and the wafer processing equipment is set accordingly.
    Type: Application
    Filed: September 12, 2023
    Publication date: May 30, 2024
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Chih-Chun Cheng, Wen-Nan Cheng, Meng-Bi Lin, Chi-Feng Li, Tzu-Fan Chiang, Wei-Jen Chen, Chien Hung Chen, Hsiu Chi Liang, Ying-Ru Shih
  • Publication number: 20240168324
    Abstract: A decoration panel includes a first substrate, a first transparent conductive element, a transparent structure, a second substrate, a second transparent conductive element, and a first cholesteric liquid crystal layer. The first transparent conductive element is disposed on the first substrate. The transparent structure is disposed on the first substrate. The second substrate is disposed opposite to the first substrate. The second transparent conductive element is disposed on the second substrate. The first cholesteric liquid crystal layer is disposed between the first transparent conductive element and the second transparent conductive element. A display apparatus is adapted to render a decoration pattern, and the decoration pattern corresponds to the transparent structure. Moreover, a display apparatus including the decoration panel is also provided.
    Type: Application
    Filed: November 20, 2023
    Publication date: May 23, 2024
    Applicant: AUO Corporation
    Inventors: Chien-Chuan Chen, Wei-Jen Su, Hsin Chiang Chiang, Chun-Han Lee, Peng-Yu Chen, Ko-Ruey Jen, Yung-Chih Chen
  • Publication number: 20240160470
    Abstract: A method of deploying microservice includes: determining whether a current load of a task queue of a target edge host is not smaller than a load alert level; if the current load is not smaller than the load alert level, calculating a task migration number of a first queue of the task queue to deploy a microservice corresponding to the first queue at at least one of a first available edge host and a cloud host; if the current load is smaller than the load alert level, calculating a long-term load according to a history pushing rate, a history consumption rate and a default time period; and when a sum of the long-term load and a current load of a second queue of the task queue is not smaller than the load alert level, deploying a microservice corresponding to the second queue at a second available edge host.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 16, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Xaver CHEN, Wei-Jen WANG
  • Patent number: D1027125
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: May 14, 2024
    Assignee: GLOBE UNION INDUSTRIAL CORP.
    Inventors: Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1027131
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: May 14, 2024
    Assignee: GLOBE UNION INDUSTRIAL CORP.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1029196
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 28, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1029202
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 28, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1029204
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 28, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1034914
    Type: Grant
    Filed: September 5, 2022
    Date of Patent: July 9, 2024
    Assignee: GLOBE UNION INDUSTRIAL CORP.
    Inventors: Yu-Chien Yang, Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1034915
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: July 9, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai