Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10236141
    Abstract: A key structure includes a membrane switch circuit member, a rubbery elastomer, a housing, a triggering element, a metallic elastic element and a keycap. The keycap is disposed on the triggering element. The rubbery elastomer is disposed on the membrane switch circuit member. The housing is located over the rubbery elastomer. The triggering element is movable relative to the housing. The metallic elastic element is contacted with the triggering element. While the keycap is depressed, the triggering element is moved relative to the housing to press the metallic elastic element. While the metallic elastic element is pushed by the triggering element, the metallic elastic element is swung to collide with the triggering element. Consequently, a click sound is generated.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: March 19, 2019
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Sheng-An Tsai, Li-Jen Chien, Hsiang-Wen Cheng, Jia-Jui Yang, Pai-Ping Hsu
  • Patent number: 10237791
    Abstract: A method of updating network detection and selection information and traffic routing information for a communication device in a wireless communication system is disclosed. The method comprises updating network detection and selection information and traffic routing information by an access stratum procedure, handover procedure, area update procedure, attach procedure, or cell selection or reselection procedure.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: March 19, 2019
    Assignee: ACER INCORPORATED
    Inventors: Wei-Chen Pao, Ching-Wen Cheng
  • Patent number: 10230551
    Abstract: A signal processing device for a receiver includes: a descrambler, descrambling an input signal to generate a descrambled signal; a phase recovery circuit, performing phase recovery according to the descrambled signal to generate a phase recovered signal; an equalization module, performing equalization according to the phase recovered signal to generate an equalized signal; and a decoder, decoding the equalized signal to obtain data included in the input signal.
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: March 12, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Ting-Nan Cho, Chia-Wei Chen, Kai-Wen Cheng, Tai-Lai Tung
  • Publication number: 20190074856
    Abstract: A symbol rate estimating device includes: a power spectrum density (PSD) estimating unit, estimating a PSD of an input signal; an index searching unit, searching for a cut-off frequency index in the PSD; an adjacent channel interference (ACI) detecting unit, detecting whether the input signal has ACI to generate a detection signal; a threshold adjusting unit, generating an adjusted index number threshold according to the detection signal; an index output unit, outputting the cut-off frequency index according to the adjusted index number threshold; and a symbol calculating unit, calculating a symbol rate of the input signal according to the cut-off frequency index.
    Type: Application
    Filed: March 1, 2018
    Publication date: March 7, 2019
    Inventors: Ting-Nan CHO, Kai-Wen CHENG, Tai-Lai TUNG
  • Patent number: 10224971
    Abstract: A symbol rate estimating device includes: a power spectrum density (PSD) estimating unit, estimating a PSD of an input signal; an index searching unit, searching for a cut-off frequency index in the PSD; an adjacent channel interference (ACI) detecting unit, detecting whether the input signal has ACI to generate a detection signal; a threshold adjusting unit, generating an adjusted index number threshold according to the detection signal; an index output unit, outputting the cut-off frequency index according to the adjusted index number threshold; and a symbol calculating unit, calculating a symbol rate of the input signal according to the cut-off frequency index.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: March 5, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Ting-Nan Cho, Kai-Wen Cheng, Tai-Lai Tung
  • Publication number: 20190062151
    Abstract: A semiconductor device includes a first substrate, a second substrate bonded to the first substrate from a first surface of the second substrate, a third substrate bonded to the second substrate from a second surface of the second substrate, a cavity defined by the first substrate, the second substrate and the third substrate; and a viewer window provided in the third substrate and aligned with the cavity; wherein the inside of the cavity is observed through the viewer window.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: CHUN-WEN CHENG, CHI-HANG CHIN, JUNG-HUEI PENG, CHIA-HUA CHU, SHANG-YING TSAI
  • Publication number: 20190068416
    Abstract: A phase error detection module includes: a constellation point selector, generating a constellation point selection signal according to a position and a radius of data of an input signal in a constellation diagram; a symbol estimator, selecting a part of all of a plurality of constellation points in the constellation diagram according to the constellation point selection signal, as a plurality of reference constellation points for calculating an estimated symbol corresponding to the data of the input signal, and a quantity of the reference constellation points is smaller than a quantity of all of the constellation points of the constellation diagram; and a phase estimator, calculating an estimated phase error of the input signal according to the data of the input signal and the estimated symbol.
    Type: Application
    Filed: May 31, 2018
    Publication date: February 28, 2019
    Inventors: Ting-Nan CHO, Kai-Wen CHENG, Tai-Lai TUNG
  • Publication number: 20190067638
    Abstract: The present invention discloses an encapsulation layer structure including a first organic layer, an inorganic thin film, and a second organic layer. The first organic layer has a bottom surface and a first wavy surface opposite to the bottom surface. The first wavy surface has a plurality of peak portions and a plurality of valley portions, and the peak portions and valley portions are alternately arranged with each other. The inorganic thin film is conformally disposed on the first wavy surface of the first organic layer, and the inorganic thin film has a second wavy surface opposite to the first wavy surface. The second organic layer is over the second wavy surface of the inorganic thin film. This encapsulation layer structure may prevent the penetration of oxygen and moisture effectively.
    Type: Application
    Filed: November 1, 2017
    Publication date: February 28, 2019
    Inventors: Ching-Yu HUANG, Ming-Hsiang LAI, Ying-Hung CHUANG, Yi-Fan NIU, Wen-Cheng CHANG
  • Publication number: 20190066988
    Abstract: A method for modifying magnetic field distribution in a deposition chamber is disclosed. The method includes the steps of providing a target magnetic field distribution, removing a first plurality of fixed magnets in the deposition chamber, replacing each of the first plurality of fixed magnets with respective ones of a second plurality of magnets, performing at least one of adjusting a position of at least one of the second plurality of the magnets, and adjusting a size of at least one of the second plurality of magnets, adjusting a magnetic flux of at least one of the second plurality of magnets, measuring the magnetic field distribution in the deposition chamber, and comparing the measured magnetic field distribution in the deposition chamber with the target magnetic field distribution.
    Type: Application
    Filed: March 29, 2018
    Publication date: February 28, 2019
    Inventors: Ming-Jie HE, Shawn YANG, Szu-Hsien LO, Shuen-Liang TSENG, Wen-Cheng CHENG, Chen-Fang CHUNG, Chia-Lin HSUEH, Kuo-Pin CHUANG
  • Publication number: 20190054353
    Abstract: A head of a golf club is provided with a high coefficient of restitution. The head has a club head, a shaft, and a buffer element. The club head has a face panel and an installing seat. The face panel is mounted on one side of the club head. The installing seat is formed on another side of the club head and has a through hole. The shaft is an elongated body, is mounted in the club head, and has a cavity and a mounting portion on two ends of the shaft. The mounting portion is securely mounted on the installing seat. The buffer element is a compressible and resilient body, and abuts the face panel. When hitting a golf, the face panel deforms concavely, and the impulse force is conserved by the buffer element so that the face panel may not split or break.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 21, 2019
    Inventor: Wen-Cheng TSENG
  • Publication number: 20190058063
    Abstract: An improved conductive feature for a semiconductor device and a technique for forming the feature are provided. In an exemplary embodiment, the semiconductor device includes a substrate having a gate structure formed thereupon. The gate structure includes a gate dielectric layer disposed on the substrate, a growth control material disposed on a side surface of the gate structure, and a gate electrode fill material disposed on the growth control material. The gate electrode fill material is also disposed on a bottom surface of the gate structure that is free of the growth control material. In some such embodiments, the gate electrode fill material contacts a first surface and a second surface that are different in composition.
    Type: Application
    Filed: October 22, 2018
    Publication date: February 21, 2019
    Inventors: Chih-Nan Wu, Shiu-Ko JangJian, Chun Che Lin, Wen-Cheng Hsuku
  • Publication number: 20190055120
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 21, 2019
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 10210788
    Abstract: A displaying method includes following steps: converting first image data into second image data; performing subpixel rendering on second image data to generate third image data; determining whether the first image data includes first pixel data having a gray brightness value which is not greater than a first threshold; determining whether a gray brightness value of second pixel data of the third image data corresponding to the first pixel data is greater than a second threshold; and converting the third image data into fourth image data. The second pixel data is corresponding to third pixel data in the fourth image data. The third pixel data include at least one first subpixel data having a gray brightness value smaller than the gray brightness value of the subpixel data of the third image data corresponding to the first subpixel data.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: February 19, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shang-Yu Su, Sheng-Wen Cheng
  • Publication number: 20190052920
    Abstract: A roll-off parameter determining module disposed at a receiving terminal is provided. The receiving terminal receives first roll-off information of a first frame and second roll-off information of a second frame. The first frame is adjacent to the second frame. The module for determining a roll-off parameter includes: a register unit; a first determining unit, determining whether one of the first roll-off information and the second roll-off information includes a first data type, and generating a first roll-off parameter indicator; a second determining unit, determining whether one of the first roll-off information and the second roll-off information includes a second data type and outputting a second roll-off parameter indicator; and a look-up table (LUT) unit, looking up an LUT according to the first roll-off parameter indicator and a second roll-off parameter indicator to output a roll-off parameter.
    Type: Application
    Filed: February 7, 2018
    Publication date: February 14, 2019
    Inventors: Szu-Hsiang LAI, Yu-Shen CHOU, Kai-Wen CHENG
  • Publication number: 20190052485
    Abstract: A signal processing device for a receiver includes: a descrambler, descrambling an input signal to generate a descrambled signal; a phase recovery circuit, performing phase recovery according to the descrambled signal to generate a phase recovered signal; an equalization module, performing equalization according to the phase recovered signal to generate an equalized signal; and a decoder, decoding the equalized signal to obtain data included in the input signal.
    Type: Application
    Filed: February 7, 2018
    Publication date: February 14, 2019
    Inventors: Ting-Nan CHO, Chia-Wei CHEN, Kai-Wen CHENG, Tai-Lai TUNG
  • Patent number: 10202278
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: February 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Yi-Chien Wu, Yu-Chia Liu, Chun-Wen Cheng
  • Patent number: 10204573
    Abstract: A pixel matrix having a plurality of pixel units. Each pixel unit has at least 12 sub-pixels arranged in matrix manner. The pixel unit has at least 4 first color sub-pixels, at least 4 second color sub-pixels, and at least 4 third color sub-pixels. Each two of the first color sub-pixels are arranged adjacent to each other to form at least 2 first color sub-pixel pairs, and the first color sub-pixel pairs are separately provided in different columns and different rows of the pixel unit. Each two of the second color sub-pixels are arranged adjacent to each other to form at least 2 second color sub-pixel pairs, and the second color sub-pixel pairs are separately provided in different columns and different rows of the pixel unit. Each first color sub-pixel pair and each second color sub-pixel pair are arranged adjacent to each other in a column direction.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: February 12, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hui Chu-Ke, Sheng-Wen Cheng
  • Patent number: 10199029
    Abstract: An earpiece of a headset uses a first signal and a second signal received from an in-ear microphone and an outside microphone, respectively, to enhance microphone signals. The in-ear microphone is positioned at a proximal side of the earpiece with respect to an ear canal of a user, and the outside microphone is positioned at a distal side of the earpiece with respect to the ear canal. A processing unit includes a filter, which digitally filters out in-ear noise from the first signal using the second signal as a reference to produce a de-noised signal to thereby enhance the microphone signals.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: February 5, 2019
    Assignee: MediaTek, Inc.
    Inventors: Chao-Ling Hsu, Yiou-Wen Cheng, Chih-Ping Lin, Chieh-Cheng Cheng
  • Publication number: 20190035933
    Abstract: A semiconductor device includes a fin-like structure extending along a first axis; a first source/drain feature disposed at a first end portion of the fin-like structure; and a constraint layer disposed at a first side of the first end portion of the fin-like structure, wherein the first source/drain feature comprises a first portion, disposed at the first side, the first portion comprising a shorter extended width along a second axis, and a second portion, disposed at a second side that is opposite to the first side, the second portion comprising a longer extended width along the second axis.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 31, 2019
    Inventors: Wei-Yang LO, Tung-Wen CHENG
  • Publication number: 20190035611
    Abstract: In an embodiment, a system includes: a chamber; and a magnetic assembly contained within the chamber. The magnetic assembly comprises: an inner magnetic portion comprising first magnets; and an outer magnetic portion comprising second magnets. At least two adjacent magnets, of either the first magnets or the second magnets, have different vertical displacements, and the magnetic assembly is configured to rotate around an axis to generate an electromagnetic field that moves ions toward a target region within the chamber.
    Type: Application
    Filed: May 25, 2018
    Publication date: January 31, 2019
    Inventors: Chen-Fang Chung, Wen-Cheng Cheng, Tsez-Chong Tsai, Shuen-Liang Tseng, Szu-Hsien Lo, Shawn Yang, Ming-Jie He