Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Magnetoresistive Random Access Memory Cell and Fabricating the Same
    Publication number: 20160056370
    Abstract: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.
    Type: Application
    Filed: October 30, 2015
    Publication date: February 25, 2016
    Inventors: Kuo-Ming Wu, Chia-Shiung Tsai, Cheng-Yuan Tsai, Kai-Wen Cheng
  • SYSTEMS AND METHODS FOR GENERATING COMPLEX VECTORIAL OPTICAL FIELDS
    Publication number: 20160055929
    Abstract: A vectorial optical field generator includes a radiation source a modulator surface, a first quarter wave plate, a second quarter wave plate, and an output plane. The radiation source emits an input radiation along a path and the modulator surface is positioned along the path and configured to modulate a phase, an amplitude, a polarization ratio, and a retardation of the input radiation along a fourth area of the modulator surface. The output plane is positioned along the path and receives output radiation resulting from modulating the input radiation with the modulator surface, the first quarter wave plate, and the second quarter wave plate.
    Type: Application
    Filed: June 17, 2015
    Publication date: February 25, 2016
    Applicant: University of Dayton
    Inventors: Qiwen Zhan, Wei Han, Wen Cheng
  • DISPLAY DEVICE
    Publication number: 20160055820
    Abstract: A display device is provided. The display device includes a display panel, an image signal input unit, and a sub-pixel rendering (SPR) unit. The display panel includes a plurality of repeating units. Each repeating unit includes at least eight sub-pixels. These sub-pixels include two first color sub-pixels, two second color sub-pixels, two third color sub-pixels, at least one first white sub-pixel, and at least one second white sub-pixel. The first and the second white sub-pixels have different chromaticity and the first and the second white sub-pixels are located in different rows. The image signal input unit serves to receive image signals. The sub-pixel rendering unit is used for performing sub-pixel rendering processes to the image signals, so that the above sub-pixels of the display panel produce performance values.
    Type: Application
    Filed: December 11, 2014
    Publication date: February 25, 2016
    Inventors: Hui Chu Ke, Sheng-Wen Cheng
  • Thin film transistor substrate
    Patent number: 9269637
    Abstract: A TFT substrate includes: a substrate; and a plurality of TFTs, wherein each of the TFTs comprises: a gate electrode, disposed on the substrate; a gate insulating layer, disposed on the substrate and covering the gate electrode; a metallic oxide active layer, disposed on the gate insulating layer; a metallic oxide protection layer, disposed on the metallic oxide active layer; an etching stop layer, disposed on the metallic oxide protection layer, wherein a first through hole and a second through hole penetrate through the etching stop layer and the metallic oxide protection layer; and a source electrode and a drain electrode, disposed in the first through hole and the second through hole respectively, and electrically connected to the metallic oxide active layer.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: February 23, 2016
    Assignee: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Chin-Tzu Kao, Wen-Cheng Lu
  • Oxidizing the source and doping the drain of a thin-film transistor
    Patent number: 9269827
    Abstract: A method for manufacturing a thin-film transistor (TFT) is provided, including the following steps. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A patterned semiconductor layer is formed on the gate insulating layer. A source is formed on the patterned semiconductor layer. The peripheral portion of the source is oxidized to form an oxide layer, wherein the oxide layer covers the source and a portion of the patterned semiconductor layer. A protective layer and hydrogen ions are formed, wherein the protective layer covers the oxide layer and the patterned semiconductor layer. The patterned semiconductor layer not covered by the oxide layer is doped with the hydrogen ions to form a drain. A TFT is also provided.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: February 23, 2016
    Assignee: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Chin-Tzu Kao, Ya-Ju Lu, Hsiang-Hsien Chung, Wen-Cheng Lu
  • FIELD EFFECT TRANSISTOR WITH NON-DOPED CHANNEL
    Publication number: 20160049498
    Abstract: Some embodiments of the present disclosure provide a semiconductor structure, including a substrate having a top surface; a first doped region in proximity to the top surface; a non-doped region positioned in proximity to the top surface and adjacent to the first doped region, having a first width; a metal gate positioned over the non-doped region and over a portion of the first doped region, having a second width. The first width is smaller than the second width, and material constituting the non-doped region is different from material constituting the substrate.
    Type: Application
    Filed: August 13, 2014
    Publication date: February 18, 2016
    Inventors: TUNG-WEN CHENG, CHANG-YIN CHEN, CHE-CHENG CHANG, MU-TSANG LIN
  • METHODS FOR PACKAGING A MICROELECTROMECHANICAL SYSTEM (MEMS) WAFER AND APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC) DIES USING THROUGH MOLD VIAS (TMVS)
    Publication number: 20160046483
    Abstract: A method for packaging a microelectromechanical system (MEMS) device with an integrated circuit die using through mold vias (TMVs) is provided. According to the method, a MEMS substrate having a MEMS device is provided. A cap substrate is secured to a top surface of the MEMS substrate. The cap substrate includes a recess corresponding to the MEMS device in a bottom surface of the cap substrate. An integrated circuit die is secured to a top surface of the cap substrate over the recess. A housing covering the MEMS substrate, the cap substrate, and the integrated circuit die is formed. A through mold via (TMV) electrically coupled with the integrated circuit die and extending between a top surface of the housing and the integrated circuit die is formed. The structure resulting from application of the method is also provided.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 18, 2016
    Inventors: Chun-Wen Cheng, Hung-Chia Tsai
  • METHODS FOR PACKAGING A MICROELECTROMECHANICAL SYSTEM (MEMS) WAFER AND APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC) DIES USING WIRE BONDING
    Publication number: 20160046484
    Abstract: A method for packaging a microelectromechanical system (MEMS) device with an integrated circuit die using wire bonds is provided. According to the method, a MEMS substrate having a MEMS device is provided. A cap substrate is secured to a top surface of the MEMS substrate. The cap substrate includes a recess corresponding to the MEMS device in a bottom surface of the cap substrate. An integrated circuit die is secured to a top surface of the cap substrate over the recess. A conductive stud or external wire bond electrically coupled with the integrated circuit die and extending vertically up is formed. A housing covering the MEMS substrate, the cap substrate, and the integrated circuit die, and with a top surface approximately coplanar with a top surface of the conductive stud or external wire bond, is formed. The structure resulting from application of the method is also provided.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 18, 2016
    Inventors: Chun-Wen Cheng, Hung-Chia Tsai
  • SEMICONDUCTOR STRUCTURE AND MANUFACUTING METHOD OF THE SAME
    Publication number: 20160049483
    Abstract: The present disclosure provide a semiconductor structure, including a substrate having a top surface; a gate over the substrate, the gate including a footing region in proximity to the top surface, the footing region including a footing length laterally measured at a height under 10 nm above the top surface; and a spacer surrounding a sidewall of the gate, including a spacer width laterally measured at a height of from about 10 nm to about 200 nm above the top surface. The footing length is measured, along the top surface, from an end of a widest portion of the footing region to a vertical line extended from an interface between a gate body and the spacer, and the spacer width is substantially equal to or greater than the footing length.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 18, 2016
    Inventors: ZHE-HAO ZHANG, TUNG-WEN CHENG, CHANG-YIN CHEN, KUO HUI CHANG, CHE-CHENG CHANG, MU-TSANG LIN
  • HEAD-UP DISPLAY DEVICE
    Publication number: 20160048020
    Abstract: A head-up display device comprises a reflective mirror mounting bracket having an accommodation space; a reflective mirror arranged on the reflective mirror mounting bracket, receiving a real image and reflecting the real image to generate a reflected image; and a concave imaging mirror mounting bracket accommodating a concave imaging mirror, wherein the concave imaging mirror is coated with an antireflection film on one side and coated with a semi-transmitting film on the other side, reflects the reflected image of the reflective mirror and presents a distant magnified virtual image. The present invention is characterized in a small size; no need to install the device inside the instrument panel system; directly using an existing display device to generate a distant magnified virtual image; and easiness for users to install the device.
    Type: Application
    Filed: October 27, 2014
    Publication date: February 18, 2016
    Inventors: CHUN-YAO SHIH, JIH-TAO HSU, SHUN-WEN CHENG
  • MEMS integrated pressure sensor devices and methods of forming same
    Patent number: 9260296
    Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • MEMS integrated pressure sensor devices having isotropic cavities and methods of forming same
    Patent number: 9260295
    Abstract: A method embodiment includes providing a MEMS wafer comprising an oxide layer, a MEMS substrate, a polysilicon layer. A carrier wafer comprising a first cavity formed using isotropic etching is bonded to the MEMS, wherein the first cavity is aligned with an exposed first portion of the polysilicon layer. The MEMS substrate is patterned, and portions of the sacrificial oxide layer are removed to form a first and second MEMS structure. A cap wafer including a second cavity is bonded to the MEMS wafer, wherein the bonding creates a first sealed cavity including the second cavity aligned to the first MEMS structure, and wherein the second MEMS structure is disposed between a second portion of the polysilicon layer and the cap wafer. Portions of the carrier wafer are removed so that first cavity acts as a channel to ambient pressure for the first MEMS structure.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Structure and method for integrated microphone
    Patent number: 9264833
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate; a silicon oxide layer formed on one side of the first silicon substrate; a second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates; and a diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates, wherein the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: February 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Yao-Te Huang, Chin-Yi Cho, Li-Min Hung, Chun-Wen Cheng
  • PIXEL ARRAY AND HEAD UP DISPLAY
    Publication number: 20160041437
    Abstract: A pixel array that includes a plurality of repeat unit sets is provided. Each of the repeat unit sets includes a first scan line, a second scan line, a first data line, a second data line, a third data line, a fourth data line, at least two first color sub-pixels, at least two second color sub-pixels, at least two third color sub-pixels, and a fourth color sub-pixel. Each of the first color sub-pixels, the second color sub-pixels, and the third color sub-pixels has a first short side length and a first long side length. The fourth color sub-pixel has a second short side length and a second long side length, and the second long side length is greater than the first long side length.
    Type: Application
    Filed: December 2, 2014
    Publication date: February 11, 2016
    Inventors: Hui-Feng Lin, Sheng-Wen Cheng
  • Method of Access Network Detection and Selection
    Publication number: 20160044591
    Abstract: A method of access network detection and selection for a radio access node in a wireless communication system is disclosed. The method comprises providing a radio access network (RAN) assistance information including a plurality of WLAN ID, priority, and WLAN information to a communication device of the wireless communication system, wherein the WLAN information includes at least one of frequency, available bandwidth, channel, operator ID, trusted/untrusted WLAN, capability of S2a supporting, Venue, and WLAN operation mode.
    Type: Application
    Filed: August 5, 2015
    Publication date: February 11, 2016
    Inventors: Wei-Chen Pao, Ching-Wen Cheng
  • METAMATERIAL AND BIOLOGICAL AND CHEMICAL DETECTING SYSTEM
    Publication number: 20160041093
    Abstract: A metamaterial is suitable for receiving a detecting wave. The detecting wave interacts with the metamaterial. The metamaterial includes a substrate and at least one unit cell placed on the substrate. The size of the unit cell is at least less than ? of the wavelength of the detecting wave. A biological and chemical detecting system using the metamaterial is also disclosed.
    Type: Application
    Filed: January 21, 2015
    Publication date: February 11, 2016
    Inventors: Ta-Jen YEN, Cheng-Kuang CHEN, Chu-En LIN, Hui-Wen CHENG
  • METHOD AND APPARATUS OF CONGESTION MANAGEMENT
    Publication number: 20160044530
    Abstract: A congestion management method is provided. The radio access node detects and determining a congestion. The radio access node performs a process of a congestion mitigation decision if the congestion is detected and determined. The radio access node performs a congestion mitigation process based on a result of the congestion mitigation decision. The radio access node detects and determines a congestion relief The radio access node stops the congestion mitigation process, and the congestion control process according to the congestion is stopped accordingly.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 11, 2016
    Inventors: Ching-Wen Cheng, Hung-Chen Chen, Tzu-Jane Tsai
  • MEMS device with a capping substrate
    Patent number: 9254998
    Abstract: An integrated circuit device includes a dielectric layer disposed onto a first substrate, the dielectric layer having a sacrificial cavity formed therein. The circuit also includes a membrane layer formed onto the dielectric layer and suspended over the sacrificial cavity, and a capping substrate bonded to the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity though a via formed into the membrane layer.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Huan Chu
  • Systems and methods for an integrated bio-entity manipulation and processing semiconductor device
    Patent number: 9254487
    Abstract: An integrated semiconductor device for manipulating and processing bio-entity samples is disclosed. The device includes a microfluidic channel that is coupled to fluidic control circuitry, a photosensor array coupled to sensor control circuitry, an optical component aligned with the photosensor array to manipulate a light signal before the light signal reaches the photosensor array, and a microfluidic grid coupled to the microfluidic channel and providing for transport of bio-entity sample droplets by electrowetting. The device further includes logic circuitry coupled to the fluidic control circuitry and the sensor control circuitry, with the fluidic control circuitry, the sensor control circuitry, and the logic circuitry being formed on a first substrate.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsien Chang, Chun-Ren Cheng, Alex Kalnitsky, Chun-Wen Cheng
  • CMOS-MEMS integrated flow for making a pressure sensitive transducer
    Patent number: 9254997
    Abstract: A sensor is made up of two substrates which are adhered together. A first substrate includes a pressure-sensitive micro-electrical-mechanical (MEMS) structure and a conductive contact structure that protrudes outwardly beyond a first face of the first substrate. A second substrate includes a complementary metal oxide semiconductor (CMOS) device and a receiving structure made up of sidewalls that meet a conductive surface which is recessed from a first face of the second substrate. A conductive bonding material physically adheres the conductive contact structure to the conductive surface and electrically couples the MEMS structure to the CMOS device.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: February 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Kai-Chih Liang, Chia-Hua Chu