Patents by Inventor Wen Chou

Wen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230188266
    Abstract: One wireless communication method includes: receiving a request action frame; and in response to the request action frame, generating and sending an acknowledgement (ACK) control frame that is configured to serve as a response action frame for the request action frame, wherein the response action frame is not solicited by the request action frame. Another wireless communication method includes: receiving a request action frame; and in response to the request action frame, generating and sending an acknowledgement (ACK) control frame and a time-constrained response action frame following the ACK control frame, wherein the time-constrained response action frame is solicited by the request action frame.
    Type: Application
    Filed: November 24, 2022
    Publication date: June 15, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chien-Fang Hsu, Cheng-Ying Wu, Chao-Wen Chou, Yongho Seok
  • Publication number: 20230169265
    Abstract: The invention provides a method for automatically filling a digital report form with relevant user data. The method includes obtaining a digital report form and extracting an input data model from the digital report form. A query is then generated based on the input data model. A digital user record is obtained, relevant user data is identified in the digital user record based on the query and extracted. The digital report form is then filled based on the relevant user data.
    Type: Application
    Filed: April 30, 2021
    Publication date: June 1, 2023
    Inventors: ZUOFENG LI, DONG WEN, LIANG TAO, HSU-WEN CHOU, YIYI HU, YUN ZHOU, XIAOYI HU
  • Publication number: 20230119373
    Abstract: A mounting system for window blinds is provided. The mounting system provides components that can be used to mount a window blind or shade. The components of the mounting system include support brackets, mounting clips, railing devices, adjustable arms, spacers, etc. These components can be provided in different combinations to mount different types of blinds or shades to walls or ceilings, regardless of whether the wall to be mounted to is above, behind, or to the sides of the window blind.
    Type: Application
    Filed: January 14, 2022
    Publication date: April 20, 2023
    Inventors: Tser Wen Chou, Mason Chou
  • Publication number: 20230119716
    Abstract: A mounting system for window blinds is provided. The mounting system provides components that can be used to mount a window blind or shade. The components of the mounting system include flex brackets, mounting clips, railing devices, adjustable arms, spacers, etc. These components can be provided in different combinations to mount different types of blinds or shades to walls or ceilings, regardless of whether the wall to be mounted to is above, behind, or to the sides of the window blind.
    Type: Application
    Filed: March 4, 2022
    Publication date: April 20, 2023
    Inventors: Tser Wen Chou, Mason Chou
  • Publication number: 20230110957
    Abstract: An electronic device includes a main printed circuit board (PCB) assembly comprising a bottom PCB and a semiconductor package mounted on an upper surface of the bottom PCB. The semiconductor package includes a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die and the top surface of the substrate are encapsulated by a molding compound. A top PCB is mounted on the semiconductor package through first connecting elements.
    Type: Application
    Filed: September 7, 2022
    Publication date: April 13, 2023
    Applicant: MEDIATEK INC.
    Inventors: Ya-Lun Yang, Wen-Chou Wu, Che-Hung Kuo
  • Publication number: 20230116326
    Abstract: A semiconductor package includes a bottom package having a substrate and a semiconductor die mounted on a top surface of the substrate. The semiconductor die has an active surface and a rear surface coupled to the top surface of the substrate. The semiconductor die comprises through silicon vias. A top package is stacked on the bottom package. The top package comprises a memory component. A middle re-distribution layer (RDL) structure is disposed between the top package and the bottom package. The active surface of the semiconductor die is directly connected to the middle RDL structure through connecting elements. The memory component is electrically connected to the substrate via the interconnect structures of the middle RDL structure and the through silicon vias of the semiconductor die.
    Type: Application
    Filed: September 6, 2022
    Publication date: April 13, 2023
    Applicant: MEDIATEK INC.
    Inventors: Ya-Lun Yang, Wen-Chou Wu, Che-Hung Kuo
  • Publication number: 20230065896
    Abstract: A probe card and a wafer testing assembly thereof are provided. The wafer testing assembly includes a printed circuit board, a space transformer, a plurality of copper pillars and a plurality of strengthening structure units. The printed circuit board includes a bottom surface and a plurality of first contacts arranged on the bottom surface. The space transformer includes a top surface and a plurality of second contacts. The second contacts are arranged on the top surface and corresponding to the first contacts. The copper pillars are respectively arranged between the first contacts and the second contacts. Two ends of each of the copper pillars are respectively electrically connected to the first contacts and the second contacts. The strengthening structure units are arranged on the bottom surface of the printed circuit board and respectively surrounding the copper pillars.
    Type: Application
    Filed: July 1, 2022
    Publication date: March 2, 2023
    Applicant: MPI Corporation
    Inventors: Yi-Chien Tsai, Huo-Kang Hsu, Yu-Wen Chou, Yu-Shan Hu
  • Publication number: 20230063464
    Abstract: A blind pull cord connector has a cord passage section and a connection section. The cord passage section has more than one cord passage bodies, each of which is formed with a through hole. An inner face of each cord passage body is formed with a cut face. The connection section is passed through a punched hole of rear side of a blind slat, whereby the cord passage section is positioned on outer side of the slat. When the slat is horizontally opened or vertically closed, the connector structure is limited by the slat so that the connector is connected with the blind slat and naturally kept horizontal. In this case, a pull cord can be easily and quickly passed through the through holes of the cord passage bodies, whereby the frictional resistance against the pulling of the pull cord is reduced and the slats can be more tightly closed. In addition, by means of the restriction of the cord passage bodies of the cord passage section, a ladder cord and the pull cord are located.
    Type: Application
    Filed: October 7, 2021
    Publication date: March 2, 2023
    Inventor: Tser Wen CHOU
  • Patent number: 11591851
    Abstract: A free hanging safety bead chain tension device includes a clutch, a bead chain for controlling ascending/descending of a roller shade, a tension rod and more than one restriction seats. The bead chain is connected with the tension rod and the restriction seats are disposed on the rod body of the tension rod. Each restriction seat has one or more restriction tunnels for locating the bead chain adjacent to the tension rod. When pulling the bead chain to control the ascending/descending of the roller shade, the bead chain is positioned by the tension rod and the restriction seats. Accordingly, not only the bead chain can be still smoothly pulled, but also the bead chain is prevented from being pulled out by a space sufficient to twist around a neck. Therefore, a child is prevented from pulling the bead chain to twist the bead chain around the child's neck so that a safety effect is achieved.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: February 28, 2023
    Inventors: Tser Wen Chou, Mason Chou
  • Publication number: 20230039444
    Abstract: A semiconductor package includes a first package having a first side and a second side opposing the first side. The first package comprises a first electronic component and a second electronic component arranged in a side-by-side manner on the second side. A second package is mounted on the first side of the first package. The second package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Application
    Filed: October 14, 2022
    Publication date: February 9, 2023
    Applicant: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Publication number: 20220396999
    Abstract: An apparatus for controlling tilting and lifting operation of a window blind is provided. The apparatus includes a tilting control shaft and a lifting control shaft. A ladder belt is fastened to the tilting control shaft and interconnects the slats of the window blind, such that rotating the tilting control shaft tilts the slats. Multiple lifting cords are fastened to the lifting control shaft and connected to the blind bottom of the window blind, such that rotating the lifting control shaft lifts or lowers the blind bottom and one or more slats.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 15, 2022
    Inventors: Tser Wen Chou, Mason Chou
  • Publication number: 20220385086
    Abstract: A control method of power supply for a portable electronic device is disclosed. The portable electronic device includes a power supply module and a control circuit, and the power supply module is configured to provide electric power to the portable electronic device. The control method of power supply includes detecting, by the control circuit, a system status of the portable electronic device or a module status of the power supply module; and adjusting, by the control circuit, a reserved battery capacity of a main battery of the power supply module according to the system status of the portable electronic device or the module status of the power supply module.
    Type: Application
    Filed: August 3, 2021
    Publication date: December 1, 2022
    Applicant: Wistron Corporation
    Inventors: Chung-Kai Lei, Kuan-Yu Chen, Ching-Wen Chou
  • Patent number: 11509038
    Abstract: A semiconductor package includes a bottom chip package having a first side and a second side opposing the first side. The bottom chip package comprises a first semiconductor chip and a second semiconductor chip arranged in a side-by-side manner on the second side. A top antenna package is mounted on the first side of the bottom chip package. The top antenna package comprises a radiative antenna element. A connector is disposed on the second side.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: November 22, 2022
    Assignee: MEDIATEK INC.
    Inventors: Wen-Chou Wu, Yi-Chieh Lin, Chia-Yu Jin, Hsing-Chih Liu
  • Publication number: 20220349919
    Abstract: A probe installation circuit board includes an insulating layer provided on upper and lower surfaces thereof with a trace structure including two grounding traces and a signal trace located therebetween, and a grounding layer. Each grounding trace is connected with the grounding layer by at least one conductive via including a through hole penetrating through the grounding trace and the insulating layer, and a conductive layer disposed therein to electrically connect the grounding trace and layer. The signal trace and the conductive layers are made of a metal material. The grounding layer and traces are made of another metal material. A probe device includes the circuit board and three probes disposed on the traces respectively. The present invention is capable of thin copper traces and lowered trace surface roughness, easy in control of trace distance, width and thickness, and beneficial to achieve the fine pitch requirement.
    Type: Application
    Filed: April 22, 2022
    Publication date: November 3, 2022
    Applicant: MPI CORPORATION
    Inventors: YU-SHAN HU, SHAO-LUN WEI, YI-LUNG LEE, YU-WEN CHOU
  • Publication number: 20220351634
    Abstract: The invention relates to intent classification of questions provided to a question answering, QA, system. A proposed method identifies negative emotion of the user, and, responsive to identifying negative emotion of the user, identifies an incorrect answer provided to the user. The incorrect answer and its associated question is analyzed to determine whether incorrect classification of the associated question's intent is responsible 5 for the incorrect answer. Either an intent classification algorithm of the QA system or a QA algorithm selection process of the QA system is then modified accordingly.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 3, 2022
    Inventors: Dong WEN, Yun ZHOU, Zuofeng LI, Hsu-Wen CHOU, Yiyi HU
  • Publication number: 20220352084
    Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 3, 2022
    Applicant: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tao Cheng, Nan-Cheng Chen, Che-Ya Chou, Wen-Chou Wu, Yen-Ju Lu, Chih-Ming Hung, Wei-Hsiu Hsu
  • Publication number: 20220312583
    Abstract: A trace embedded probe device includes a circuit board including an insulating layer unit whose upper surface has first recesses and a second recess located therebetween, grounding traces and a signal trace whose trace main bodies are disposed in the recesses respectively and flush in elevation with the upper surface, and a grounding layer disposed on a lower surface of the insulating layer unit and connected with the grounding traces by conductive vias penetrating through the first recesses and the lower surface and provided therein with conductive layers. The trace main bodies, grounding layer and conductive layers are made of a same metal material. Probes are disposed on the grounding and signal traces respectively. The probe device is easy in control of distance, width, thickness and surface roughness of the traces, and beneficial to achieve the requirements of thin copper traces, fine pitch and high frequency testing.
    Type: Application
    Filed: March 22, 2022
    Publication date: September 29, 2022
    Applicant: MPI CORPORATION
    Inventors: Yu-Shan HU, Yi-Lung LEE, Shao-Lun WEI, Yu-Wen CHOU
  • Publication number: 20220302574
    Abstract: A semiconductor package includes a substrate having thereon at least an antenna layer and a ground reflector layer under the antenna layer, a radio frequency (RF) die disposed on or in the substrate, a molding compound disposed on the antenna layer of the substrate, and a frequency-selective surface (FSS) structure disposed on the molding compound. The FSS structure is a two-dimensional periodic array of metal patterns of same shape and size. The FSS structure has highly reflective characteristic.
    Type: Application
    Filed: April 4, 2022
    Publication date: September 22, 2022
    Applicant: MediaTek Inc.
    Inventors: Shih-Chia Chiu, Yen-Ju Lu, Wen-Chou Wu, Nan-Cheng Chen
  • Patent number: 11417650
    Abstract: An integrated circuit including a substrate, a first semiconductor element, and a second semiconductor element is provided. The substrate has a high voltage region and a low voltage region separated from each other. The first semiconductor element is located in the high voltage region. The first semiconductor element includes a first oxide layer and a first gate. The first oxide layer is embedded in the substrate. The first gate is located on the first oxide layer. The first gate is a polycrystalline gate. The second semiconductor element is located in the low voltage region. The second semiconductor element includes a second oxide layer and a second gate. The second oxide layer is embedded in the substrate. The second gate is located on the second oxide layer. The second gate is a metal gate. A manufacturing method of an integrated circuit is also provided.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: August 16, 2022
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Chieh Pu, Jih-Wen Chou, Chih-Chung Tai
  • Patent number: 11373957
    Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: June 28, 2022
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tao Cheng, Nan-Cheng Chen, Che-Ya Chou, Wen-Chou Wu, Yen-Ju Lu, Chih-Ming Hung, Wei-Hsiu Hsu