Patents by Inventor Wen Chou

Wen Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220026552
    Abstract: A radar module includes a printed circuit board (PCB) and a semiconductor package mounted on the PCB. The semiconductor package comprises an integrated circuit die and a substrate for electrically connecting the integrated circuit die to the PCB. The substrate comprises an antenna layer integrated into the semiconductor package and electrically connected to the integrated circuit die for at least one of transmitting and receiving radar signals. A discrete pattern-shaping device is mounted on the PCB and is configured to shape a radiation pattern of the radar signals.
    Type: Application
    Filed: October 6, 2021
    Publication date: January 27, 2022
    Applicant: MediaTek Inc.
    Inventors: Yen-Ju Lu, Chih-Ming Hung, Wen-Chou Wu
  • Publication number: 20210400728
    Abstract: One wireless communication device includes a transmitter circuit and a control circuit, wherein the control circuit sets a request to send (RTS) frame, and controls the transmitter circuit to transmit the RTS frame via at least one channel excluding a preamble punctured channel. Another wireless communication device includes a transmitter circuit and a control circuit, wherein the control circuit sets an RTS frame, and controls the transmitter circuit to transmit the RTS frame via a plurality of channels including the preamble punctured channel.
    Type: Application
    Filed: June 21, 2021
    Publication date: December 23, 2021
    Applicant: MEDIATEK INC.
    Inventors: Cheng-Yi Chang, Chao-Wen Chou, Kun-Sheng Huang, Chin-Chi Chang
  • Publication number: 20210351179
    Abstract: An integrated circuit including a substrate, a first semiconductor element, and a second semiconductor element is provided. The substrate has a high voltage region and a low voltage region separated from each other. The first semiconductor element is located in the high voltage region. The first semiconductor element includes a first oxide layer and a first gate. The first oxide layer is embedded in the substrate. The first gate is located on the first oxide layer. The first gate is a polycrystalline gate. The second semiconductor element is located in the low voltage region. The second semiconductor element includes a second oxide layer and a second gate. The second oxide layer is embedded in the substrate. The second gate is located on the second oxide layer. The second gate is a metal gate. A manufacturing method of an integrated circuit is also provided.
    Type: Application
    Filed: July 9, 2020
    Publication date: November 11, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Chieh Pu, Jih-Wen Chou, Chih-Chung Tai
  • Patent number: 11169250
    Abstract: A radar module includes a printed circuit board (PCB) and a semiconductor package mounted on the PCB. The semiconductor package comprises an integrated circuit die and a substrate for electrically connecting the integrated circuit die to the PCB. The substrate comprises an antenna layer integrated into the semiconductor package and electrically connected to the integrated circuit die for at least one of transmitting and receiving radar signals. A discrete pattern-shaping device is mounted on the PCB and is configured to shape a radiation pattern of the radar signals.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: November 9, 2021
    Assignee: MediaTek Inc.
    Inventors: Yen-Ju Lu, Chih-Ming Hung, Wen-Chou Wu
  • Patent number: 11150269
    Abstract: A probe head includes a probe seat, a first spring probe penetrating through upper, middle and lower dies of the probe seat for transmitting a first test signal, and at least two shorter second spring probes penetrating through the lower die for transmitting a second test signal with higher frequency. Two second spring probes are electrically connected in a way that top ends thereof are abutted against two electrically conductive contacts on a bottom surface of the middle die electrically connected by a connecting circuit therein. The lower die has a communicating space and at least two lower installation holes communicating therewith and each accommodating a second spring probe partially located in the communicating space. The probe head is adapted for concurrent high and medium or low frequency signal tests, meets fine pitch and high frequency testing requirements and prevents probe cards from too complicated circuit design.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: October 19, 2021
    Assignee: MPI CORPORATION
    Inventors: Hui-Pin Yang, Shang-Jung Hsieh, Yu-Wen Chou, Ching-Fang Yu, Huo-Kang Hsu, Chin-Tien Yang
  • Publication number: 20210314951
    Abstract: A wireless communication terminal including a wireless transceiver and a controller is provided. The wireless transceiver performs wireless transmission and reception to and from an AP. The controller is coupled to the wireless transceiver, and is operable to configure the wireless communication terminal to operate as a non-AP STA, and transmit a MU PPDU with a single RU spanning a partial bandwidth of the MU PPDU to the AP via the wireless transceiver. In particular, the partial bandwidth excludes a frequency band of a primary channel.
    Type: Application
    Filed: March 18, 2021
    Publication date: October 7, 2021
    Inventors: Cheng-Yi CHANG, Chao-Wen CHOU, Kun-Sheng HUANG, Fu-Yu TSAI, Hung-Tao HSIEH
  • Publication number: 20210265368
    Abstract: A non-volatile memory device includes a substrate, a stacked structure, an anti-fuse gate, a gate dielectric layer, a first doping region, and a second doping region. The stacked structure is formed on the substrate and includes a floating gate, a select logic gate, a logic gate dielectric layer, and an inter-polysilicon layer dielectric layer. The select logic gate is disposed on the floating gate, the logic gate dielectric layer is disposed between the floating gate and the substrate, and the inter-polysilicon layer dielectric layer is disposed between the floating gate and the select logic gate. The anti-fuse gate is disposed on the substrate, and the gate dielectric layer is disposed between the anti-fuse gate and the substrate. The first doping region is formed in the substrate at one side of the floating gate. The second doping region is formed in the substrate between the floating gate and the anti-fuse gate.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 26, 2021
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Ching-Hua Chen, Bing-Chen Ji, Shun-Tsung Yu, Ming-Yuan Lin, Han-Chao Lai, Jih-Wen Chou, Chen-Chiu Hsue
  • Patent number: 11081717
    Abstract: A storage module of distributed flow battery is provided. An electrochemical reaction is processed with the positive and negative electrolytes to produce and/or discharge direct current and further output the positive and negative electrolytes after the reaction. The module comprises two end plates; two frames disposed between the two end plates; two current collectors disposed between the two frames; two complex cast polar plates disposed between the two current collectors; two electrodes disposed between the two complex cast polar plates; a membrane disposed between the two electrodes; and three gaskets. Therein, two of the gaskets are set to sandwich and enclose one of the two complex cast polar plates; and the other one of the gaskets is set between the other one of the two complex cast polar plates and an adjacent one of the current collectors.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: August 3, 2021
    Assignee: Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.O.C.
    Inventors: Ning-Yih Hsu, Chien-Hong Lin, Han-Wen Chou, Chin-Lung Hsieh, Yi-Hsin Hu, Yu-De Zhuang, Yun-Shan Tsai, Qiao-ya Chen
  • Publication number: 20210210778
    Abstract: A method is provided for restoring an electrolyte of vanadium (V) redox flow battery (VRFB). Electrolyte data of an original system are analyzed in advance. A reusable positive electrode is further equipped with a V electrolyte. A reductant for a stack of VRFB is used in coordination as an electrolysis device. After a long-term reaction with a VRFB having a high valence (greater than 3.5), an electrolyte at the positive electrode is directed out to a negative electrode of the electrolysis device; and, then, electrolysis is processed after accurate calculation. In the end, the internal fluid balancing method of the original system is combined. Thus, a harmless and quick valence restoration is processed for the electrolyte of the original system, which is a final resort for the restoration of V electrolyte.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 8, 2021
    Inventors: Yu-De Zhuang, Chien-Hong Lin, Yi-Hsin Hu, Han-Wen Chou, Hwa-Jou Wei, Ning-Yih Hsu
  • Patent number: 11050135
    Abstract: An Antenna-in-Package (AiP) includes an interface layer having at least an antenna layer and an insulating layer disposed under the antenna layer. The antenna layer includes a first antenna region and a second antenna region spaced apart from the first antenna region. An integrated circuit die is disposed on the interface layer. The integrated circuit die is interposed between the first antenna region and the second antenna region. The first antenna region includes a first antenna element, a second antenna element extending along a first direction, and a feeding network electrically connecting the first antenna element and the second antenna element to the integrated circuit die. The feeding network, the first antenna element, and the second antenna element are coplanar. A plurality of solder balls is disposed on a surface of the interface layer.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: June 29, 2021
    Assignee: MEDIATEK INC.
    Inventors: Yen-Ju Lu, Wen-Chou Wu
  • Patent number: 10988980
    Abstract: A blind cord guide seat includes a connection seat fixed under a blind rail and a cord restriction seat connected under the connection seat. The cord restriction seat includes a fixing section and a latch section. An outer face of each of the fixing section and the latch section is formed with a belt guide channel. The top end of the fixing section is formed with threaded holes for connecting with the connection seat by screws. When assembled with a cord winding device, an external force is applied to the latch section to outward bias the latch section to provide an opening for placing the cord winding device through the opening into the cord restriction seat. An iron-made hook bracket and a latch body are securely disposed at the upper end of the latch section for securely latching the latch section with the connection seat.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: April 27, 2021
    Inventor: Tser Wen Chou
  • Publication number: 20210104769
    Abstract: A storage module of distributed flow battery is provided. An electrochemical reaction is processed with the positive and negative electrolytes to produce and/or discharge direct current and further output the positive and negative electrolytes after the reaction. The module comprises two end plates; two frames disposed between the two end plates; two current collectors disposed between the two frames; two complex cast polar plates disposed between the two current collectors; two electrodes disposed between the two complex cast polar plates; a membrane disposed between the two electrodes; and three gaskets. Therein, two of the gaskets are set to sandwich and enclose one of the two complex cast polar plates; and the other one of the gaskets is set between the other one of the two complex cast polar plates and an adjacent one of the current collectors.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 8, 2021
    Inventors: Ning-Yih Hsu, Chien-Hong Lin, Han-Wen Chou, Chin-Lung Hsieh, Yi-Hsin Hu, Yu-De Zhuang, Yun-Shan Tsai, Qiao-ya Chen
  • Publication number: 20210048452
    Abstract: A probe head includes a probe seat, a first spring probe penetrating through upper, middle and lower dies of the probe seat for transmitting a first test signal, and at least two shorter second spring probes penetrating through the lower die for transmitting a second test signal with higher frequency. Two second spring probes are electrically connected in a way that top ends thereof are abutted against two electrically conductive contacts on a bottom surface of the middle die electrically connected by a connecting circuit therein. The lower die has a communicating space and at least two lower installation holes communicating therewith and each accommodating a second spring probe partially located in the communicating space. The probe head is adapted for concurrent high and medium or low frequency signal tests, meets fine pitch and high frequency testing requirements and prevents probe cards from too complicated circuit design.
    Type: Application
    Filed: August 11, 2020
    Publication date: February 18, 2021
    Applicant: MPI CORPORATION
    Inventors: Hui-Pin YANG, Shang-Jung HSIEH, Yu-Wen CHOU, Ching-Fang YU, Huo-Kang HSU, Chin-Tien YANG
  • Patent number: 10916854
    Abstract: An antenna structure includes a radiative antenna element disposed in a first conductive layer, a reflector ground plane disposed in a second conductive layer under the first conductive layer, a feeding network comprising a transmission line disposed in a third conductive layer under the second conductive layer, and at least one coupling element disposed in proximity to a feeding terminal that electrically couples one end of the transmission line to the radiative antenna element. The coupling element is capacitively coupled with the feeding terminal.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: February 9, 2021
    Assignee: MEDIATEK INC.
    Inventors: Jiunn-Nan Hwang, Yi-Chieh Lin, Yen-Ju Lu, Shih-Chia Chiu, Wen-Chou Wu
  • Publication number: 20210036405
    Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.
    Type: Application
    Filed: October 20, 2020
    Publication date: February 4, 2021
    Applicant: MediaTek Inc.
    Inventors: Fu-Yi Han, Che-Ya Chou, Che-Hung Kuo, Wen-Chou Wu, Nan-Cheng Chen, Min-Chen Lin, Hsing-Chih Liu
  • Patent number: D933394
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: October 19, 2021
    Inventor: Tser Wen Chou
  • Patent number: D933999
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: October 26, 2021
    Inventor: Tser Wen Chou
  • Patent number: D935222
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: November 9, 2021
    Inventor: Tser Wen Chou
  • Patent number: D939858
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: January 4, 2022
    Inventor: Tser Wen Chou
  • Patent number: D939937
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: January 4, 2022
    Inventor: Tser Wen Chou