Abstract: A liquid crystal on silicon (LCOS) display apparatus is provided, which includes a silicon substrate, a color filter layer, a first alignment layer, a second alignment layer and a liquid crystal layer. The silicon substrate has pixels arranged in a matrix. Each of the pixels has a tilting angle ranging from about 0 degrees to about 90 degrees and includes a pixel electrode. The color filter layer is disposed on the pixels. The color filter layer has a plurality of color filter units, and each of the color filter units respectively corresponds to one of the pixel electrodes. The first alignment layer is disposed on the color filter layer. The second alignment layer is disposed opposite to the first alignment layer. The liquid crystal layer is disposed between the first alignment layer and the second alignment layer. The liquid crystal layer has liquid crystal molecules with negative dielectric anisotropy.

Abstract: A switch device includes a common terminal and a selection circuit. The selection circuit includes a primary switch, a first secondary switch, and a second secondary switch. The primary switch includes a plurality of primary transistors coupled in series and is coupled to the common terminal. The first secondary switch is coupled to the primary switch and a first transmission terminal. The first secondary switch includes a plurality of first secondary transistors coupled in series. The second secondary switch is coupled to the primary switch and a second transmission terminal. The second secondary switch includes a plurality of second secondary transistors coupled in series. The number of the first secondary transistors and the number of the second secondary transistors are both greater than or equal to the number of the primary transistors.

Abstract: A recirculated-suspension pre-calciner system is disclosed, comprising: a vortex cyclone dust collecting equipment including a plurality of devices, wherein a top device of the vortex cyclone dust collecting equipment is used as a feed system; a vertical combustion kiln; a blower; and a powder purge system, wherein powders in the feed system fall into the vortex cyclone dust collecting equipment and pass through a plurality of the devices to mix and exchange heat with flue gas comprising CO2, generating calcination reaction and releasing CO2 into the flue gas. and the steam is separated and transported to the feed system by the blower and acts as a carrier gas of powders.

Abstract: A loop tower CO2 capture system includes a feeding unit, a carbonator, an accumulator, a calciner, a combustion chamber and a gas blower. The feeding unit has a first gas pipe. The carbonator includes multiple first cyclone dust collecting units. The first gas pipe has one end connected to the uppermost first cyclone dust collecting unit. The accumulator is connected to the lowermost first cyclone dust collecting unit, and is located between the carbonator and the calciner. The calciner includes multiple second cyclone dust collecting units. The accumulator is connected to the uppermost second cyclone dust collecting unit. The first gas pipe has the other end connected to the lowermost second cyclone dust collecting unit. The combustion chamber is connected to the lowermost second cyclone dust collecting unit. The gas blower is connected to the first gas pipe of the feeding unit.

Abstract: The present invention provides an image capturing optical system comprising: a positive first lens element having a convex object-side surface in a paraxial region; a second lens element with refractive power; a third lens element; a fourth lens element having a concave image-side surface in a paraxial region; a plastic fifth lens element having a concave image-side surface in a paraxial region, and the image-side surface has at least one convex shape in an off-axis region thereof; and a plastic sixth lens element w having a concave image-side surface in a paraxial region, and the image-side surface has at least one convex shape in an off-axis region thereof.

Abstract: A reflective display apparatus is provided, which includes a liquid-crystal-on-silicon (LCOS) display module and a compensation layer. The LCOS display module has a liquid crystal layer. The liquid crystal layer includes liquid crystal cells, each having a beta angle ranging from about 9 degrees to about 11 degrees and a twist angle ranging from about 84 degrees to about 88 degrees relative to the beta angle. The compensation layer is disposed on the LCOS display module for compensating retardation of the liquid crystal layer.

Abstract: A single-pole multi-throw switch includes a set of selection switches. The set of selection switches includes a set of primary switches, a first set and a second set of secondary switches. The primary set of switches includes a plurality of primary transistors coupled in series for transmitting radio frequency signals. The first set of secondary switches is coupled to the primary set of switches and includes a plurality of first secondary transistors coupled in series for transmitting the radio frequency signals when the primary transistors and the first secondary transistors are turned on. The second set of secondary switches is coupled to the primary set of switches and includes a plurality of second secondary transistors coupled in series for transmitting the radio frequency signals when the primary transistors and the second secondary transistors are turned on.

Abstract: According to an exemplary embodiment, a method of forming a MIM capacitor is provided. The method includes the following operations: providing a first metal layer; providing a dielectric layer over the first metal layer; providing a second metal layer over the dielectric layer; etching the second metal layer to define the metal-insulator-metal capacitor; and oxidizing a sidewall of the second metal layer. According to an exemplary embodiment, a MIM capacitor is provided. The MIM capacitor includes a first metal layer; a dielectric layer over the first metal layer; a second metal layer over the dielectric layer; and an oxidized portion in proximity to the second metal layer and made of oxidized second metal layer.

Abstract: A manufacturing method of a trench power MOSFET is provided. In the manufacturing method, the trench gate structure of the trench power MOSFET is formed in the epitaxial layer and includes an upper doped region, a lower doped region and a middle region interposed therebetween. The upper doped region has a conductive type reverse to that of the lower doped region, and the middle region is an intrinsic or lightly-doped region to form a PIN, P+/N? or N+/P? junction. As such, when the trench power MOSFET is in operation, a junction capacitance formed at the PIN, P+/N? or N+/P? junction is in series with the parasitic capacitance. Accordingly, the gate-to-drain effective capacitance may be reduced.

Abstract: A carrier substrate includes an insulation encapsulation, first conductive patterns, second conductive patterns, at least one first dummy pattern, and at least one second dummy pattern. The carrier substrate has a first layout region and a second layout region. The first conductive patterns and the first dummy pattern are located in the first layout region. The second conductive patterns and the second dummy pattern are located in the second layout region. The first and second conductive patterns and the first and second dummy patterns are embedded in the insulation encapsulation. The insulation encapsulation exposes top surfaces of the first and second conductive patterns and the first and second dummy patterns. The first dummy pattern and the second dummy pattern are insulated from the first conductive patterns and the second conductive patterns. An edge profile of the first dummy pattern facing the second dummy pattern is non-linear.

Abstract: Provided is a semiconductor structure including a first die and a second die. The first die has a first conductive structure embedded in a dielectric layer. The second die has a second conductive structure embedded in the dielectric layer. A first interface is provided between the first conductive structure and the dielectric layer. A second interface is provided between the second conductive structure and the dielectric layer. A shape of the dielectric layer between the first interface and the second interface is a non-linear shape.

Abstract: Some embodiments of the present disclosure provide a semiconductor device including a substrate and a gate structure on the substrate. A first well region of a first conductivity type is in the substrate, close to a first sidewall of the gate structure. A second well region of a second conductivity type is also in the substrate close to the second sidewall of the gate structure. A conductive region is disposed in the second well region. The conductive region can be an epitaxy region. A chemical composition inside the second well region between the conductive region and the gate structure is essentially homogeneous as a chemical composition throughout the second well region.

Abstract: This invention provides a signal processing method of multiple micro-electro-mechanical system devices. The signal processing method includes: providing at least two MEMS devices; applying driving or modulating signals of different frequencies to the MEMS devices such that the MEMS devices generate respective MEMS signals with respective frequencies; and combining the MEMS signals with respective frequencies into one or more multi-frequency signals and outputting the multi-frequency signals, wherein a number of the multi-frequency signals is less than a number of the MEMS signals with respective frequencies. This invention also provides a combo MEMS device integrating two or more MEMS devices and two or more vibration sources.

Abstract: A printer includes a base, a cover, a feeding roller, a support member, a rotating member and a driving member. The cover is pivotally connected to the base. The feeding roller includes an axle pivotally connected to the cover. The support member is disposed on the base. The rotating member is pivotally connected to the support member and includes an engaging portion and a pushing portion. The driving member is disposed corresponding to the rotating member. When the cover is closed with respect to the base, the feeding roller abuts against the rotating member and the axle is engaged with the engaging portion. When the driving member drives the rotating member to rotate, the axle is released from the engaging portion and the pushing portion pushes against the cover so that the cover is opened with respect to the base.

Abstract: A trench power transistor and a manufacturing method thereof are provided. The trench power transistor includes a substrate, an epitaxial layer, a trench gate structure, a body region, and a source region. The epitaxial layer disposed on the substrate has a trench formed therein. The trench gate structure disposed in the trench includes a bottom dielectric structure, a gate dielectric layer, and a gate. The bottom dielectric structure formed in a lower portion of the trench includes an insulating layer formed along a first inner wall of the lower portion of the trench defining a groove, and a non-conductive structure formed in the groove. The gate dielectric layer is formed along a second inner wall of an upper portion of the trench, and the gate is formed in the trench and connects the gate dielectric layer. The body region and the source region are formed in the epitaxial layer.

Abstract: A stable composition useful for myocardial perfusion imaging contains one or more 2-alkynyladenosine derivatives; and a solvent which is made up of water and hydroxypropyl-?-cyclodextrin.

Abstract: A trench power MOSFET and a manufacturing method thereof are provided. The gate of the trench power MOSFET includes an upper doped region, a lower doped region and a middle region interposed therebetween. The upper has a conductive type reverse to that of the lower doped region, and the middle region is an intrinsic or lightly-doped region to form a PIN, P+/N? or N+/P? junction. As such, when the trench power MOSFET is in operation, a junction capacitance formed at the PIN, P+/N? or N+/P? junction is in series with the parasitic capacitance. Accordingly, the gate-to-drain effective capacitance may be reduced.

Abstract: A micro-electro mechanical apparatus with interdigitated spring including a substrate, at least one first mass, a movable electrode, a stationary electrode, an anchor and an interdigitated spring is provided. The movable electrode is disposed on the mass along an axial direction. The stationary electrode is disposed on the substrate along the axial direction, and the movable electrode and the stationary electrode have a critical gap there between. The interdigitated springs connects the mass and the anchor along the axial direction. The interdigitated spring includes first folded portions, first connecting portions, second folded portions, and second connecting portions. Each first folded portion includes two first spans and a first head portion. Each second folded portion includes two second spans and a second head portion. A width of the first span and a width of the second span are greater than the critical gap respectively.

Abstract: The present invention provides a composition for alleviating and preventing Alzheimer's disease. This composition comprises at least one yellow pigment extracted from a red mold product, and the said yellow pigment is Monascin or Ankaflavin. Moreover, after completing a variety of experiments, the composition has been proved possessing effects on alleviating and preventing AD by alleviating the symptoms of memory loss and learning disability resulted from the ?-amyloid accumulated in brain of rats as well as reducing the inflammation and the oxidative stress caused by the ?-amyloid in cerebral cortex and hippocampus tissue. Therefore, the experimental results have proved that this novel composition is indeed able to treat and prevent Alzheimer's disease.

Abstract: A method of manufacturing super junction device includes forming a first epitaxial layer on a semiconductor substrate. The first epitaxial layer is patterned to form a trench. The trench has a first sidewall region, a second sidewall region and a bottom region. The bottom region is positioned in between the first and second sidewall regions. A second epitaxial layer is formed on the first sidewall region, the second sidewall region and the bottom region. A portion of the second epitaxial layer on the first sidewall region and the second sidewall region is removed. An oxide layer in contact with the second epitaxial layer is formed. A gate layer in contact with the oxide layer is formed.