Abstract: A manufacturing method of a semiconductor device including the following steps is provided. A substrate having a device structure and a first interconnection structure on a front side is provided. A first annealing process is performed in an atmosphere of pure hydrogen at a first temperature. A second interconnection structure is formed on a back side of the substrate. A second annealing process is performed in an atmosphere of gas mixture including hydrogen at a second temperature.

Abstract: An integrated circuit includes an active zone having a center portion adjoining a first side portion and a second side portion. A first transistor having a gate formed over one of the first channel regions in the center portion has a first threshold-voltage. A second transistor having a gate formed over one of the second channel regions in the center portion has a second threshold-voltage. A third transistor having a gate formed over one of the third channel regions in the first side portion has a third threshold-voltage. A fourth transistor having a gate formed over one of the fourth channel regions in the second side portion has a fourth threshold-voltage. A first average of the first threshold-voltage and the second threshold-voltage is larger than a second average of the third threshold-voltage and the fourth threshold-voltage by a predetermined threshold-voltage offset.

Abstract: A radiofrequency device includes a buried insulation layer, a transistor, a contact structure, a connection bump, an interlayer dielectric layer, and a mold compound layer. The buried insulation layer has a first side and a second side opposite to the first side in a thickness direction of the buried insulation layer. The transistor is disposed on the first side of the buried insulation layer. The contact structure penetrates the buried insulation layer and is electrically connected with the transistor. The connection bump is disposed on the second side of the buried insulation layer and electrically connected with the contact structure. The interlayer dielectric layer is disposed on the first side of the buried insulation layer and covers the transistor. The mold compound layer is disposed on the interlayer dielectric layer. The mold compound layer may be used to improve operation performance and reduce manufacturing cost of the radiofrequency device.

Abstract: A method including the operations of receiving a preliminary device layout including a plurality of active areas, analyzing the preliminary device layout to identify empty areas between the plurality of active areas, determining the configurations of the active areas bordering the empty areas, selecting a transition cell from a transition cell library in which the transition cell has a transitional configuration for reducing density gradient effects in the active areas adjacent the transition cell, and inserting the transition cells into the empty areas to define a modified device layout.

Abstract: An IC degradation sensor is disclosed. The IC degradation management sensor includes an odd number of first logic gates electrically connected in a ring oscillator configuration, each first logic gate having an input and an output. Each first logic gate further includes a first PMOS transistor, a first NMOS transistor and a second logic gate having an input and an output. The input of the second logic gate is the input of the first logic gate, and the drains of the first PMOS transistor and the first NMOS transistor are electrically connected to the output of the second logic gate, and the output of the second logic gate is the output of the first logic gate.

Abstract: A manufacturing method of a semiconductor device including the following steps is provided. A substrate having a device structure and a first interconnection structure on a front side is provided. A first annealing process is performed in an atmosphere of pure hydrogen at a first temperature. A second interconnection structure is formed on a back side of the substrate. A second annealing process is performed in an atmosphere of gas mixture including hydrogen at a second temperature.

Abstract: A reusable adhesive pad with embedded magnets consists of a layer of fibrous cloth with elasticity, a layer of silicone gel padding, and permanent magnets. The fibrous cloth with elasticity is made from fiber materials with a stretchable characteristic. The silicone gel padding is spread out fully and glued on one surface of the fibrous cloth with elasticity. In addition, the silicone gel padding is provided with holes that the permanent magnets with cylindrical or conical outers can be filled in and glued to the adhesive surface of the fibrous cloth with elasticity. Since the other sides of the permanent magnets protrude outwards the surface of the silicone gel padding, applying the invention to the human skin can perform the acupuncture and moxibustion treatment and the magneto-therapy to lessen painful discomfort.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an insulating layer, a semiconductor layer, a plurality of isolation structures, a transistor, a first contact, a plurality of silicide layers, and a protective layer. The semiconductor layer is disposed on a front side of the insulating layer. The plurality of isolation structures are disposed in the semiconductor layer. The transistor is disposed on the semiconductor layer. The first contact is disposed beside the transistor and passes through one of the plurality of isolation structures and the insulating layer therebelow. The plurality of silicide layers are respectively disposed on a bottom surface of the first contact and disposed on a source, a drain, and a gate of the transistor. The protective layer is disposed between the first contact and the insulating layer.

Abstract: A water propelling device is invented to rescue a drowning person with more efficiency and less risks, which includes an adjustable clamp apparatus, a hydro-driving mechanism, a waterproof chamber and a control monitor. The adjustable clamp apparatus is able to fasten various type of life-saving buoy rings. Inside the waterproof chamber, electronic circuit boards, a power supply unit with batteries, a wireless signal communication module and antennas, various sensor modules and an electronic speed controller are wired together as a control unit. The hydro-driving mechanism is at the bottom of the adjustable clamp apparatus, which is connected with the control unit to actuate and control the movements. Wireless signals are transmitted and received between the control monitor and the control unit, allowing a rescuer to operate the water propelling device remotely to deliver a life-saving buoy ring over the surface of water toward the drowning person.

Abstract: In a first integrated circuit column, a first cell active area top edge is separated by a first separation distance from a first barrier line, a first cell active area bottom edge is separated by a second separation distance from a second barrier line, a second cell active area top edge is separated by the second separation distance from a third barrier line, and a second active area bottom edge is separated by the first separation distance from a fourth barrier line. In a second column a third cell active area top edge is separated from a fifth barrier line by the first distance, and a third cell active area bottom edge is separated from a sixth barrier line by a third distance. The first and third separation distances are different from the second separation distance. The first barrier line aligns with the fifth barrier line.

Abstract: An integrated circuit (IC) includes a first transistor having a first dopant type and a second transistor having a second dopant type opposite to the first dopant type. The first transistor includes a first terminal configured to receive a current, a second terminal connected to a node, and a first gate, and the second transistor includes a first terminal connected to a device under test (DUT), a second terminal connected to the node, and a second gate. Each one of the first gate, the node, or the second gate is capable of receiving a first voltage from a first voltage source simultaneously with another one of the first gate, the node, or the second gate receiving a second voltage from a second voltage source, the first voltage being different from the second voltage.

Abstract: A three-dimensional serial focused intraoral digital tomosynthesis scanner includes a frame body, an image capturing module, a photosensitive member and an image processing module. The frame body includes a central axis and a light source seat which is moved along a scanning path and rotated around the central axis. The image capturing module is disposed on the light source seat and reciprocated along the scanning path. The image capturing module is configured to generate a light beam emitted from an outside to the patient's mouth. The photosensitive member is positioned in the patient's mouth. The light beam is emitted to the photosensitive member and moved along the scanning path corresponding to the photosensitive member so as to generate a plurality of two-dimensional optical images by the image capturing module. The image processing module calculates the two-dimensional optical images to generate a three-dimensional image.

Abstract: In certain embodiments, the present disclosure provides compounds and methods for increasing the antisense activity of an antisense compound in a cell. In certain embodiments, the present disclosure provides methods for identifying antisense compounds having high activity. In certain embodiments, the present disclosure provides methods for identifying antisense compounds that bind to enhancer or repressor proteins.

Abstract: A pet combination house includes a housing and a connecting unit. The housing includes a plurality of plates, with a folding line being formed at a connection of two plates. The plates are folded upward along the folding line and are connected together to construct the housing. Some of the plates have a side respectively provided with a fastening member. The fastening members of the plates are detachably combined together in pairs when the housing is disposed at the three-dimensional state. At least one of the plates is provided with an opening. At least one of the plates has a face provided with a plurality of apertures. The connecting unit includes a plurality of retaining members mounted on the plates and aligning with the apertures, and a plurality of connecting members mounted in the apertures and retained by the retaining members.

Abstract: A display device including a display panel and a backlight module is provided. The backlight module is correspondingly disposed below the display panel and includes light-emitting elements providing light beams and disposed on a circuit board, lens units each being disposed on a corresponding light-emitting element and having a concave inside surface covering the corresponding light-emitting element and a convex outside surface covering the concave inside surface, and an inverse prism sheet disposed between the lens units and the display panel, and the inverse prism sheet having inverse prisms with a vertex corner. At least a portion of the light beams emitted from the convex outside surface each has a predetermined light-emitting angle ?o larger than 30 degrees and less than 90 degrees. The backlight module has a height of cavity D being a distance between the vertex corner and the circuit board, and 10 ?m?D<30 mm.

Abstract: A cell culture module, a cell culture system and a cell culture method are provided. The cell culture module includes a casing, a first fixer, a second fixer and a sheet-shaped carrier member. The casing has a chamber and at least one inlet/outlet. The inlet/outlet communicates with the chamber. The first fixer is fixed to the casing and located in the chamber. The second fixer is disposed in the chamber and is movable relative to the first fixer. The sheet-shaped carrier member is formed by arranging a plurality of cell culture carriers, and two opposite ends of the sheet-shaped carrier member are respectively fixed to the first fixer and the second fixer. The sheet-shaped carrier member is in an open state or a folded state according to a variation in a distance between the first fixer and the second fixer due to a movement of the second fixer.

Abstract: An IC degradation sensor is disclosed. The IC degradation management sensor includes an odd number of first logic gates electrically connected in a ring oscillator configuration, each first logic gate having an input and an output. Each first logic gate further includes a first PMOS transistor, a first NMOS transistor and a second logic gate having an input and an output. The input of the second logic gate is the input of the first logic gate, and the drains of the first PMOS transistor and the first NMOS transistor are electrically connected to the output of the second logic gate, and the output of the second logic gate is the output of the first logic gate.

Abstract: The present disclosure describes a method for replacing a device with a cell structure having a plurality of uni-gates. An exemplary method includes receiving a circuit diagram that includes the device, determining the cell structure wherein a cumulative effective gate length of the plurality of uni-gates is equal to a gate length of the device, generating, based on the cell structure and the device, a floor plan that includes an arrangement of a plurality of placeholders that match an arrangement of the cell structure and an arrangement of the device in the circuit diagram, and generating a circuit layout based on the floor plan, the cell structure, and the circuit diagram. The plurality of placeholders is replaced by the cell structure and the cell structure is connectable to other parts of the circuit diagram based on the circuit diagram.

Abstract: A peak current evaluation apparatus for an IC is provided. The peak current evaluation apparatus includes a pulse tuner and a testing circuit. The pulse tuner receives a clock signal, adjusts pulse width and duty ratio of the clock signal according to at least one predetermined parameter in order to generate a pulse signal with a stress voltage. The testing circuit is coupled to the pulse tuner. The testing circuit, which includes two input ports, receives the pulse signal at one of the two input ports in order to stress a testing device, measures the resistance value of the testing device, and calculates the peak current of the testing device when the resistance value increases and exceeds a threshold value.

Abstract: A device comprising a device under test and a time to current converter configured to be coupled to the device under test. The device under test comprises: (i) at least one delay element for creating a delay; (ii) at least one capacitor for providing capacitance loading to the at least one delay element; and (iii) at least one switch to control the capacitance loading provided by the at least one capacitor. The time to current converter comprises (i) a first input for receiving a first clock signal; (ii) a second input for receiving an inverted and delayed version of the first clock signal from the device under test; and (iii) an impedance module for measuring an output current. During a testing mode, the at least one switch is in a closed position so the at least one capacitor can provide a capacitance loading to the at least one delay element to amplify the delay associated with the device under test.