Patents by Inventor Wen Yi

Wen Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150369809
    Abstract: The present invention relates to methods of treating cancer, suppressing or inhibiting tumorigenesis, tumor growth or cancer progression, and suppressing or inhibiting cancer cells from altering cellular metabolism in favor of cancerous growth. Also provided are compositions comprising an agent that decreases glycosylation of phosphofructokinase 1 or increases phosphofructokinase 1 expression or activity.
    Type: Application
    Filed: August 19, 2013
    Publication date: December 24, 2015
    Inventors: Linda C HSIEH-WILSON, Wen Yi
  • Patent number: 9190749
    Abstract: An electrical contact for being loaded in an electrical connector electrically connecting an IC module to a printed circuit board (PCB) includes a first contact, a second contact and an elastic arm. The first contact includes a first mating portion and a first connecting portion. The first mating portion defines a first contacting end for connecting with the IC socket. The second contact includes a second mating portion and a second connecting portion. The second contacting portion defines a second contacting end for connecting with the PCB. The first and second connecting portions are coupled with each other, the first elastic element rings around the first mating portion of the first contact and presses against the second connecting portion of the second contact.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: November 17, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ming-Yue Chen, Wen-Yi Hsieh
  • Patent number: 9178295
    Abstract: The present invention provides a flexible printed circuit board having gold fingers, comprising a base sheet, a metallic layer and a protective sheet. The base sheet has a plurality of voids thereon. The metallic layer is provided on the base sheet, and has at least one plated through hole. The protective sheet is provided on the base sheet and the metallic layer to expose a portion of the metallic layer and the plated through hole. The flexible printed circuit board may electrically be connected to a conductive terminal of a rigid printed circuit board with one gold finger and electrically be connected to a system with another gold finger. The plated through hole has a function of heat conduction and soldering, and the voids of the flexible printed circuit board can provide a space for overflowing solder and heat dissipation.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: November 3, 2015
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Liang Lin, Wen-Ping Teng, Jie Li, Guang Yang, Wen-Yi Chien
  • Publication number: 20150311284
    Abstract: A method of fabricating a spatial semiconductor structure includes steps as follows. Firstly, a semiconductor substrate is provided. Then, a first mask layer is formed above the semiconductor substrate. Then, at least a first opening is formed in the first mask layer and exposes a portion of a surface of the semiconductor substrate. Then, a first semiconductor pattern is formed in the first opening. Then, a second mask layer is formed over the first semiconductor pattern and the first mask layer. Then, at least a second opening is formed through the second mask layer to the first mask layer and exposes another portion of the surface of the semiconductor substrate. And, a second semiconductor pattern is formed in the second opening.
    Type: Application
    Filed: July 7, 2015
    Publication date: October 29, 2015
    Inventors: Hung-Lin SHIH, Chih-Chien LIU, Jei-Ming CHEN, Wen-Yi TENG, Chieh-Wen LO
  • Publication number: 20150275448
    Abstract: A snowplow shovel has a handle bar for pushing and controlling the snowplow that is constructed as a linking structure. A guide plate is disposed on a frame on a rear side of the shovel in advance, such that a pin can be directly inserted and slide in a guide groove of the guide plate. After snow shoveling is performed through pushing and control the handle bar, the shovel can simultaneously move to a snow collection location and move upwardly in corporation with pressing the handle bar. The shovel can achieve the operation of automatic snow unloading via naturally swinging and flipping along the direction of the arc of the guide groove according to the guidance of the pin inserted in the guide groove.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 1, 2015
    Inventor: Wen-Yi Xu
  • Patent number: 9139098
    Abstract: A collector device of an electric train and a collector method thereof are provided. The collector device includes a collector unit and a magnetic unit. The collector unit has a first side, a second side and a graphite skateboard. The first side and the second side are the two opposite sides of the collector unit, and the graphite skateboard is disposed on the first side, wherein the first side of the collector unit is in contact with a power source having a magnetically permeable capacity via the graphite skateboard, so as to draw an operation voltage. The magnetic unit has an electromagnetic coil body. The magnetic unit is configured on the second side of the collector unit, for providing an attractive force between the collector unit with the power source, so as to reduce a contact loss rate.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: September 22, 2015
    Assignee: National Taiwan University of Science and Technology
    Inventors: Ming-Tse Kuo, Wen-Yi Lo, Yao-Yi Wang
  • Publication number: 20150263050
    Abstract: A pixel structure includes a gate electrode, a gate dielectric layer, a silicon channel layer, a silicon source ohmic contact layer, a silicon drain ohmic contact layer, a source auxiliary ohmic contact layer, a drain auxiliary ohmic contact layer, a transparent conductive portion, a transparent pixel electrode, a source electrode, and a drain electrode. The silicon channel layer is disposed on the gate dielectric layer and above the gate electrode. The silicon source ohmic contact layer, the source auxiliary ohmic contact layer, the transparent conductive portion, and the source electrode are disposed on the silicon channel layer in sequence. The silicon drain ohmic contact layer and the drain auxiliary ohmic contact layer are disposed on the silicon channel layer in sequence. At least a portion of the transparent pixel electrode is disposed between the drain electrode and the drain auxiliary ohmic contact layer.
    Type: Application
    Filed: May 14, 2014
    Publication date: September 17, 2015
    Applicant: AU Optronics Corporation
    Inventors: Wen-Yi HSU, Maw-Song CHEN, Kuo-Yu HUANG
  • Publication number: 20150255855
    Abstract: A wearable device including a display unit, a conductive frame and a belt-like structure is provided. The conductive frame surrounds a display region of the display unit, and the conductive frame has a first open slot. Besides, a feeding point and a first ground point are disposed on two sides of an opening of the first open slot, and the conductive frame forms a first antenna element. The belt-like structure is respectively connected to a first edge and a second edge, which are opposite to each other, of the conductive frame.
    Type: Application
    Filed: June 11, 2014
    Publication date: September 10, 2015
    Inventors: Wen-Yi Tsai, Chia-Ching Lee
  • Patent number: 9129806
    Abstract: Protection device structures and related fabrication methods are provided. An exemplary semiconductor protection device includes a base well region having a first conductivity type, an emitter region within the base well region having a second conductivity type opposite the first conductivity type, a collector region having the second conductivity type, a first floating region having the second conductivity type within the base well region between the emitter region and the collector region, and a second floating region having the first conductivity type within the base well region between the first floating region and the collector region. The floating regions within the base well region are electrically connected to reduce current gain and improve holding voltage.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: September 8, 2015
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventors: Rouying Zhan, Chai Ean Gill, Wen-Yi Chen, Michael H. Kaneshiro
  • Publication number: 20150249334
    Abstract: Techniques for reducing leakage current during normal operation of an electrostatic discharge (ESD) circuit are described herein. In one embodiment, a circuit comprises an internal circuit and an electrostatic discharge (ESD) rail clamp coupled in parallel to the internal circuit and between first and second power supply rails. The ESD rail clamp is operable to shunt ESD current from the first power supply rail to the second power supply rail via a low resistance shunt path. The ESD rail clamp comprises an ESD trigger circuit configured to detect an ESD event and a plurality of discharging transistors coupled in series. The ESD trigger circuit is configured to turn off the discharging transistors during normal operation and to turn on the discharging transistors to form the low resistance shunt path in response to detection of the ESD event.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 3, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Wen-Yi Chen, Sreeker Dundigal, Reza Jalilizeinali, Eugene Robert Worley
  • Patent number: 9112351
    Abstract: An integrated circuit is provided. The integrated circuit may include, but is not limited to, a first node, a second node configured to be coupled to ground, an output driver, and a electrostatic discharge circuit electrically coupled to the first node, the second node, and the output driver. The electrostatic discharge circuit may include, but is not limited a high-pass filter configured to detect an electrostatic discharge event at the first node, a driving stage circuit electrically coupled to the high-pass filter and the output driver, the driving stage circuit configured to receive a signal from the high-pass filter when the high-pass filter detects the electrostatic discharge event and further configured to shunt an input of the output driver to the second node in response to the signal from the high-pass filter, and a step-down circuit electrically coupled to the driving stage circuit and configured to bias the driving stage circuit.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: August 18, 2015
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventors: Wen-Yi Chen, Chai Ean Gill
  • Patent number: 9110096
    Abstract: A test socket includes an insulating seat defining a package-receiving room and loaded with a plurality of terminals, a retaining member retained on the insulating seat, a first cover and a second cover. The retaining member defines a first end and a second end. The first cover is assembled to the first end of the retaining member via a pivot pin at a lower end thereof The second cover is assembled to the second end of the retaining member via a second pivot pin at a lower end thereof The second cover presses against the first cover and is locked after the two covers rotate to close the package-receiving room. The first cover defines a pair of wheels at an upper end thereof and rolling along the second cover during the covers rotate downwards.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: August 18, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Wen-Yi Hsieh
  • Patent number: 9105582
    Abstract: A method of fabricating a spatial semiconductor structure includes steps as follows. Firstly, a semiconductor substrate is provided. Then, a first mask layer is formed above the semiconductor substrate. Then, at least a first opening is formed in the first mask layer and exposes a portion of a surface of the semiconductor substrate. Then, a first semiconductor pattern is formed in the first opening. Then, a second mask layer is formed over the first semiconductor pattern and the first mask layer. Then, at least a second opening is formed through the second mask layer to the first mask layer and exposes another portion of the surface of the semiconductor substrate. And, a second semiconductor pattern is formed in the second opening.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: August 11, 2015
    Assignee: United Microelectronics Corporation
    Inventors: Hung-Lin Shih, Chih-Chien Liu, Jei-Ming Chen, Wen-Yi Teng, Chieh-Wen Lo
  • Patent number: 9104374
    Abstract: An electronic device including a first body, an input module and a functional element is provided. The input module is movably disposed on the first body and adapted to be moved between a first position and a second position. The functional element is disposed on the input module. When the input module is located at the first position, the functional element is concealed in the first body. When the input module is located at the second position, the functional element is exposed outside the first body.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: August 11, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Hui-Jou Tsai, Yung-Hsiang Chen, Wen-Yi Chiu, Kuan-Yu Chou, Chuan-Hao Wen, Chun-Huang Yu, Chao-Tung Hsu, Chih-Yin Lai, Chia-Sheng Liu, Hsiang-Ling Liu
  • Publication number: 20150207268
    Abstract: An electrical connector assembly includes a first connector and a second connector. The first connector includes a first terminal group and a first magnetic element around the first terminal group, the first terminal group defines a first central terminal and two first outer terminals located at both sides of the first central terminal. The second connector includes a second terminal group and a second magnetic element, the second terminal group defines a second central terminal, a second outer terminal and an elastic terminal located at both sides of the second central terminal. When the first connector is engaging with the second connector, the first and second magnetic elements are attached to each other, the first central terminal is contacting the second central terminal, the second outer terminal is contacting either of the first outer terminals and the elastic terminal is elastically abutting against the first magnetic element.
    Type: Application
    Filed: January 20, 2015
    Publication date: July 23, 2015
    Inventors: ZHI-HUI ZHU, WEN-YI HSIEH, HSUEH-LUNG HSIAO, WEI-CHUNG LIN, XIN-GANG JI
  • Patent number: D735261
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: July 28, 2015
    Inventor: Wen-Yi Hsu
  • Patent number: D735262
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: July 28, 2015
    Inventor: Wen-Yi Hsu
  • Patent number: D735798
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: August 4, 2015
    Inventor: Wen-Yi Hsu
  • Patent number: D740279
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: October 6, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Ting-Wei Wu, Yuan-Ping Chu, Wen-Yi Chiu, Yung-Hsiang Chen, Shi Kuan Chen
  • Patent number: D740350
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: October 6, 2015
    Inventor: Roger Wen Yi Hsu