Patents by Inventor Yong Jeong

Yong Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7478942
    Abstract: A light guide plate includes a light incident surface for receiving light, first and second light emission surfaces for emitting light at a first light emission angle with respect to the first and second light emission surfaces, and a light reflection pattern formed on the first light emission surface, for reflecting the light toward the second light emission surface. The reflected light from the light reflection pattern exits the second light emission surface at a second light emission angle with respect to the second light emission surface, and the second light emission angle is larger than the first light emission angle. The light reflection pattern includes multiple dots each having a prim pattern on their surface and light reflecting surfaces elongated in a selected direction. The adjacent light reflecting surfaces meet each other at their elongated edges to form a prism shape.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: January 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Hoon Kim, Jong-Dae Park, Kyu-Seok Kim, Jeong-Hwan Lee, Jae-Ho Jung, Man-Suk Kim, Chul-Goo Chi, O-Yong Jeong
  • Patent number: 7474566
    Abstract: A method of driving a non-volatile memory device includes programming a plurality of memory cells based on a first data copied from a program data buffer to a verification data buffer, verifying the memory cells by overwriting a result of the verification of the programmed memory cells to a verification data buffer, and re-verifying the memory cells by repeating the programming and verifying operations at least once with respect to the memory cells that were successfully verified, based on the verification result written to the verification data buffer.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: January 6, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kee-Ho Jung, Jae-Yong Jeong, Chi-Weon Yoon
  • Publication number: 20090003075
    Abstract: A flash memory device includes a flash memory cell array having flash memory cells arranged with word and bit lines, a word line driver circuit configured to drive the word lines at a selected step increment during a programming operation, a bulk-voltage supply circuit configured to supply a bulk voltage into a bulk of the flash memory cell array and a writing circuit configured to drive the bit lines selected by conditions during a programming operation. A control logic block is configured to control the writing circuit and the bulk-voltage supply circuit during the programming operation. The control logic block is configured to cause the writing circuit and/or the bulk-voltage supply circuit to change at least one of the conditions of the writing circuit and/or the bulk voltage responsive to the selected step increment.
    Type: Application
    Filed: June 6, 2008
    Publication date: January 1, 2009
    Inventors: In-Mo Kim, Jae-Yong Jeong, Chi-Weon Yoon
  • Publication number: 20090003056
    Abstract: Disclosed is a nonvolatile memory device and programming method of a nonvolatile memory device. The programming method of the nonvolatile memory device includes conducting a first programming operation for a memory cell, retrieving original data from the memory cell after the first programming operation, and conducting a second programming operation with reference to the original data and a second verifying voltage higher than a first verifying voltage of the first programming operation.
    Type: Application
    Filed: May 30, 2008
    Publication date: January 1, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Young CHUN, Jae-Yong JEONG, Chi-Weon YOON
  • Patent number: 7457165
    Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: November 25, 2008
    Assignee: Samsung Electroincs Co., Ltd.
    Inventors: Jae-Yong Jeong, Heung-Soo Lim
  • Patent number: 7457168
    Abstract: Disclosed is a non-volatile memory device and a method of erasing the non-volatile memory device. An erase voltage is simultaneously applied to a plurality of sectors contained in the non-volatile memory device. Then, erase validation is sequentially performed for each of the plurality sectors and results of the erase validation are stored in a plurality of pass information registers. According to the results stored in the pass information registers, sectors which were not successfully erased are simultaneously re-erased and then sequentially re-validated until no such “failed sectors” remain in the non-volatile memory device. Upon eliminating the “failed sectors” from the non-volatile memory device, a post-program operation is sequentially performed on each of the plurality of sectors.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: November 25, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yong Jeong, Young-Ho Lim
  • Patent number: 7447067
    Abstract: A method of programming a selected cell in a multi-level flash memory device comprises determining whether to program an upper bit or a lower bit of a selected memory cell, detecting a current logic state of two bits of data stored in the selected memory cell, determining a target logic state for the upper or lower bit, generating a program voltage and a verify voltage for programming the upper or lower bit to the target logic state, and applying the program voltage and the verify voltage to a word line connected to the selected memory cell.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: November 4, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Phil Kong, Jae-Yong Jeong
  • Patent number: 7420852
    Abstract: Disclosed is a non-volatile memory device and a method of programming the same. The non-volatile memory device comprises a plurality of memory cells that are programmed by supplying first and second program voltages thereto. In cases where the second program voltage rises above a predetermined detection voltage, the first program voltage is prevented from being supplied to the memory cell until the second program voltage falls below the detection voltage.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: September 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yong Jeong, Young-Ho Lim
  • Publication number: 20080192540
    Abstract: In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.
    Type: Application
    Filed: December 27, 2007
    Publication date: August 14, 2008
    Inventors: Jae-Phil Kong, Heung-soo Lim, Jae-yong Jeong, Chi-weon Yoon
  • Patent number: 7402944
    Abstract: An organic light emitting display device (OLED) and a method of fabricating the same, in which electric field influence between first and second electrodes is reduced in an edge region of a unit pixel. The OLED includes a substrate, and a thin film transistor (TFT) located on the substrate. A passivation layer is located on the TFT over substantially an entire surface of the substrate, and has a via hole for exposing source or drain electrode, and a groove. A first electrode on the passivation layer is in electrical contact with the exposed source or drain electrode through the via hole, and has an edge located in the groove. A pixel defining layer is located on the first electrode and has an opening for exposing a predetermined portion of the first electrode. An organic layer is in contact with the predetermined portion, and a second electrode is formed on the organic layer.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: July 22, 2008
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Chang-Yong Jeong, Tae-Wook Kang, Chang-Soo Kim
  • Publication number: 20080170436
    Abstract: A flash memory device and a related method of write protecting data are disclosed. The flash memory device includes a protection controller having a latch circuit storing temporary protected/accessible data, a cell array storing persistent protected/accessible data, a write controller altering the persistent protected/accessible data, and a latch controller altering the temporary protected/accessible data.
    Type: Application
    Filed: January 7, 2008
    Publication date: July 17, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Young CHUN, Jae-Yong JEONG, Chi-Weon YOON
  • Publication number: 20080170443
    Abstract: A flash memory device includes a program data buffer configured to buffer program data to be programmed in a memory cell array, and a verify data buffer configured to compare verify data to confirm whether the program data is accurately programmed in the memory cell array, wherein at least a portion of the verify data buffer is selectively enabled as a verify data buffer or a program data buffer responsive to a buffer control signal.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 17, 2008
    Inventors: Kee-ho Jung, Jae-yong Jeong, Chi-weon Yoon
  • Publication number: 20080158993
    Abstract: A method of driving a non-volatile memory device includes programming a plurality of memory cells based on a first data copied from a program data buffer to a verification data buffer, verifying the memory cells by overwriting a result of the verification of the programmed memory cells to a verification data buffer, and re-verifying the memory cells by repeating the programming and verifying operations at least once with respect to the memory cells that were successfully verified, based on the verification result written to the verification data buffer.
    Type: Application
    Filed: June 15, 2007
    Publication date: July 3, 2008
    Inventors: Kee-Ho Jung, Jae-Yong Jeong, Chi-Weon Yoon
  • Publication number: 20080155171
    Abstract: A file system and a method for file storage and file search by the same are provided. All files have unique names in a block-based storage device, such as a hard disk, a flash memory, etc., so that each file is mapped and stored in a one-dimensional storage area. Each file name is matched with a memory block storing data of the corresponding file so that a memory block corresponding to a file name can be found when the file name is input. In addition, through information stored in the found memory block, the data corresponding to the file name can be read from the memory block storing the data or can be stored in a specific memory block.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 26, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Soon-Yong JEONG
  • Publication number: 20080144372
    Abstract: A flash memory device including memory cells, each memory cell configured to store bits, a sensing circuit configured to sequentially sense, for each memory cell, sets of the bits of the memory cell, a data rearrangement unit configured to receive words of data and to rearrange bits of the words to be stored in the memory cells, and an output circuit configured to output a group of the words using the sets of bits from one sensing, at least as early as during a subsequent sensing of sets of bits.
    Type: Application
    Filed: February 21, 2008
    Publication date: June 19, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Woo LEE, Jae-Yong JEONG
  • Publication number: 20080137435
    Abstract: Nonvolatile memory devices support programming and verify operations that improve threshold-voltage distribution within programmed memory cells. This improvement is achieved by reducing a magnitude of the programming voltage steps and increasing a duration of the verify operations once at least one of the plurality of memory cells undergoing programming has been verified as a “passed” memory cell. The nonvolatile memory device includes an array of nonvolatile memory cells and a control circuit, which is electrically coupled to the array of nonvolatile memory cells. The control circuit is configured to perform a plurality of memory programming operations (P) by driving a selected word line in the array with a first stair step sequence of program voltages having first step height (e.g.
    Type: Application
    Filed: February 14, 2008
    Publication date: June 12, 2008
    Inventors: Soo-Han Kim, Jae-Yong Jeong
  • Publication number: 20080141228
    Abstract: Provided is a method of pre-processing a conditional region. By analyzing and designating code lines according to the present invention, when a conditional region included in a pre-processing region of an arbitrary file is compiled, the compiling can be efficiently performed, and when the arbitrary file is executed, an execution result can be derived in a short time.
    Type: Application
    Filed: November 20, 2007
    Publication date: June 12, 2008
    Inventor: Soon-Yong JEONG
  • Publication number: 20080133855
    Abstract: A memory and a method for managing data. The memory for compressing and managing data includes a memory unit, wherein the memory unit has a compressed page cache region which includes a plurality of compressed page caches for temporarily storing, compressing and decompressing data; and a compressed page block region which includes a plurality of compressed page blocks for storing compressed data generated through the compression. Since data is stored in the memory after being compressed, it is possible to store much more data. Furthermore, as a great amount of data can be stored at one time, it is possible to minimize a lowering of the data processing speed caused by movement of data between memories.
    Type: Application
    Filed: November 26, 2007
    Publication date: June 5, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Soon-Yong JEONG, Chang-Woo MIN
  • Patent number: 7379372
    Abstract: An accelerated bit scanning nonvolatile memory device and method. A nonvolatile memory device including a memory cell array including a plurality of memory cells, each memory cell corresponding to program data, a data scanning unit to detect the program data having a first value, and a programming unit to program the memory cells corresponding to the detected portions of the program data responsive to the scanning.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: May 27, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Yong Jeong
  • Patent number: 7372733
    Abstract: A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: May 13, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong In Choi, Jae Yong Jeong