Patents by Inventor Yong Jeong

Yong Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7359240
    Abstract: A flash memory device including memory cells, each memory cell configured to store bits, a sensing circuit configured to sequentially sense, for each memory cell, sets of the bits of the memory cell, a data rearrangement unit configured to receive words of data and to rearrange bits of the words to be stored in the memory cells, and an output circuit configured to output a group of the words using the sets of bits from one sensing, at least as early as during a subsequent sensing of sets of bits.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: April 15, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Woo Lee, Jae-Yong Jeong
  • Patent number: 7349263
    Abstract: Nonvolatile memory devices support programming and verify operations that improve threshold-voltage distribution within programmed memory cells. This improvement is achieved by reducing a magnitude of the programming voltage steps and increasing a duration of the verify operations once at least one of the plurality of memory cells undergoing programming has been verified as a “passed” memory cell. The nonvolatile memory device includes an array of nonvolatile memory cells and a control circuit, which is electrically coupled to the array of nonvolatile memory cells. The control circuit is configured to perform a plurality of memory programming operations (P) by driving a selected word line in the array with a first stair step sequence of program voltages having first step height (e.g.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: March 25, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Han Kim, Jae-Yong Jeong
  • Publication number: 20080068885
    Abstract: A method of programming a selected cell in a multi-level flash memory device comprises determining whether to program an upper bit or a lower bit of a selected memory cell, detecting a current logic state of two bits of data stored in the selected memory cell, determining a target logic state for the upper or lower bit, generating a program voltage and a verify voltage for programming the upper or lower bit to the target logic state, and applying the program voltage and the verify voltage to a word line connected to the selected memory cell.
    Type: Application
    Filed: November 28, 2007
    Publication date: March 20, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Phil KONG, Jae-Yong JEONG
  • Publication number: 20080056006
    Abstract: A method for programming a flash memory device is provided, where the flash memory device includes a plurality of memory cells, and where a threshold voltage of each of the memory cells is programmable in any one of plural corresponding data states.
    Type: Application
    Filed: December 21, 2006
    Publication date: March 6, 2008
    Inventors: Kee-Ho Jung, Jae-Yong Jeong, Chi-Weon Yoon
  • Publication number: 20080055998
    Abstract: In one aspect, a program method is provided for a flash memory device including a plurality of memory cells each being programmed in one of a plurality of data states. The program method of this aspect includes programming selected memory cells in a first data state, verifying a result of the programming, successively programming selected memory cells in at least two or more data states corresponding to threshold voltages which are lower than a threshold voltage corresponding to the first data state, and verifying results of the successive programming.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 6, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kee-Ho Jung, Jae-Yong Jeong, Chi-Weon Yoon
  • Publication number: 20080050655
    Abstract: Provided is a cathode mix for a lithium secondary battery, comprising a cathode active material, a conductive material and a binder, wherein the cathode mix uses a mixture of a flake-like carbon material (a), and a spherical chain-like carbon material (b) in a weight ratio (a/b) of 0.01 to 1 as the conductive material; and a lithium secondary battery comprising the same. Use of the conductive material according to the present invention can achieve simultaneous improvements in conductivity and loading density of the cathode mix, provide excellent discharge characteristics even with increased loading amounts of the cathode mix, and secure performance uniformity between the battery cells.
    Type: Application
    Filed: July 12, 2007
    Publication date: February 28, 2008
    Applicant: LG CHEM, LTD.
    Inventors: Seung Woo CHU, Sung-Pil YOON, Dohyun LEE, Dongmyung KIM, Joo-Hwan SUNG, Yong Jeong KIM, Hyungook YOON, Jong Hee KIM
  • Publication number: 20080043536
    Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.
    Type: Application
    Filed: September 14, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Yong JEONG, Heung-Soo LIM
  • Publication number: 20080040705
    Abstract: A method for building a software project, the method including the steps of receiving a makefile for building one software project, generating an object list of the received makefile, selecting one build target from the generated object list according to a preset order, sequentially compiling the child modules included in the build target when the selected build target includes child modules, updating a library file of an ancestor module having an inheritance relation with each of the compiled child modules, determining if all the build targets in the object list have been compiled; and generating a new execution file by using results obtained by compiling all the build targets when all the build targets have been compiled.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Soon-Yong JEONG
  • Publication number: 20080037331
    Abstract: Disclosed is a non-volatile memory device and a method of erasing the non-volatile memory device. An erase voltage is simultaneously applied to a plurality of sectors contained in the non-volatile memory device. Then, erase validation is sequentially performed for each of the plurality sectors and results of the erase validation are stored in a plurality of pass information registers. According to the results stored in the pass information registers, sectors which were not successfully erased are simultaneously re-erased and then sequentially re-validated until no such “failed sectors” remain in the non-volatile memory device. Upon eliminating the “failed sectors” from the non-volatile memory device, a post-program operation is sequentially performed on each of the plurality of sectors.
    Type: Application
    Filed: October 12, 2007
    Publication date: February 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Yong Jeong, Young-Ho Lim
  • Patent number: 7326966
    Abstract: An electroluminescence display device including a thin film transistor layer formed on a substrate, at least one insulating layer, and a pixel layer that includes a first electrode layer, a second electrode layer, and an intermediate layer interposed between the first electrode layer and the second electrode layer and having at least an emitting layer. The pixel layer further includes a reflection layer that is disposed under the first electrode layer and that extends to a via hole formed in the insulating layer, and an auxiliary conductive layer is disposed under the reflection layer. The auxiliary conductive layer extends to the via hole, and the first electrode layer contacts at least a portion of the auxiliary conductive layer.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: February 5, 2008
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Tae-Wook Kang, Chang-Soo Kim, Chang-Yong Jeong
  • Publication number: 20070280003
    Abstract: A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.
    Type: Application
    Filed: November 14, 2006
    Publication date: December 6, 2007
    Inventors: Jong In Choi, Jae Yong Jeong
  • Patent number: 7298654
    Abstract: Disclosed is a non-volatile memory device and a method of erasing the non-volatile memory device. An erase voltage is simultaneously applied to a plurality of sectors contained in the non-volatile memory device. Then, erase validation is sequentially performed for each of the plurality sectors and results of the erase validation are stored in a plurality of pass information registers. According to the results stored in the pass information registers, sectors which were not successfully erased are simultaneously re-erased and then sequentially re-validated until no such “failed sectors” remain in the non-volatile memory device. Upon eliminating the “failed sectors” from the non-volatile memory device, a post-program operation is sequentially performed on each of the plurality of sectors.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: November 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yong Jeong, Young-Ho Lim
  • Patent number: 7286413
    Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: October 23, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yong Jeong, Heung-Soo Lim
  • Patent number: 7266029
    Abstract: Data verification methods and/or nonvolatile memory devices are provided that concurrently detect data for a selected memory cell of the nonvolatile memory device and verify a programmed or erase state of previously detected data of a different memory cell of the nonvolatile memory device. Concurrently detecting data and verifying a programmed or erase state may be provided by a sense amplifier configured to sense data from a memory cell of the nonvolatile memory device, a latch configured to store the data sensed by the sense amplifier, an I/O buffer configured to store the data stored in the latch and a program/erase verifier circuit configured to control the sense amplifier, latch and I/O buffer to provided previously sensed data for a first memory cell to the program erase/verifier circuit for verification while the sense amplifier is sensing data for a second memory cell.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: September 4, 2007
    Inventor: Jae-Yong Jeong
  • Publication number: 20070188693
    Abstract: In a drive IC and a display device having the same, the drive IC includes a plurality of bumps disposed on a lower surface of the drive IC and aligned in a plurality of rows along an edge of the drive IC. The bumps aligned in different rows from each other are juxtaposed in a direction perpendicular to a direction in which the bumps are aligned. Accordingly, when the drive IC is mounted on a display panel using an anisotropic conductive film, the anisotropic conductive film may be smoothly flowed through a space defined by the bumps of the drive IC, thereby improving electric properties of the drive IC and display device.
    Type: Application
    Filed: April 20, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Seong-Yong HWANG, Sung-Chul KANG, Weon-Sik OH, Cheol-Yong JEONG, Jin-Suk LEE, Ju-Young YOON, Won-Gu CHO
  • Publication number: 20070189040
    Abstract: A light guide plate includes a main body having opposing side faces, and front and rear faces connected to the opposing side faces, the front face being adapted to output light incident on at least one of the side faces, a plurality of front prisms disposed at the front face of the main body, and a plurality of dot prisms disposed in an array at the rear face of the main body, the dot prisms being spaced apart from each other, each of the dot prisms including prism parts, sizes of the dot prisms increasing as a distance from the at least one side face increases.
    Type: Application
    Filed: April 9, 2007
    Publication date: August 16, 2007
    Inventors: Chul-Goo Chi, Man-Suk Kim, O-Yong Jeong
  • Publication number: 20070183216
    Abstract: A nonvolatile memory device includes a command decoder configured to generate a read/write flag signal in response to a read/write command and to generate a reprogram flag signal in response to a reprogram command, and a read/write circuit configured to control reading and writing operations in a memory cell array. The device further includes a read/write controller configured to cause the read/write circuit to perform a reading/writing operation in response to the read/write flag signal provided from the command decoder, and a reprogram controller configured to cause the read/write controller to perform a reprogramming operation in response to the reprogram flag signal. Methods of reprogramming a memory device include determining whether the memory device is in a busy state, delaying a reprogramming operation if the memory device is in a busy state, and executing the reprogramming operation when the memory device has turned to a standby state from the busy state.
    Type: Application
    Filed: December 5, 2006
    Publication date: August 9, 2007
    Inventors: Jin-Young Chun, Jae-Yong Jeong
  • Patent number: 7245537
    Abstract: A nonvolatile memory device and method of programming the device are disclosed. The nonvolatile memory device is adapted to interrupt or resume a programming operation for a memory cell of the device in response to variation in a programming voltage being supplied to the memory cell. The programming operation is typically interrupted or resumed in response to signals generated by a program controller and/or a detector monitoring the programming voltage.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: July 17, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Yong Jeong
  • Patent number: 7239554
    Abstract: A method of programming a non-volatile memory device includes activating a first pump to generate a bitline voltage, and after the bulk voltage reaches a target voltage, detecting whether the bitline voltage is less than a detection voltage. When the bitline voltage is less than the detection voltage, a second pump becomes active.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: July 3, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-yong Jeong
  • Publication number: 20070148833
    Abstract: A thin film transistor and a method of manufacturing the same are disclosed. More specifically, there is provided a thin film transistor having a thin film transistor and a method of manufacturing the same wherein an inorganic layer and an organic planarization layer are sequentially formed on the surface of a substrate on source/drain electrode of a thin film transistor having a semiconductor layer, a gate, source/drain areas and the source/drain electrodes, and a blanket etching process is performed to the organic planarization layer to planarize the inorganic layer. After forming a photoresist pattern on the inorganic layer, an etching process is performed to form a hole coupling a pixel electrode with one of the source/drain electrodes. According to the manufacturing method, the hole may be formed using one mask, thereby simplifying a manufacturing process, and improving an adhesion with the pixel electrode by the inorganic layer formed above.
    Type: Application
    Filed: March 7, 2007
    Publication date: June 28, 2007
    Applicant: SAMSUNG SDI CO., LTD.
    Inventors: Choong-Youl IM, Tae-wook KANG, Chang-yong JEONG